xref: /linux/arch/sparc/include/uapi/asm/psr.h (revision 5457982641fb3f5fb08ce22a853dd5474645c66d)
1*54579826SDavid Howells /*
2*54579826SDavid Howells  * psr.h: This file holds the macros for masking off various parts of
3*54579826SDavid Howells  *        the processor status register on the Sparc. This is valid
4*54579826SDavid Howells  *        for Version 8. On the V9 this is renamed to the PSTATE
5*54579826SDavid Howells  *        register and its members are accessed as fields like
6*54579826SDavid Howells  *        PSTATE.PRIV for the current CPU privilege level.
7*54579826SDavid Howells  *
8*54579826SDavid Howells  * Copyright (C) 1994 David S. Miller (davem@caip.rutgers.edu)
9*54579826SDavid Howells  */
10*54579826SDavid Howells 
11*54579826SDavid Howells #ifndef _UAPI__LINUX_SPARC_PSR_H
12*54579826SDavid Howells #define _UAPI__LINUX_SPARC_PSR_H
13*54579826SDavid Howells 
14*54579826SDavid Howells /* The Sparc PSR fields are laid out as the following:
15*54579826SDavid Howells  *
16*54579826SDavid Howells  *  ------------------------------------------------------------------------
17*54579826SDavid Howells  *  | impl  | vers  | icc   | resv  | EC | EF | PIL  | S | PS | ET |  CWP  |
18*54579826SDavid Howells  *  | 31-28 | 27-24 | 23-20 | 19-14 | 13 | 12 | 11-8 | 7 | 6  | 5  |  4-0  |
19*54579826SDavid Howells  *  ------------------------------------------------------------------------
20*54579826SDavid Howells  */
21*54579826SDavid Howells #define PSR_CWP     0x0000001f         /* current window pointer     */
22*54579826SDavid Howells #define PSR_ET      0x00000020         /* enable traps field         */
23*54579826SDavid Howells #define PSR_PS      0x00000040         /* previous privilege level   */
24*54579826SDavid Howells #define PSR_S       0x00000080         /* current privilege level    */
25*54579826SDavid Howells #define PSR_PIL     0x00000f00         /* processor interrupt level  */
26*54579826SDavid Howells #define PSR_EF      0x00001000         /* enable floating point      */
27*54579826SDavid Howells #define PSR_EC      0x00002000         /* enable co-processor        */
28*54579826SDavid Howells #define PSR_SYSCALL 0x00004000         /* inside of a syscall        */
29*54579826SDavid Howells #define PSR_LE      0x00008000         /* SuperSparcII little-endian */
30*54579826SDavid Howells #define PSR_ICC     0x00f00000         /* integer condition codes    */
31*54579826SDavid Howells #define PSR_C       0x00100000         /* carry bit                  */
32*54579826SDavid Howells #define PSR_V       0x00200000         /* overflow bit               */
33*54579826SDavid Howells #define PSR_Z       0x00400000         /* zero bit                   */
34*54579826SDavid Howells #define PSR_N       0x00800000         /* negative bit               */
35*54579826SDavid Howells #define PSR_VERS    0x0f000000         /* cpu-version field          */
36*54579826SDavid Howells #define PSR_IMPL    0xf0000000         /* cpu-implementation field   */
37*54579826SDavid Howells 
38*54579826SDavid Howells #define PSR_VERS_SHIFT		24
39*54579826SDavid Howells #define PSR_IMPL_SHIFT		28
40*54579826SDavid Howells #define PSR_VERS_SHIFTED_MASK	0xf
41*54579826SDavid Howells #define PSR_IMPL_SHIFTED_MASK	0xf
42*54579826SDavid Howells 
43*54579826SDavid Howells #define PSR_IMPL_TI		0x4
44*54579826SDavid Howells #define PSR_IMPL_LEON		0xf
45*54579826SDavid Howells 
46*54579826SDavid Howells 
47*54579826SDavid Howells #endif /* _UAPI__LINUX_SPARC_PSR_H */
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