xref: /linux/arch/sparc/include/asm/visasm.h (revision c0c914eca7f251c70facc37dfebeaf176601918d)
1 #ifndef _SPARC64_VISASM_H
2 #define _SPARC64_VISASM_H
3 
4 /* visasm.h:  FPU saving macros for VIS routines
5  *
6  * Copyright (C) 1998 Jakub Jelinek (jj@ultra.linux.cz)
7  */
8 
9 #include <asm/pstate.h>
10 #include <asm/ptrace.h>
11 
12 /* Clobbers %o5, %g1, %g2, %g3, %g7, %icc, %xcc */
13 
14 #define VISEntry					\
15 	rd		%fprs, %o5;			\
16 	andcc		%o5, (FPRS_FEF|FPRS_DU), %g0;	\
17 	be,pt		%icc, 297f;			\
18 	 sethi		%hi(297f), %g7;			\
19 	sethi		%hi(VISenter), %g1;		\
20 	jmpl		%g1 + %lo(VISenter), %g0;	\
21 	 or		%g7, %lo(297f), %g7;		\
22 297:	wr		%g0, FPRS_FEF, %fprs;		\
23 
24 #define VISExit						\
25 	wr		%g0, 0, %fprs;
26 
27 /* Clobbers %o5, %g1, %g2, %g3, %g7, %icc, %xcc.
28  * Must preserve %o5 between VISEntryHalf and VISExitHalf */
29 
30 #define VISEntryHalf					\
31 	VISEntry
32 
33 #define VISExitHalf					\
34 	VISExit
35 
36 #define VISEntryHalfFast(fail_label)			\
37 	rd		%fprs, %o5;			\
38 	andcc		%o5, FPRS_FEF, %g0;		\
39 	be,pt		%icc, 297f;			\
40 	 nop;						\
41 	ba,a,pt		%xcc, fail_label;		\
42 297:	wr		%o5, FPRS_FEF, %fprs;
43 
44 #define VISExitHalfFast					\
45 	wr		%o5, 0, %fprs;
46 
47 #ifndef __ASSEMBLY__
48 static inline void save_and_clear_fpu(void) {
49 	__asm__ __volatile__ (
50 "		rd %%fprs, %%o5\n"
51 "		andcc %%o5, %0, %%g0\n"
52 "		be,pt %%icc, 299f\n"
53 "		 sethi %%hi(298f), %%g7\n"
54 "		sethi %%hi(VISenter), %%g1\n"
55 "		jmpl %%g1 + %%lo(VISenter), %%g0\n"
56 "		 or %%g7, %%lo(298f), %%g7\n"
57 "	298:	wr %%g0, 0, %%fprs\n"
58 "	299:\n"
59 "		" : : "i" (FPRS_FEF|FPRS_DU) :
60 		"o5", "g1", "g2", "g3", "g7", "cc");
61 }
62 
63 int vis_emul(struct pt_regs *, unsigned int);
64 #endif
65 
66 #endif /* _SPARC64_ASI_H */
67