1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef __SPARC64_SWITCH_TO_64_H 3 #define __SPARC64_SWITCH_TO_64_H 4 5 #include <asm/visasm.h> 6 7 #define prepare_arch_switch(next) \ 8 do { \ 9 flushw_all(); \ 10 } while (0) 11 12 /* See what happens when you design the chip correctly? 13 * 14 * We tell gcc we clobber all non-fixed-usage registers except 15 * for l0/l1. It will use one for 'next' and the other to hold 16 * the output value of 'last'. 'next' is not referenced again 17 * past the invocation of switch_to in the scheduler, so we need 18 * not preserve it's value. Hairy, but it lets us remove 2 loads 19 * and 2 stores in this critical code path. -DaveM 20 */ 21 #define switch_to(prev, next, last) \ 22 do { save_and_clear_fpu(); \ 23 __asm__ __volatile__("wr %%g0, %0, %%asi" \ 24 : : "r" (ASI_AIUS)); \ 25 trap_block[current_thread_info()->cpu].thread = \ 26 task_thread_info(next); \ 27 __asm__ __volatile__( \ 28 "mov %%g4, %%g7\n\t" \ 29 "stx %%i6, [%%sp + 2047 + 0x70]\n\t" \ 30 "stx %%i7, [%%sp + 2047 + 0x78]\n\t" \ 31 "rdpr %%wstate, %%o5\n\t" \ 32 "stx %%o6, [%%g6 + %6]\n\t" \ 33 "stb %%o5, [%%g6 + %5]\n\t" \ 34 "rdpr %%cwp, %%o5\n\t" \ 35 "stb %%o5, [%%g6 + %8]\n\t" \ 36 "wrpr %%g0, 15, %%pil\n\t" \ 37 "mov %4, %%g6\n\t" \ 38 "ldub [%4 + %8], %%g1\n\t" \ 39 "wrpr %%g1, %%cwp\n\t" \ 40 "ldx [%%g6 + %6], %%o6\n\t" \ 41 "ldub [%%g6 + %5], %%o5\n\t" \ 42 "ldub [%%g6 + %7], %%o7\n\t" \ 43 "wrpr %%o5, 0x0, %%wstate\n\t" \ 44 "ldx [%%sp + 2047 + 0x70], %%i6\n\t" \ 45 "ldx [%%sp + 2047 + 0x78], %%i7\n\t" \ 46 "ldx [%%g6 + %9], %%g4\n\t" \ 47 "wrpr %%g0, 14, %%pil\n\t" \ 48 "brz,pt %%o7, switch_to_pc\n\t" \ 49 " mov %%g7, %0\n\t" \ 50 "sethi %%hi(ret_from_fork), %%g1\n\t" \ 51 "jmpl %%g1 + %%lo(ret_from_fork), %%g0\n\t" \ 52 " nop\n\t" \ 53 ".globl switch_to_pc\n\t" \ 54 "switch_to_pc:\n\t" \ 55 : "=&r" (last), "=r" (current), "=r" (current_thread_info_reg), \ 56 "=r" (__local_per_cpu_offset) \ 57 : "0" (task_thread_info(next)), \ 58 "i" (TI_WSTATE), "i" (TI_KSP), "i" (TI_NEW_CHILD), \ 59 "i" (TI_CWP), "i" (TI_TASK) \ 60 : "cc", \ 61 "g1", "g2", "g3", "g7", \ 62 "l1", "l2", "l3", "l4", "l5", "l6", "l7", \ 63 "i0", "i1", "i2", "i3", "i4", "i5", \ 64 "o0", "o1", "o2", "o3", "o4", "o5", "o7"); \ 65 } while(0) 66 67 void synchronize_user_stack(void); 68 struct pt_regs; 69 void fault_in_user_windows(struct pt_regs *); 70 71 #endif /* __SPARC64_SWITCH_TO_64_H */ 72