1 #ifndef _SPARC_PGTABLE_H 2 #define _SPARC_PGTABLE_H 3 4 /* asm/pgtable.h: Defines and functions used to work 5 * with Sparc page tables. 6 * 7 * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) 8 * Copyright (C) 1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz) 9 */ 10 11 #include <linux/const.h> 12 13 #ifndef __ASSEMBLY__ 14 #include <asm-generic/4level-fixup.h> 15 16 #include <linux/spinlock.h> 17 #include <linux/swap.h> 18 #include <asm/types.h> 19 #include <asm/pgtsrmmu.h> 20 #include <asm/vaddrs.h> 21 #include <asm/oplib.h> 22 #include <asm/cpu_type.h> 23 24 25 struct vm_area_struct; 26 struct page; 27 28 void load_mmu(void); 29 unsigned long calc_highpages(void); 30 unsigned long __init bootmem_init(unsigned long *pages_avail); 31 32 #define pte_ERROR(e) __builtin_trap() 33 #define pmd_ERROR(e) __builtin_trap() 34 #define pgd_ERROR(e) __builtin_trap() 35 36 #define PMD_SHIFT 22 37 #define PMD_SIZE (1UL << PMD_SHIFT) 38 #define PMD_MASK (~(PMD_SIZE-1)) 39 #define PMD_ALIGN(__addr) (((__addr) + ~PMD_MASK) & PMD_MASK) 40 #define PGDIR_SHIFT SRMMU_PGDIR_SHIFT 41 #define PGDIR_SIZE SRMMU_PGDIR_SIZE 42 #define PGDIR_MASK SRMMU_PGDIR_MASK 43 #define PTRS_PER_PTE 1024 44 #define PTRS_PER_PMD SRMMU_PTRS_PER_PMD 45 #define PTRS_PER_PGD SRMMU_PTRS_PER_PGD 46 #define USER_PTRS_PER_PGD PAGE_OFFSET / SRMMU_PGDIR_SIZE 47 #define FIRST_USER_ADDRESS 0 48 #define PTE_SIZE (PTRS_PER_PTE*4) 49 50 #define PAGE_NONE SRMMU_PAGE_NONE 51 #define PAGE_SHARED SRMMU_PAGE_SHARED 52 #define PAGE_COPY SRMMU_PAGE_COPY 53 #define PAGE_READONLY SRMMU_PAGE_RDONLY 54 #define PAGE_KERNEL SRMMU_PAGE_KERNEL 55 56 /* Top-level page directory - dummy used by init-mm. 57 * srmmu.c will assign the real one (which is dynamically sized) */ 58 #define swapper_pg_dir NULL 59 60 void paging_init(void); 61 62 extern unsigned long ptr_in_current_pgd; 63 64 /* xwr */ 65 #define __P000 PAGE_NONE 66 #define __P001 PAGE_READONLY 67 #define __P010 PAGE_COPY 68 #define __P011 PAGE_COPY 69 #define __P100 PAGE_READONLY 70 #define __P101 PAGE_READONLY 71 #define __P110 PAGE_COPY 72 #define __P111 PAGE_COPY 73 74 #define __S000 PAGE_NONE 75 #define __S001 PAGE_READONLY 76 #define __S010 PAGE_SHARED 77 #define __S011 PAGE_SHARED 78 #define __S100 PAGE_READONLY 79 #define __S101 PAGE_READONLY 80 #define __S110 PAGE_SHARED 81 #define __S111 PAGE_SHARED 82 83 /* First physical page can be anywhere, the following is needed so that 84 * va-->pa and vice versa conversions work properly without performance 85 * hit for all __pa()/__va() operations. 86 */ 87 extern unsigned long phys_base; 88 extern unsigned long pfn_base; 89 90 /* 91 * ZERO_PAGE is a global shared page that is always zero: used 92 * for zero-mapped memory areas etc.. 93 */ 94 extern unsigned long empty_zero_page; 95 96 #define ZERO_PAGE(vaddr) (virt_to_page(&empty_zero_page)) 97 98 /* 99 * In general all page table modifications should use the V8 atomic 100 * swap instruction. This insures the mmu and the cpu are in sync 101 * with respect to ref/mod bits in the page tables. 102 */ 103 static inline unsigned long srmmu_swap(unsigned long *addr, unsigned long value) 104 { 105 __asm__ __volatile__("swap [%2], %0" : "=&r" (value) : "0" (value), "r" (addr)); 106 return value; 107 } 108 109 /* Certain architectures need to do special things when pte's 110 * within a page table are directly modified. Thus, the following 111 * hook is made available. 112 */ 113 114 static inline void set_pte(pte_t *ptep, pte_t pteval) 115 { 116 srmmu_swap((unsigned long *)ptep, pte_val(pteval)); 117 } 118 119 #define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval) 120 121 static inline int srmmu_device_memory(unsigned long x) 122 { 123 return ((x & 0xF0000000) != 0); 124 } 125 126 static inline struct page *pmd_page(pmd_t pmd) 127 { 128 if (srmmu_device_memory(pmd_val(pmd))) 129 BUG(); 130 return pfn_to_page((pmd_val(pmd) & SRMMU_PTD_PMASK) >> (PAGE_SHIFT-4)); 131 } 132 133 static inline unsigned long pgd_page_vaddr(pgd_t pgd) 134 { 135 if (srmmu_device_memory(pgd_val(pgd))) { 136 return ~0; 137 } else { 138 unsigned long v = pgd_val(pgd) & SRMMU_PTD_PMASK; 139 return (unsigned long)__nocache_va(v << 4); 140 } 141 } 142 143 static inline int pte_present(pte_t pte) 144 { 145 return ((pte_val(pte) & SRMMU_ET_MASK) == SRMMU_ET_PTE); 146 } 147 148 static inline int pte_none(pte_t pte) 149 { 150 return !pte_val(pte); 151 } 152 153 static inline void __pte_clear(pte_t *ptep) 154 { 155 set_pte(ptep, __pte(0)); 156 } 157 158 static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep) 159 { 160 __pte_clear(ptep); 161 } 162 163 static inline int pmd_bad(pmd_t pmd) 164 { 165 return (pmd_val(pmd) & SRMMU_ET_MASK) != SRMMU_ET_PTD; 166 } 167 168 static inline int pmd_present(pmd_t pmd) 169 { 170 return ((pmd_val(pmd) & SRMMU_ET_MASK) == SRMMU_ET_PTD); 171 } 172 173 static inline int pmd_none(pmd_t pmd) 174 { 175 return !pmd_val(pmd); 176 } 177 178 static inline void pmd_clear(pmd_t *pmdp) 179 { 180 int i; 181 for (i = 0; i < PTRS_PER_PTE/SRMMU_REAL_PTRS_PER_PTE; i++) 182 set_pte((pte_t *)&pmdp->pmdv[i], __pte(0)); 183 } 184 185 static inline int pgd_none(pgd_t pgd) 186 { 187 return !(pgd_val(pgd) & 0xFFFFFFF); 188 } 189 190 static inline int pgd_bad(pgd_t pgd) 191 { 192 return (pgd_val(pgd) & SRMMU_ET_MASK) != SRMMU_ET_PTD; 193 } 194 195 static inline int pgd_present(pgd_t pgd) 196 { 197 return ((pgd_val(pgd) & SRMMU_ET_MASK) == SRMMU_ET_PTD); 198 } 199 200 static inline void pgd_clear(pgd_t *pgdp) 201 { 202 set_pte((pte_t *)pgdp, __pte(0)); 203 } 204 205 /* 206 * The following only work if pte_present() is true. 207 * Undefined behaviour if not.. 208 */ 209 static inline int pte_write(pte_t pte) 210 { 211 return pte_val(pte) & SRMMU_WRITE; 212 } 213 214 static inline int pte_dirty(pte_t pte) 215 { 216 return pte_val(pte) & SRMMU_DIRTY; 217 } 218 219 static inline int pte_young(pte_t pte) 220 { 221 return pte_val(pte) & SRMMU_REF; 222 } 223 224 static inline int pte_special(pte_t pte) 225 { 226 return 0; 227 } 228 229 static inline pte_t pte_wrprotect(pte_t pte) 230 { 231 return __pte(pte_val(pte) & ~SRMMU_WRITE); 232 } 233 234 static inline pte_t pte_mkclean(pte_t pte) 235 { 236 return __pte(pte_val(pte) & ~SRMMU_DIRTY); 237 } 238 239 static inline pte_t pte_mkold(pte_t pte) 240 { 241 return __pte(pte_val(pte) & ~SRMMU_REF); 242 } 243 244 static inline pte_t pte_mkwrite(pte_t pte) 245 { 246 return __pte(pte_val(pte) | SRMMU_WRITE); 247 } 248 249 static inline pte_t pte_mkdirty(pte_t pte) 250 { 251 return __pte(pte_val(pte) | SRMMU_DIRTY); 252 } 253 254 static inline pte_t pte_mkyoung(pte_t pte) 255 { 256 return __pte(pte_val(pte) | SRMMU_REF); 257 } 258 259 #define pte_mkspecial(pte) (pte) 260 261 #define pfn_pte(pfn, prot) mk_pte(pfn_to_page(pfn), prot) 262 263 static inline unsigned long pte_pfn(pte_t pte) 264 { 265 if (srmmu_device_memory(pte_val(pte))) { 266 /* Just return something that will cause 267 * pfn_valid() to return false. This makes 268 * copy_one_pte() to just directly copy to 269 * PTE over. 270 */ 271 return ~0UL; 272 } 273 return (pte_val(pte) & SRMMU_PTE_PMASK) >> (PAGE_SHIFT-4); 274 } 275 276 #define pte_page(pte) pfn_to_page(pte_pfn(pte)) 277 278 /* 279 * Conversion functions: convert a page and protection to a page entry, 280 * and a page entry and page directory to the page they refer to. 281 */ 282 static inline pte_t mk_pte(struct page *page, pgprot_t pgprot) 283 { 284 return __pte((page_to_pfn(page) << (PAGE_SHIFT-4)) | pgprot_val(pgprot)); 285 } 286 287 static inline pte_t mk_pte_phys(unsigned long page, pgprot_t pgprot) 288 { 289 return __pte(((page) >> 4) | pgprot_val(pgprot)); 290 } 291 292 static inline pte_t mk_pte_io(unsigned long page, pgprot_t pgprot, int space) 293 { 294 return __pte(((page) >> 4) | (space << 28) | pgprot_val(pgprot)); 295 } 296 297 #define pgprot_noncached pgprot_noncached 298 static inline pgprot_t pgprot_noncached(pgprot_t prot) 299 { 300 prot &= ~__pgprot(SRMMU_CACHE); 301 return prot; 302 } 303 304 static pte_t pte_modify(pte_t pte, pgprot_t newprot) __attribute_const__; 305 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) 306 { 307 return __pte((pte_val(pte) & SRMMU_CHG_MASK) | 308 pgprot_val(newprot)); 309 } 310 311 #define pgd_index(address) ((address) >> PGDIR_SHIFT) 312 313 /* to find an entry in a page-table-directory */ 314 #define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address)) 315 316 /* to find an entry in a kernel page-table-directory */ 317 #define pgd_offset_k(address) pgd_offset(&init_mm, address) 318 319 /* Find an entry in the second-level page table.. */ 320 static inline pmd_t *pmd_offset(pgd_t * dir, unsigned long address) 321 { 322 return (pmd_t *) pgd_page_vaddr(*dir) + 323 ((address >> PMD_SHIFT) & (PTRS_PER_PMD - 1)); 324 } 325 326 /* Find an entry in the third-level page table.. */ 327 pte_t *pte_offset_kernel(pmd_t * dir, unsigned long address); 328 329 /* 330 * This shortcut works on sun4m (and sun4d) because the nocache area is static. 331 */ 332 #define pte_offset_map(d, a) pte_offset_kernel(d,a) 333 #define pte_unmap(pte) do{}while(0) 334 335 struct seq_file; 336 void mmu_info(struct seq_file *m); 337 338 /* Fault handler stuff... */ 339 #define FAULT_CODE_PROT 0x1 340 #define FAULT_CODE_WRITE 0x2 341 #define FAULT_CODE_USER 0x4 342 343 #define update_mmu_cache(vma, address, ptep) do { } while (0) 344 345 void srmmu_mapiorange(unsigned int bus, unsigned long xpa, 346 unsigned long xva, unsigned int len); 347 void srmmu_unmapiorange(unsigned long virt_addr, unsigned int len); 348 349 /* Encode and de-code a swap entry */ 350 static inline unsigned long __swp_type(swp_entry_t entry) 351 { 352 return (entry.val >> SRMMU_SWP_TYPE_SHIFT) & SRMMU_SWP_TYPE_MASK; 353 } 354 355 static inline unsigned long __swp_offset(swp_entry_t entry) 356 { 357 return (entry.val >> SRMMU_SWP_OFF_SHIFT) & SRMMU_SWP_OFF_MASK; 358 } 359 360 static inline swp_entry_t __swp_entry(unsigned long type, unsigned long offset) 361 { 362 return (swp_entry_t) { 363 (type & SRMMU_SWP_TYPE_MASK) << SRMMU_SWP_TYPE_SHIFT 364 | (offset & SRMMU_SWP_OFF_MASK) << SRMMU_SWP_OFF_SHIFT }; 365 } 366 367 #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) }) 368 #define __swp_entry_to_pte(x) ((pte_t) { (x).val }) 369 370 static inline unsigned long 371 __get_phys (unsigned long addr) 372 { 373 switch (sparc_cpu_model){ 374 case sun4m: 375 case sun4d: 376 return ((srmmu_get_pte (addr) & 0xffffff00) << 4); 377 default: 378 return 0; 379 } 380 } 381 382 static inline int 383 __get_iospace (unsigned long addr) 384 { 385 switch (sparc_cpu_model){ 386 case sun4m: 387 case sun4d: 388 return (srmmu_get_pte (addr) >> 28); 389 default: 390 return -1; 391 } 392 } 393 394 extern unsigned long *sparc_valid_addr_bitmap; 395 396 /* Needs to be defined here and not in linux/mm.h, as it is arch dependent */ 397 #define kern_addr_valid(addr) \ 398 (test_bit(__pa((unsigned long)(addr))>>20, sparc_valid_addr_bitmap)) 399 400 /* 401 * For sparc32&64, the pfn in io_remap_pfn_range() carries <iospace> in 402 * its high 4 bits. These macros/functions put it there or get it from there. 403 */ 404 #define MK_IOSPACE_PFN(space, pfn) (pfn | (space << (BITS_PER_LONG - 4))) 405 #define GET_IOSPACE(pfn) (pfn >> (BITS_PER_LONG - 4)) 406 #define GET_PFN(pfn) (pfn & 0x0fffffffUL) 407 408 int remap_pfn_range(struct vm_area_struct *, unsigned long, unsigned long, 409 unsigned long, pgprot_t); 410 411 static inline int io_remap_pfn_range(struct vm_area_struct *vma, 412 unsigned long from, unsigned long pfn, 413 unsigned long size, pgprot_t prot) 414 { 415 unsigned long long offset, space, phys_base; 416 417 offset = ((unsigned long long) GET_PFN(pfn)) << PAGE_SHIFT; 418 space = GET_IOSPACE(pfn); 419 phys_base = offset | (space << 32ULL); 420 421 return remap_pfn_range(vma, from, phys_base >> PAGE_SHIFT, size, prot); 422 } 423 #define io_remap_pfn_range io_remap_pfn_range 424 425 #define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS 426 #define ptep_set_access_flags(__vma, __address, __ptep, __entry, __dirty) \ 427 ({ \ 428 int __changed = !pte_same(*(__ptep), __entry); \ 429 if (__changed) { \ 430 set_pte_at((__vma)->vm_mm, (__address), __ptep, __entry); \ 431 flush_tlb_page(__vma, __address); \ 432 } \ 433 __changed; \ 434 }) 435 436 #include <asm-generic/pgtable.h> 437 438 #endif /* !(__ASSEMBLY__) */ 439 440 #define VMALLOC_START _AC(0xfe600000,UL) 441 #define VMALLOC_END _AC(0xffc00000,UL) 442 443 /* We provide our own get_unmapped_area to cope with VA holes for userland */ 444 #define HAVE_ARCH_UNMAPPED_AREA 445 446 /* 447 * No page table caches to initialise 448 */ 449 #define pgtable_cache_init() do { } while (0) 450 451 #endif /* !(_SPARC_PGTABLE_H) */ 452