xref: /linux/arch/sparc/include/asm/lsu.h (revision 498495dba268b20e8eadd7fe93c140c68b6cc9d2)
1*b2441318SGreg Kroah-Hartman /* SPDX-License-Identifier: GPL-2.0 */
2a439fe51SSam Ravnborg #ifndef _SPARC64_LSU_H
3a439fe51SSam Ravnborg #define _SPARC64_LSU_H
4a439fe51SSam Ravnborg 
5a439fe51SSam Ravnborg #include <linux/const.h>
6a439fe51SSam Ravnborg 
7a439fe51SSam Ravnborg /* LSU Control Register */
8a439fe51SSam Ravnborg #define LSU_CONTROL_PM _AC(0x000001fe00000000,UL) /* Phys-watchpoint byte mask*/
9a439fe51SSam Ravnborg #define LSU_CONTROL_VM _AC(0x00000001fe000000,UL) /* Virt-watchpoint byte mask*/
10a439fe51SSam Ravnborg #define LSU_CONTROL_PR _AC(0x0000000001000000,UL) /* Phys-rd watchpoint enable*/
11a439fe51SSam Ravnborg #define LSU_CONTROL_PW _AC(0x0000000000800000,UL) /* Phys-wr watchpoint enable*/
12a439fe51SSam Ravnborg #define LSU_CONTROL_VR _AC(0x0000000000400000,UL) /* Virt-rd watchpoint enable*/
13a439fe51SSam Ravnborg #define LSU_CONTROL_VW _AC(0x0000000000200000,UL) /* Virt-wr watchpoint enable*/
14a439fe51SSam Ravnborg #define LSU_CONTROL_FM _AC(0x00000000000ffff0,UL) /* Parity mask enables.     */
15a439fe51SSam Ravnborg #define LSU_CONTROL_DM _AC(0x0000000000000008,UL) /* Data MMU enable.         */
16a439fe51SSam Ravnborg #define LSU_CONTROL_IM _AC(0x0000000000000004,UL) /* Instruction MMU enable.  */
17a439fe51SSam Ravnborg #define LSU_CONTROL_DC _AC(0x0000000000000002,UL) /* Data cache enable.       */
18a439fe51SSam Ravnborg #define LSU_CONTROL_IC _AC(0x0000000000000001,UL) /* Instruction cache enable.*/
19a439fe51SSam Ravnborg 
20a439fe51SSam Ravnborg #endif /* !(_SPARC64_LSU_H) */
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