xref: /linux/arch/sparc/include/asm/iommu_64.h (revision 3eb66e91a25497065c5322b1268cbc3953642227)
1b2441318SGreg Kroah-Hartman /* SPDX-License-Identifier: GPL-2.0 */
2a439fe51SSam Ravnborg /* iommu.h: Definitions for the sun5 IOMMU.
3a439fe51SSam Ravnborg  *
4a439fe51SSam Ravnborg  * Copyright (C) 1996, 1999, 2007 David S. Miller (davem@davemloft.net)
5a439fe51SSam Ravnborg  */
6a439fe51SSam Ravnborg #ifndef _SPARC64_IOMMU_H
7a439fe51SSam Ravnborg #define _SPARC64_IOMMU_H
8a439fe51SSam Ravnborg 
9a439fe51SSam Ravnborg /* The format of an iopte in the page tables. */
10a439fe51SSam Ravnborg #define IOPTE_VALID   0x8000000000000000UL
11a439fe51SSam Ravnborg #define IOPTE_64K     0x2000000000000000UL
12a439fe51SSam Ravnborg #define IOPTE_STBUF   0x1000000000000000UL
13a439fe51SSam Ravnborg #define IOPTE_INTRA   0x0800000000000000UL
14a439fe51SSam Ravnborg #define IOPTE_CONTEXT 0x07ff800000000000UL
15a439fe51SSam Ravnborg #define IOPTE_PAGE    0x00007fffffffe000UL
16a439fe51SSam Ravnborg #define IOPTE_CACHE   0x0000000000000010UL
17a439fe51SSam Ravnborg #define IOPTE_WRITE   0x0000000000000002UL
18a439fe51SSam Ravnborg 
19a439fe51SSam Ravnborg #define IOMMU_NUM_CTXS	4096
20*0d3fdb15SChristoph Hellwig #include <asm/iommu-common.h>
21a439fe51SSam Ravnborg 
22a439fe51SSam Ravnborg struct iommu_arena {
23a439fe51SSam Ravnborg 	unsigned long	*map;
24a439fe51SSam Ravnborg 	unsigned int	hint;
25a439fe51SSam Ravnborg 	unsigned int	limit;
26a439fe51SSam Ravnborg };
27a439fe51SSam Ravnborg 
28f0248c15STushar Dave #define ATU_64_SPACE_SIZE 0x800000000 /* 32G */
29f0248c15STushar Dave 
30f0248c15STushar Dave /* Data structures for SPARC ATU architecture */
31f0248c15STushar Dave struct atu_iotsb {
32f0248c15STushar Dave 	void	*table;		/* IOTSB table base virtual addr*/
33f0248c15STushar Dave 	u64	ra;		/* IOTSB table real addr */
34f0248c15STushar Dave 	u64	dvma_size;	/* ranges[3].size or OS slected 32G size */
35f0248c15STushar Dave 	u64	dvma_base;	/* ranges[3].base */
36f0248c15STushar Dave 	u64	table_size;	/* IOTSB table size */
37f0248c15STushar Dave 	u64	page_size;	/* IO PAGE size for IOTSB */
38f0248c15STushar Dave 	u32	iotsb_num;	/* tsbnum is same as iotsb_handle */
39f0248c15STushar Dave };
40f0248c15STushar Dave 
41f0248c15STushar Dave struct atu_ranges {
42f0248c15STushar Dave 	u64	base;
43f0248c15STushar Dave 	u64	size;
44f0248c15STushar Dave };
45f0248c15STushar Dave 
46f0248c15STushar Dave struct atu {
47f0248c15STushar Dave 	struct	atu_ranges	*ranges;
48f0248c15STushar Dave 	struct	atu_iotsb	*iotsb;
4931f077dcSTushar Dave 	struct	iommu_map_table	tbl;
50f0248c15STushar Dave 	u64			base;
51f0248c15STushar Dave 	u64			size;
5231f077dcSTushar Dave 	u64			dma_addr_mask;
53f0248c15STushar Dave };
54f0248c15STushar Dave 
55a439fe51SSam Ravnborg struct iommu {
56bb620c3dSSowmini Varadhan 	struct iommu_map_table	tbl;
57f0248c15STushar Dave 	struct atu		*atu;
58a439fe51SSam Ravnborg 	spinlock_t		lock;
59bb620c3dSSowmini Varadhan 	u32			dma_addr_mask;
60a439fe51SSam Ravnborg 	iopte_t			*page_table;
61a439fe51SSam Ravnborg 	unsigned long		iommu_control;
62a439fe51SSam Ravnborg 	unsigned long		iommu_tsbbase;
63a439fe51SSam Ravnborg 	unsigned long		iommu_flush;
64a439fe51SSam Ravnborg 	unsigned long		iommu_flushinv;
65a439fe51SSam Ravnborg 	unsigned long		iommu_tags;
66a439fe51SSam Ravnborg 	unsigned long		iommu_ctxflush;
67a439fe51SSam Ravnborg 	unsigned long		write_complete_reg;
68a439fe51SSam Ravnborg 	unsigned long		dummy_page;
69a439fe51SSam Ravnborg 	unsigned long		dummy_page_pa;
70a439fe51SSam Ravnborg 	unsigned long		ctx_lowest_free;
71a439fe51SSam Ravnborg 	DECLARE_BITMAP(ctx_bitmap, IOMMU_NUM_CTXS);
72a439fe51SSam Ravnborg };
73a439fe51SSam Ravnborg 
74a439fe51SSam Ravnborg struct strbuf {
75a439fe51SSam Ravnborg 	int			strbuf_enabled;
76a439fe51SSam Ravnborg 	unsigned long		strbuf_control;
77a439fe51SSam Ravnborg 	unsigned long		strbuf_pflush;
78a439fe51SSam Ravnborg 	unsigned long		strbuf_fsync;
79d3ae4b5bSDavid S. Miller 	unsigned long		strbuf_err_stat;
80d3ae4b5bSDavid S. Miller 	unsigned long		strbuf_tag_diag;
81d3ae4b5bSDavid S. Miller 	unsigned long		strbuf_line_diag;
82a439fe51SSam Ravnborg 	unsigned long		strbuf_ctxflush;
83a439fe51SSam Ravnborg 	unsigned long		strbuf_ctxmatch_base;
84a439fe51SSam Ravnborg 	unsigned long		strbuf_flushflag_pa;
85a439fe51SSam Ravnborg 	volatile unsigned long *strbuf_flushflag;
86a439fe51SSam Ravnborg 	volatile unsigned long	__flushflag_buf[(64+(64-1)) / sizeof(long)];
87a439fe51SSam Ravnborg };
88a439fe51SSam Ravnborg 
89f05a6865SSam Ravnborg int iommu_table_init(struct iommu *iommu, int tsbsize,
90a439fe51SSam Ravnborg 		     u32 dma_offset, u32 dma_addr_mask,
91a439fe51SSam Ravnborg 		     int numa_node);
92a439fe51SSam Ravnborg 
93a439fe51SSam Ravnborg #endif /* !(_SPARC64_IOMMU_H) */
94