xref: /linux/arch/sparc/include/asm/io_32.h (revision b43ab901d671e3e3cad425ea5e9a3c74e266dcdd)
1 #ifndef __SPARC_IO_H
2 #define __SPARC_IO_H
3 
4 #include <linux/kernel.h>
5 #include <linux/types.h>
6 #include <linux/ioport.h>  /* struct resource */
7 
8 #include <asm/page.h>      /* IO address mapping routines need this */
9 #include <asm/system.h>
10 #include <asm-generic/pci_iomap.h>
11 
12 #define page_to_phys(page)	(page_to_pfn(page) << PAGE_SHIFT)
13 
14 static inline u32 flip_dword (u32 l)
15 {
16 	return ((l&0xff)<<24) | (((l>>8)&0xff)<<16) | (((l>>16)&0xff)<<8)| ((l>>24)&0xff);
17 }
18 
19 static inline u16 flip_word (u16 w)
20 {
21 	return ((w&0xff) << 8) | ((w>>8)&0xff);
22 }
23 
24 #define mmiowb()
25 
26 /*
27  * Memory mapped I/O to PCI
28  */
29 
30 static inline u8 __raw_readb(const volatile void __iomem *addr)
31 {
32 	return *(__force volatile u8 *)addr;
33 }
34 
35 static inline u16 __raw_readw(const volatile void __iomem *addr)
36 {
37 	return *(__force volatile u16 *)addr;
38 }
39 
40 static inline u32 __raw_readl(const volatile void __iomem *addr)
41 {
42 	return *(__force volatile u32 *)addr;
43 }
44 
45 static inline void __raw_writeb(u8 b, volatile void __iomem *addr)
46 {
47 	*(__force volatile u8 *)addr = b;
48 }
49 
50 static inline void __raw_writew(u16 w, volatile void __iomem *addr)
51 {
52 	*(__force volatile u16 *)addr = w;
53 }
54 
55 static inline void __raw_writel(u32 l, volatile void __iomem *addr)
56 {
57 	*(__force volatile u32 *)addr = l;
58 }
59 
60 static inline u8 __readb(const volatile void __iomem *addr)
61 {
62 	return *(__force volatile u8 *)addr;
63 }
64 
65 static inline u16 __readw(const volatile void __iomem *addr)
66 {
67 	return flip_word(*(__force volatile u16 *)addr);
68 }
69 
70 static inline u32 __readl(const volatile void __iomem *addr)
71 {
72 	return flip_dword(*(__force volatile u32 *)addr);
73 }
74 
75 static inline void __writeb(u8 b, volatile void __iomem *addr)
76 {
77 	*(__force volatile u8 *)addr = b;
78 }
79 
80 static inline void __writew(u16 w, volatile void __iomem *addr)
81 {
82 	*(__force volatile u16 *)addr = flip_word(w);
83 }
84 
85 static inline void __writel(u32 l, volatile void __iomem *addr)
86 {
87 	*(__force volatile u32 *)addr = flip_dword(l);
88 }
89 
90 #define readb(__addr)		__readb(__addr)
91 #define readw(__addr)		__readw(__addr)
92 #define readl(__addr)		__readl(__addr)
93 #define readb_relaxed(__addr)	readb(__addr)
94 #define readw_relaxed(__addr)	readw(__addr)
95 #define readl_relaxed(__addr)	readl(__addr)
96 
97 #define writeb(__b, __addr)	__writeb((__b),(__addr))
98 #define writew(__w, __addr)	__writew((__w),(__addr))
99 #define writel(__l, __addr)	__writel((__l),(__addr))
100 
101 /*
102  * I/O space operations
103  *
104  * Arrangement on a Sun is somewhat complicated.
105  *
106  * First of all, we want to use standard Linux drivers
107  * for keyboard, PC serial, etc. These drivers think
108  * they access I/O space and use inb/outb.
109  * On the other hand, EBus bridge accepts PCI *memory*
110  * cycles and converts them into ISA *I/O* cycles.
111  * Ergo, we want inb & outb to generate PCI memory cycles.
112  *
113  * If we want to issue PCI *I/O* cycles, we do this
114  * with a low 64K fixed window in PCIC. This window gets
115  * mapped somewhere into virtual kernel space and we
116  * can use inb/outb again.
117  */
118 #define inb_local(__addr)	__readb((void __iomem *)(unsigned long)(__addr))
119 #define inb(__addr)		__readb((void __iomem *)(unsigned long)(__addr))
120 #define inw(__addr)		__readw((void __iomem *)(unsigned long)(__addr))
121 #define inl(__addr)		__readl((void __iomem *)(unsigned long)(__addr))
122 
123 #define outb_local(__b, __addr)	__writeb(__b, (void __iomem *)(unsigned long)(__addr))
124 #define outb(__b, __addr)	__writeb(__b, (void __iomem *)(unsigned long)(__addr))
125 #define outw(__w, __addr)	__writew(__w, (void __iomem *)(unsigned long)(__addr))
126 #define outl(__l, __addr)	__writel(__l, (void __iomem *)(unsigned long)(__addr))
127 
128 #define inb_p(__addr)		inb(__addr)
129 #define outb_p(__b, __addr)	outb(__b, __addr)
130 #define inw_p(__addr)		inw(__addr)
131 #define outw_p(__w, __addr)	outw(__w, __addr)
132 #define inl_p(__addr)		inl(__addr)
133 #define outl_p(__l, __addr)	outl(__l, __addr)
134 
135 void outsb(unsigned long addr, const void *src, unsigned long cnt);
136 void outsw(unsigned long addr, const void *src, unsigned long cnt);
137 void outsl(unsigned long addr, const void *src, unsigned long cnt);
138 void insb(unsigned long addr, void *dst, unsigned long count);
139 void insw(unsigned long addr, void *dst, unsigned long count);
140 void insl(unsigned long addr, void *dst, unsigned long count);
141 
142 #define IO_SPACE_LIMIT 0xffffffff
143 
144 /*
145  * SBus accessors.
146  *
147  * SBus has only one, memory mapped, I/O space.
148  * We do not need to flip bytes for SBus of course.
149  */
150 static inline u8 _sbus_readb(const volatile void __iomem *addr)
151 {
152 	return *(__force volatile u8 *)addr;
153 }
154 
155 static inline u16 _sbus_readw(const volatile void __iomem *addr)
156 {
157 	return *(__force volatile u16 *)addr;
158 }
159 
160 static inline u32 _sbus_readl(const volatile void __iomem *addr)
161 {
162 	return *(__force volatile u32 *)addr;
163 }
164 
165 static inline void _sbus_writeb(u8 b, volatile void __iomem *addr)
166 {
167 	*(__force volatile u8 *)addr = b;
168 }
169 
170 static inline void _sbus_writew(u16 w, volatile void __iomem *addr)
171 {
172 	*(__force volatile u16 *)addr = w;
173 }
174 
175 static inline void _sbus_writel(u32 l, volatile void __iomem *addr)
176 {
177 	*(__force volatile u32 *)addr = l;
178 }
179 
180 /*
181  * The only reason for #define's is to hide casts to unsigned long.
182  */
183 #define sbus_readb(__addr)		_sbus_readb(__addr)
184 #define sbus_readw(__addr)		_sbus_readw(__addr)
185 #define sbus_readl(__addr)		_sbus_readl(__addr)
186 #define sbus_writeb(__b, __addr)	_sbus_writeb(__b, __addr)
187 #define sbus_writew(__w, __addr)	_sbus_writew(__w, __addr)
188 #define sbus_writel(__l, __addr)	_sbus_writel(__l, __addr)
189 
190 static inline void sbus_memset_io(volatile void __iomem *__dst, int c, __kernel_size_t n)
191 {
192 	while(n--) {
193 		sbus_writeb(c, __dst);
194 		__dst++;
195 	}
196 }
197 
198 static inline void
199 _memset_io(volatile void __iomem *dst, int c, __kernel_size_t n)
200 {
201 	volatile void __iomem *d = dst;
202 
203 	while (n--) {
204 		writeb(c, d);
205 		d++;
206 	}
207 }
208 
209 #define memset_io(d,c,sz)	_memset_io(d,c,sz)
210 
211 static inline void
212 _sbus_memcpy_fromio(void *dst, const volatile void __iomem *src,
213 		    __kernel_size_t n)
214 {
215 	char *d = dst;
216 
217 	while (n--) {
218 		char tmp = sbus_readb(src);
219 		*d++ = tmp;
220 		src++;
221 	}
222 }
223 
224 #define sbus_memcpy_fromio(d, s, sz)	_sbus_memcpy_fromio(d, s, sz)
225 
226 static inline void
227 _memcpy_fromio(void *dst, const volatile void __iomem *src, __kernel_size_t n)
228 {
229 	char *d = dst;
230 
231 	while (n--) {
232 		char tmp = readb(src);
233 		*d++ = tmp;
234 		src++;
235 	}
236 }
237 
238 #define memcpy_fromio(d,s,sz)	_memcpy_fromio(d,s,sz)
239 
240 static inline void
241 _sbus_memcpy_toio(volatile void __iomem *dst, const void *src,
242 		  __kernel_size_t n)
243 {
244 	const char *s = src;
245 	volatile void __iomem *d = dst;
246 
247 	while (n--) {
248 		char tmp = *s++;
249 		sbus_writeb(tmp, d);
250 		d++;
251 	}
252 }
253 
254 #define sbus_memcpy_toio(d, s, sz)	_sbus_memcpy_toio(d, s, sz)
255 
256 static inline void
257 _memcpy_toio(volatile void __iomem *dst, const void *src, __kernel_size_t n)
258 {
259 	const char *s = src;
260 	volatile void __iomem *d = dst;
261 
262 	while (n--) {
263 		char tmp = *s++;
264 		writeb(tmp, d);
265 		d++;
266 	}
267 }
268 
269 #define memcpy_toio(d,s,sz)	_memcpy_toio(d,s,sz)
270 
271 #ifdef __KERNEL__
272 
273 /*
274  * Bus number may be embedded in the higher bits of the physical address.
275  * This is why we have no bus number argument to ioremap().
276  */
277 extern void __iomem *ioremap(unsigned long offset, unsigned long size);
278 #define ioremap_nocache(X,Y)	ioremap((X),(Y))
279 #define ioremap_wc(X,Y)		ioremap((X),(Y))
280 extern void iounmap(volatile void __iomem *addr);
281 
282 #define ioread8(X)			readb(X)
283 #define ioread16(X)			readw(X)
284 #define ioread16be(X)			__raw_readw(X)
285 #define ioread32(X)			readl(X)
286 #define ioread32be(X)			__raw_readl(X)
287 #define iowrite8(val,X)			writeb(val,X)
288 #define iowrite16(val,X)		writew(val,X)
289 #define iowrite16be(val,X)		__raw_writew(val,X)
290 #define iowrite32(val,X)		writel(val,X)
291 #define iowrite32be(val,X)		__raw_writel(val,X)
292 
293 static inline void ioread8_rep(void __iomem *port, void *buf, unsigned long count)
294 {
295 	insb((unsigned long __force)port, buf, count);
296 }
297 static inline void ioread16_rep(void __iomem *port, void *buf, unsigned long count)
298 {
299 	insw((unsigned long __force)port, buf, count);
300 }
301 
302 static inline void ioread32_rep(void __iomem *port, void *buf, unsigned long count)
303 {
304 	insl((unsigned long __force)port, buf, count);
305 }
306 
307 static inline void iowrite8_rep(void __iomem *port, const void *buf, unsigned long count)
308 {
309 	outsb((unsigned long __force)port, buf, count);
310 }
311 
312 static inline void iowrite16_rep(void __iomem *port, const void *buf, unsigned long count)
313 {
314 	outsw((unsigned long __force)port, buf, count);
315 }
316 
317 static inline void iowrite32_rep(void __iomem *port, const void *buf, unsigned long count)
318 {
319 	outsl((unsigned long __force)port, buf, count);
320 }
321 
322 /* Create a virtual mapping cookie for an IO port range */
323 extern void __iomem *ioport_map(unsigned long port, unsigned int nr);
324 extern void ioport_unmap(void __iomem *);
325 
326 /* Create a virtual mapping cookie for a PCI BAR (memory or IO) */
327 struct pci_dev;
328 extern void pci_iounmap(struct pci_dev *dev, void __iomem *);
329 
330 /*
331  * At the moment, we do not use CMOS_READ anywhere outside of rtc.c,
332  * so rtc_port is static in it. This should not change unless a new
333  * hardware pops up.
334  */
335 #define RTC_PORT(x)   (rtc_port + (x))
336 #define RTC_ALWAYS_BCD  0
337 
338 static inline int sbus_can_dma_64bit(void)
339 {
340 	return 0; /* actually, sparc_cpu_model==sun4d */
341 }
342 static inline int sbus_can_burst64(void)
343 {
344 	return 0; /* actually, sparc_cpu_model==sun4d */
345 }
346 struct device;
347 extern void sbus_set_sbus64(struct device *, int);
348 
349 #endif
350 
351 #define __ARCH_HAS_NO_PAGE_ZERO_MAPPED		1
352 
353 /*
354  * Convert a physical pointer to a virtual kernel pointer for /dev/mem
355  * access
356  */
357 #define xlate_dev_mem_ptr(p)	__va(p)
358 
359 /*
360  * Convert a virtual cached pointer to an uncached pointer
361  */
362 #define xlate_dev_kmem_ptr(p)	p
363 
364 #endif /* !(__SPARC_IO_H) */
365