xref: /linux/arch/sh/mm/cache-j2.c (revision a1c613ae4c322ddd58d5a8539dbfba2a0380a8c0)
1c456cfc2SThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only
25a846abaSRich Felker /*
35a846abaSRich Felker  * arch/sh/mm/cache-j2.c
45a846abaSRich Felker  *
55a846abaSRich Felker  * Copyright (C) 2015-2016 Smart Energy Instruments, Inc.
65a846abaSRich Felker  */
75a846abaSRich Felker 
85a846abaSRich Felker #include <linux/init.h>
95a846abaSRich Felker #include <linux/mm.h>
105a846abaSRich Felker #include <linux/cpumask.h>
115a846abaSRich Felker 
125a846abaSRich Felker #include <asm/cache.h>
135a846abaSRich Felker #include <asm/addrspace.h>
145a846abaSRich Felker #include <asm/processor.h>
155a846abaSRich Felker #include <asm/cacheflush.h>
165a846abaSRich Felker #include <asm/io.h>
175a846abaSRich Felker 
185a846abaSRich Felker #define ICACHE_ENABLE	0x1
195a846abaSRich Felker #define DCACHE_ENABLE	0x2
205a846abaSRich Felker #define CACHE_ENABLE	(ICACHE_ENABLE | DCACHE_ENABLE)
215a846abaSRich Felker #define ICACHE_FLUSH	0x100
225a846abaSRich Felker #define DCACHE_FLUSH	0x200
235a846abaSRich Felker #define CACHE_FLUSH	(ICACHE_FLUSH | DCACHE_FLUSH)
245a846abaSRich Felker 
255a846abaSRich Felker u32 __iomem *j2_ccr_base;
265a846abaSRich Felker 
j2_flush_icache(void * args)275a846abaSRich Felker static void j2_flush_icache(void *args)
285a846abaSRich Felker {
295a846abaSRich Felker 	unsigned cpu;
305a846abaSRich Felker 	for_each_possible_cpu(cpu)
315a846abaSRich Felker 		__raw_writel(CACHE_ENABLE | ICACHE_FLUSH, j2_ccr_base + cpu);
325a846abaSRich Felker }
335a846abaSRich Felker 
j2_flush_dcache(void * args)345a846abaSRich Felker static void j2_flush_dcache(void *args)
355a846abaSRich Felker {
365a846abaSRich Felker 	unsigned cpu;
375a846abaSRich Felker 	for_each_possible_cpu(cpu)
385a846abaSRich Felker 		__raw_writel(CACHE_ENABLE | DCACHE_FLUSH, j2_ccr_base + cpu);
395a846abaSRich Felker }
405a846abaSRich Felker 
j2_flush_both(void * args)415a846abaSRich Felker static void j2_flush_both(void *args)
425a846abaSRich Felker {
435a846abaSRich Felker 	unsigned cpu;
445a846abaSRich Felker 	for_each_possible_cpu(cpu)
455a846abaSRich Felker 		__raw_writel(CACHE_ENABLE | CACHE_FLUSH, j2_ccr_base + cpu);
465a846abaSRich Felker }
475a846abaSRich Felker 
j2_cache_init(void)485a846abaSRich Felker void __init j2_cache_init(void)
495a846abaSRich Felker {
505a846abaSRich Felker 	if (!j2_ccr_base)
515a846abaSRich Felker 		return;
525a846abaSRich Felker 
535a846abaSRich Felker 	local_flush_cache_all = j2_flush_both;
545a846abaSRich Felker 	local_flush_cache_mm = j2_flush_both;
555a846abaSRich Felker 	local_flush_cache_dup_mm = j2_flush_both;
565a846abaSRich Felker 	local_flush_cache_page = j2_flush_both;
575a846abaSRich Felker 	local_flush_cache_range = j2_flush_both;
58*157efa29SMatthew Wilcox (Oracle) 	local_flush_dcache_folio = j2_flush_dcache;
595a846abaSRich Felker 	local_flush_icache_range = j2_flush_icache;
60*157efa29SMatthew Wilcox (Oracle) 	local_flush_icache_folio = j2_flush_icache;
615a846abaSRich Felker 	local_flush_cache_sigtramp = j2_flush_icache;
625a846abaSRich Felker 
635a846abaSRich Felker 	pr_info("Initial J2 CCR is %.8x\n", __raw_readl(j2_ccr_base));
645a846abaSRich Felker }
65