xref: /linux/arch/sh/kernel/setup.c (revision d39d0ed196aa1685bb24771e92f78633c66ac9cb)
1 /*
2  * arch/sh/kernel/setup.c
3  *
4  * This file handles the architecture-dependent parts of initialization
5  *
6  *  Copyright (C) 1999  Niibe Yutaka
7  *  Copyright (C) 2002 - 2010 Paul Mundt
8  */
9 #include <linux/screen_info.h>
10 #include <linux/ioport.h>
11 #include <linux/init.h>
12 #include <linux/initrd.h>
13 #include <linux/bootmem.h>
14 #include <linux/console.h>
15 #include <linux/seq_file.h>
16 #include <linux/root_dev.h>
17 #include <linux/utsname.h>
18 #include <linux/nodemask.h>
19 #include <linux/cpu.h>
20 #include <linux/pfn.h>
21 #include <linux/fs.h>
22 #include <linux/mm.h>
23 #include <linux/kexec.h>
24 #include <linux/module.h>
25 #include <linux/smp.h>
26 #include <linux/err.h>
27 #include <linux/crash_dump.h>
28 #include <linux/mmzone.h>
29 #include <linux/clk.h>
30 #include <linux/delay.h>
31 #include <linux/platform_device.h>
32 #include <linux/memblock.h>
33 #include <asm/uaccess.h>
34 #include <asm/io.h>
35 #include <asm/page.h>
36 #include <asm/elf.h>
37 #include <asm/sections.h>
38 #include <asm/irq.h>
39 #include <asm/setup.h>
40 #include <asm/clock.h>
41 #include <asm/smp.h>
42 #include <asm/mmu_context.h>
43 #include <asm/mmzone.h>
44 
45 /*
46  * Initialize loops_per_jiffy as 10000000 (1000MIPS).
47  * This value will be used at the very early stage of serial setup.
48  * The bigger value means no problem.
49  */
50 struct sh_cpuinfo cpu_data[NR_CPUS] __read_mostly = {
51 	[0] = {
52 		.type			= CPU_SH_NONE,
53 		.family			= CPU_FAMILY_UNKNOWN,
54 		.loops_per_jiffy	= 10000000,
55 	},
56 };
57 EXPORT_SYMBOL(cpu_data);
58 
59 /*
60  * The machine vector. First entry in .machvec.init, or clobbered by
61  * sh_mv= on the command line, prior to .machvec.init teardown.
62  */
63 struct sh_machine_vector sh_mv = { .mv_name = "generic", };
64 EXPORT_SYMBOL(sh_mv);
65 
66 #ifdef CONFIG_VT
67 struct screen_info screen_info;
68 #endif
69 
70 extern int root_mountflags;
71 
72 #define RAMDISK_IMAGE_START_MASK	0x07FF
73 #define RAMDISK_PROMPT_FLAG		0x8000
74 #define RAMDISK_LOAD_FLAG		0x4000
75 
76 static char __initdata command_line[COMMAND_LINE_SIZE] = { 0, };
77 
78 static struct resource code_resource = {
79 	.name = "Kernel code",
80 	.flags = IORESOURCE_BUSY | IORESOURCE_MEM,
81 };
82 
83 static struct resource data_resource = {
84 	.name = "Kernel data",
85 	.flags = IORESOURCE_BUSY | IORESOURCE_MEM,
86 };
87 
88 static struct resource bss_resource = {
89 	.name	= "Kernel bss",
90 	.flags	= IORESOURCE_BUSY | IORESOURCE_MEM,
91 };
92 
93 unsigned long memory_start;
94 EXPORT_SYMBOL(memory_start);
95 unsigned long memory_end = 0;
96 EXPORT_SYMBOL(memory_end);
97 unsigned long memory_limit = 0;
98 
99 static struct resource mem_resources[MAX_NUMNODES];
100 
101 int l1i_cache_shape, l1d_cache_shape, l2_cache_shape;
102 
103 static int __init early_parse_mem(char *p)
104 {
105 	if (!p)
106 		return 1;
107 
108 	memory_limit = PAGE_ALIGN(memparse(p, &p));
109 
110 	pr_notice("Memory limited to %ldMB\n", memory_limit >> 20);
111 
112 	return 0;
113 }
114 early_param("mem", early_parse_mem);
115 
116 void __init check_for_initrd(void)
117 {
118 #ifdef CONFIG_BLK_DEV_INITRD
119 	unsigned long start, end;
120 
121 	/*
122 	 * Check for the rare cases where boot loaders adhere to the boot
123 	 * ABI.
124 	 */
125 	if (!LOADER_TYPE || !INITRD_START || !INITRD_SIZE)
126 		goto disable;
127 
128 	start = INITRD_START + __MEMORY_START;
129 	end = start + INITRD_SIZE;
130 
131 	if (unlikely(end <= start))
132 		goto disable;
133 	if (unlikely(start & ~PAGE_MASK)) {
134 		pr_err("initrd must be page aligned\n");
135 		goto disable;
136 	}
137 
138 	if (unlikely(start < PAGE_OFFSET)) {
139 		pr_err("initrd start < PAGE_OFFSET\n");
140 		goto disable;
141 	}
142 
143 	if (unlikely(end > memblock_end_of_DRAM())) {
144 		pr_err("initrd extends beyond end of memory "
145 		       "(0x%08lx > 0x%08lx)\ndisabling initrd\n",
146 		       end, (unsigned long)memblock_end_of_DRAM());
147 		goto disable;
148 	}
149 
150 	/*
151 	 * If we got this far inspite of the boot loader's best efforts
152 	 * to the contrary, assume we actually have a valid initrd and
153 	 * fix up the root dev.
154 	 */
155 	ROOT_DEV = Root_RAM0;
156 
157 	/*
158 	 * Address sanitization
159 	 */
160 	initrd_start = (unsigned long)__va(__pa(start));
161 	initrd_end = initrd_start + INITRD_SIZE;
162 
163 	memblock_reserve(__pa(initrd_start), INITRD_SIZE);
164 
165 	return;
166 
167 disable:
168 	pr_info("initrd disabled\n");
169 	initrd_start = initrd_end = 0;
170 #endif
171 }
172 
173 void __cpuinit calibrate_delay(void)
174 {
175 	struct clk *clk = clk_get(NULL, "cpu_clk");
176 
177 	if (IS_ERR(clk))
178 		panic("Need a sane CPU clock definition!");
179 
180 	loops_per_jiffy = (clk_get_rate(clk) >> 1) / HZ;
181 
182 	printk(KERN_INFO "Calibrating delay loop (skipped)... "
183 			 "%lu.%02lu BogoMIPS PRESET (lpj=%lu)\n",
184 			 loops_per_jiffy/(500000/HZ),
185 			 (loops_per_jiffy/(5000/HZ)) % 100,
186 			 loops_per_jiffy);
187 }
188 
189 void __init __add_active_range(unsigned int nid, unsigned long start_pfn,
190 						unsigned long end_pfn)
191 {
192 	struct resource *res = &mem_resources[nid];
193 	unsigned long start, end;
194 
195 	WARN_ON(res->name); /* max one active range per node for now */
196 
197 	start = start_pfn << PAGE_SHIFT;
198 	end = end_pfn << PAGE_SHIFT;
199 
200 	res->name = "System RAM";
201 	res->start = start;
202 	res->end = end - 1;
203 	res->flags = IORESOURCE_MEM | IORESOURCE_BUSY;
204 
205 	if (request_resource(&iomem_resource, res)) {
206 		pr_err("unable to request memory_resource 0x%lx 0x%lx\n",
207 		       start_pfn, end_pfn);
208 		return;
209 	}
210 
211 	/*
212 	 *  We don't know which RAM region contains kernel data,
213 	 *  so we try it repeatedly and let the resource manager
214 	 *  test it.
215 	 */
216 	request_resource(res, &code_resource);
217 	request_resource(res, &data_resource);
218 	request_resource(res, &bss_resource);
219 
220 	/*
221 	 * Also make sure that there is a PMB mapping that covers this
222 	 * range before we attempt to activate it, to avoid reset by MMU.
223 	 * We can hit this path with NUMA or memory hot-add.
224 	 */
225 	pmb_bolt_mapping((unsigned long)__va(start), start, end - start,
226 			 PAGE_KERNEL);
227 
228 	add_active_range(nid, start_pfn, end_pfn);
229 }
230 
231 void __init __weak plat_early_device_setup(void)
232 {
233 }
234 
235 void __init setup_arch(char **cmdline_p)
236 {
237 	enable_mmu();
238 
239 	ROOT_DEV = old_decode_dev(ORIG_ROOT_DEV);
240 
241 	printk(KERN_NOTICE "Boot params:\n"
242 			   "... MOUNT_ROOT_RDONLY - %08lx\n"
243 			   "... RAMDISK_FLAGS     - %08lx\n"
244 			   "... ORIG_ROOT_DEV     - %08lx\n"
245 			   "... LOADER_TYPE       - %08lx\n"
246 			   "... INITRD_START      - %08lx\n"
247 			   "... INITRD_SIZE       - %08lx\n",
248 			   MOUNT_ROOT_RDONLY, RAMDISK_FLAGS,
249 			   ORIG_ROOT_DEV, LOADER_TYPE,
250 			   INITRD_START, INITRD_SIZE);
251 
252 #ifdef CONFIG_BLK_DEV_RAM
253 	rd_image_start = RAMDISK_FLAGS & RAMDISK_IMAGE_START_MASK;
254 	rd_prompt = ((RAMDISK_FLAGS & RAMDISK_PROMPT_FLAG) != 0);
255 	rd_doload = ((RAMDISK_FLAGS & RAMDISK_LOAD_FLAG) != 0);
256 #endif
257 
258 	if (!MOUNT_ROOT_RDONLY)
259 		root_mountflags &= ~MS_RDONLY;
260 	init_mm.start_code = (unsigned long) _text;
261 	init_mm.end_code = (unsigned long) _etext;
262 	init_mm.end_data = (unsigned long) _edata;
263 	init_mm.brk = (unsigned long) _end;
264 
265 	code_resource.start = virt_to_phys(_text);
266 	code_resource.end = virt_to_phys(_etext)-1;
267 	data_resource.start = virt_to_phys(_etext);
268 	data_resource.end = virt_to_phys(_edata)-1;
269 	bss_resource.start = virt_to_phys(__bss_start);
270 	bss_resource.end = virt_to_phys(_ebss)-1;
271 
272 #ifdef CONFIG_CMDLINE_OVERWRITE
273 	strlcpy(command_line, CONFIG_CMDLINE, sizeof(command_line));
274 #else
275 	strlcpy(command_line, COMMAND_LINE, sizeof(command_line));
276 #ifdef CONFIG_CMDLINE_EXTEND
277 	strlcat(command_line, " ", sizeof(command_line));
278 	strlcat(command_line, CONFIG_CMDLINE, sizeof(command_line));
279 #endif
280 #endif
281 
282 	/* Save unparsed command line copy for /proc/cmdline */
283 	memcpy(boot_command_line, command_line, COMMAND_LINE_SIZE);
284 	*cmdline_p = command_line;
285 
286 	parse_early_param();
287 
288 	plat_early_device_setup();
289 
290 	sh_mv_setup();
291 
292 	/* Let earlyprintk output early console messages */
293 	early_platform_driver_probe("earlyprintk", 1, 1);
294 
295 	paging_init();
296 
297 #ifdef CONFIG_DUMMY_CONSOLE
298 	conswitchp = &dummy_con;
299 #endif
300 
301 	/* Perform the machine specific initialisation */
302 	if (likely(sh_mv.mv_setup))
303 		sh_mv.mv_setup(cmdline_p);
304 
305 	plat_smp_setup();
306 }
307 
308 /* processor boot mode configuration */
309 int generic_mode_pins(void)
310 {
311 	pr_warning("generic_mode_pins(): missing mode pin configuration\n");
312 	return 0;
313 }
314 
315 int test_mode_pin(int pin)
316 {
317 	return sh_mv.mv_mode_pins() & pin;
318 }
319 
320 static const char *cpu_name[] = {
321 	[CPU_SH7201]	= "SH7201",
322 	[CPU_SH7203]	= "SH7203",	[CPU_SH7263]	= "SH7263",
323 	[CPU_SH7206]	= "SH7206",	[CPU_SH7619]	= "SH7619",
324 	[CPU_SH7705]	= "SH7705",	[CPU_SH7706]	= "SH7706",
325 	[CPU_SH7707]	= "SH7707",	[CPU_SH7708]	= "SH7708",
326 	[CPU_SH7709]	= "SH7709",	[CPU_SH7710]	= "SH7710",
327 	[CPU_SH7712]	= "SH7712",	[CPU_SH7720]	= "SH7720",
328 	[CPU_SH7721]	= "SH7721",	[CPU_SH7729]	= "SH7729",
329 	[CPU_SH7750]	= "SH7750",	[CPU_SH7750S]	= "SH7750S",
330 	[CPU_SH7750R]	= "SH7750R",	[CPU_SH7751]	= "SH7751",
331 	[CPU_SH7751R]	= "SH7751R",	[CPU_SH7760]	= "SH7760",
332 	[CPU_SH4_202]	= "SH4-202",	[CPU_SH4_501]	= "SH4-501",
333 	[CPU_SH7763]	= "SH7763",	[CPU_SH7770]	= "SH7770",
334 	[CPU_SH7780]	= "SH7780",	[CPU_SH7781]	= "SH7781",
335 	[CPU_SH7343]	= "SH7343",	[CPU_SH7785]	= "SH7785",
336 	[CPU_SH7786]	= "SH7786",	[CPU_SH7757]	= "SH7757",
337 	[CPU_SH7722]	= "SH7722",	[CPU_SHX3]	= "SH-X3",
338 	[CPU_SH5_101]	= "SH5-101",	[CPU_SH5_103]	= "SH5-103",
339 	[CPU_MXG]	= "MX-G",	[CPU_SH7723]	= "SH7723",
340 	[CPU_SH7366]	= "SH7366",	[CPU_SH7724]	= "SH7724",
341 	[CPU_SH_NONE]	= "Unknown"
342 };
343 
344 const char *get_cpu_subtype(struct sh_cpuinfo *c)
345 {
346 	return cpu_name[c->type];
347 }
348 EXPORT_SYMBOL(get_cpu_subtype);
349 
350 #ifdef CONFIG_PROC_FS
351 /* Symbolic CPU flags, keep in sync with asm/cpu-features.h */
352 static const char *cpu_flags[] = {
353 	"none", "fpu", "p2flush", "mmuassoc", "dsp", "perfctr",
354 	"ptea", "llsc", "l2", "op32", "pteaex", NULL
355 };
356 
357 static void show_cpuflags(struct seq_file *m, struct sh_cpuinfo *c)
358 {
359 	unsigned long i;
360 
361 	seq_printf(m, "cpu flags\t:");
362 
363 	if (!c->flags) {
364 		seq_printf(m, " %s\n", cpu_flags[0]);
365 		return;
366 	}
367 
368 	for (i = 0; cpu_flags[i]; i++)
369 		if ((c->flags & (1 << i)))
370 			seq_printf(m, " %s", cpu_flags[i+1]);
371 
372 	seq_printf(m, "\n");
373 }
374 
375 static void show_cacheinfo(struct seq_file *m, const char *type,
376 			   struct cache_info info)
377 {
378 	unsigned int cache_size;
379 
380 	cache_size = info.ways * info.sets * info.linesz;
381 
382 	seq_printf(m, "%s size\t: %2dKiB (%d-way)\n",
383 		   type, cache_size >> 10, info.ways);
384 }
385 
386 /*
387  *	Get CPU information for use by the procfs.
388  */
389 static int show_cpuinfo(struct seq_file *m, void *v)
390 {
391 	struct sh_cpuinfo *c = v;
392 	unsigned int cpu = c - cpu_data;
393 
394 	if (!cpu_online(cpu))
395 		return 0;
396 
397 	if (cpu == 0)
398 		seq_printf(m, "machine\t\t: %s\n", get_system_type());
399 	else
400 		seq_printf(m, "\n");
401 
402 	seq_printf(m, "processor\t: %d\n", cpu);
403 	seq_printf(m, "cpu family\t: %s\n", init_utsname()->machine);
404 	seq_printf(m, "cpu type\t: %s\n", get_cpu_subtype(c));
405 	if (c->cut_major == -1)
406 		seq_printf(m, "cut\t\t: unknown\n");
407 	else if (c->cut_minor == -1)
408 		seq_printf(m, "cut\t\t: %d.x\n", c->cut_major);
409 	else
410 		seq_printf(m, "cut\t\t: %d.%d\n", c->cut_major, c->cut_minor);
411 
412 	show_cpuflags(m, c);
413 
414 	seq_printf(m, "cache type\t: ");
415 
416 	/*
417 	 * Check for what type of cache we have, we support both the
418 	 * unified cache on the SH-2 and SH-3, as well as the harvard
419 	 * style cache on the SH-4.
420 	 */
421 	if (c->icache.flags & SH_CACHE_COMBINED) {
422 		seq_printf(m, "unified\n");
423 		show_cacheinfo(m, "cache", c->icache);
424 	} else {
425 		seq_printf(m, "split (harvard)\n");
426 		show_cacheinfo(m, "icache", c->icache);
427 		show_cacheinfo(m, "dcache", c->dcache);
428 	}
429 
430 	/* Optional secondary cache */
431 	if (c->flags & CPU_HAS_L2_CACHE)
432 		show_cacheinfo(m, "scache", c->scache);
433 
434 	seq_printf(m, "bogomips\t: %lu.%02lu\n",
435 		     c->loops_per_jiffy/(500000/HZ),
436 		     (c->loops_per_jiffy/(5000/HZ)) % 100);
437 
438 	return 0;
439 }
440 
441 static void *c_start(struct seq_file *m, loff_t *pos)
442 {
443 	return *pos < NR_CPUS ? cpu_data + *pos : NULL;
444 }
445 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
446 {
447 	++*pos;
448 	return c_start(m, pos);
449 }
450 static void c_stop(struct seq_file *m, void *v)
451 {
452 }
453 const struct seq_operations cpuinfo_op = {
454 	.start	= c_start,
455 	.next	= c_next,
456 	.stop	= c_stop,
457 	.show	= show_cpuinfo,
458 };
459 #endif /* CONFIG_PROC_FS */
460