1 /* 2 * arch/sh/kernel/setup.c 3 * 4 * This file handles the architecture-dependent parts of initialization 5 * 6 * Copyright (C) 1999 Niibe Yutaka 7 * Copyright (C) 2002 - 2010 Paul Mundt 8 */ 9 #include <linux/screen_info.h> 10 #include <linux/ioport.h> 11 #include <linux/init.h> 12 #include <linux/initrd.h> 13 #include <linux/bootmem.h> 14 #include <linux/console.h> 15 #include <linux/seq_file.h> 16 #include <linux/root_dev.h> 17 #include <linux/utsname.h> 18 #include <linux/nodemask.h> 19 #include <linux/cpu.h> 20 #include <linux/pfn.h> 21 #include <linux/fs.h> 22 #include <linux/mm.h> 23 #include <linux/kexec.h> 24 #include <linux/module.h> 25 #include <linux/smp.h> 26 #include <linux/err.h> 27 #include <linux/crash_dump.h> 28 #include <linux/mmzone.h> 29 #include <linux/clk.h> 30 #include <linux/delay.h> 31 #include <linux/platform_device.h> 32 #include <linux/memblock.h> 33 #include <asm/uaccess.h> 34 #include <asm/io.h> 35 #include <asm/page.h> 36 #include <asm/elf.h> 37 #include <asm/sections.h> 38 #include <asm/irq.h> 39 #include <asm/setup.h> 40 #include <asm/clock.h> 41 #include <asm/smp.h> 42 #include <asm/mmu_context.h> 43 #include <asm/mmzone.h> 44 #include <asm/sparsemem.h> 45 46 /* 47 * Initialize loops_per_jiffy as 10000000 (1000MIPS). 48 * This value will be used at the very early stage of serial setup. 49 * The bigger value means no problem. 50 */ 51 struct sh_cpuinfo cpu_data[NR_CPUS] __read_mostly = { 52 [0] = { 53 .type = CPU_SH_NONE, 54 .family = CPU_FAMILY_UNKNOWN, 55 .loops_per_jiffy = 10000000, 56 .phys_bits = MAX_PHYSMEM_BITS, 57 }, 58 }; 59 EXPORT_SYMBOL(cpu_data); 60 61 /* 62 * The machine vector. First entry in .machvec.init, or clobbered by 63 * sh_mv= on the command line, prior to .machvec.init teardown. 64 */ 65 struct sh_machine_vector sh_mv = { .mv_name = "generic", }; 66 EXPORT_SYMBOL(sh_mv); 67 68 #ifdef CONFIG_VT 69 struct screen_info screen_info; 70 #endif 71 72 extern int root_mountflags; 73 74 #define RAMDISK_IMAGE_START_MASK 0x07FF 75 #define RAMDISK_PROMPT_FLAG 0x8000 76 #define RAMDISK_LOAD_FLAG 0x4000 77 78 static char __initdata command_line[COMMAND_LINE_SIZE] = { 0, }; 79 80 static struct resource code_resource = { 81 .name = "Kernel code", 82 .flags = IORESOURCE_BUSY | IORESOURCE_MEM, 83 }; 84 85 static struct resource data_resource = { 86 .name = "Kernel data", 87 .flags = IORESOURCE_BUSY | IORESOURCE_MEM, 88 }; 89 90 static struct resource bss_resource = { 91 .name = "Kernel bss", 92 .flags = IORESOURCE_BUSY | IORESOURCE_MEM, 93 }; 94 95 unsigned long memory_start; 96 EXPORT_SYMBOL(memory_start); 97 unsigned long memory_end = 0; 98 EXPORT_SYMBOL(memory_end); 99 unsigned long memory_limit = 0; 100 101 static struct resource mem_resources[MAX_NUMNODES]; 102 103 int l1i_cache_shape, l1d_cache_shape, l2_cache_shape; 104 105 static int __init early_parse_mem(char *p) 106 { 107 if (!p) 108 return 1; 109 110 memory_limit = PAGE_ALIGN(memparse(p, &p)); 111 112 pr_notice("Memory limited to %ldMB\n", memory_limit >> 20); 113 114 return 0; 115 } 116 early_param("mem", early_parse_mem); 117 118 void __init check_for_initrd(void) 119 { 120 #ifdef CONFIG_BLK_DEV_INITRD 121 unsigned long start, end; 122 123 /* 124 * Check for the rare cases where boot loaders adhere to the boot 125 * ABI. 126 */ 127 if (!LOADER_TYPE || !INITRD_START || !INITRD_SIZE) 128 goto disable; 129 130 start = INITRD_START + __MEMORY_START; 131 end = start + INITRD_SIZE; 132 133 if (unlikely(end <= start)) 134 goto disable; 135 if (unlikely(start & ~PAGE_MASK)) { 136 pr_err("initrd must be page aligned\n"); 137 goto disable; 138 } 139 140 if (unlikely(start < __MEMORY_START)) { 141 pr_err("initrd start (%08lx) < __MEMORY_START(%x)\n", 142 start, __MEMORY_START); 143 goto disable; 144 } 145 146 if (unlikely(end > memblock_end_of_DRAM())) { 147 pr_err("initrd extends beyond end of memory " 148 "(0x%08lx > 0x%08lx)\ndisabling initrd\n", 149 end, (unsigned long)memblock_end_of_DRAM()); 150 goto disable; 151 } 152 153 /* 154 * If we got this far inspite of the boot loader's best efforts 155 * to the contrary, assume we actually have a valid initrd and 156 * fix up the root dev. 157 */ 158 ROOT_DEV = Root_RAM0; 159 160 /* 161 * Address sanitization 162 */ 163 initrd_start = (unsigned long)__va(start); 164 initrd_end = initrd_start + INITRD_SIZE; 165 166 memblock_reserve(__pa(initrd_start), INITRD_SIZE); 167 168 return; 169 170 disable: 171 pr_info("initrd disabled\n"); 172 initrd_start = initrd_end = 0; 173 #endif 174 } 175 176 void __cpuinit calibrate_delay(void) 177 { 178 struct clk *clk = clk_get(NULL, "cpu_clk"); 179 180 if (IS_ERR(clk)) 181 panic("Need a sane CPU clock definition!"); 182 183 loops_per_jiffy = (clk_get_rate(clk) >> 1) / HZ; 184 185 printk(KERN_INFO "Calibrating delay loop (skipped)... " 186 "%lu.%02lu BogoMIPS PRESET (lpj=%lu)\n", 187 loops_per_jiffy/(500000/HZ), 188 (loops_per_jiffy/(5000/HZ)) % 100, 189 loops_per_jiffy); 190 } 191 192 void __init __add_active_range(unsigned int nid, unsigned long start_pfn, 193 unsigned long end_pfn) 194 { 195 struct resource *res = &mem_resources[nid]; 196 unsigned long start, end; 197 198 WARN_ON(res->name); /* max one active range per node for now */ 199 200 start = start_pfn << PAGE_SHIFT; 201 end = end_pfn << PAGE_SHIFT; 202 203 res->name = "System RAM"; 204 res->start = start; 205 res->end = end - 1; 206 res->flags = IORESOURCE_MEM | IORESOURCE_BUSY; 207 208 if (request_resource(&iomem_resource, res)) { 209 pr_err("unable to request memory_resource 0x%lx 0x%lx\n", 210 start_pfn, end_pfn); 211 return; 212 } 213 214 /* 215 * We don't know which RAM region contains kernel data, 216 * so we try it repeatedly and let the resource manager 217 * test it. 218 */ 219 request_resource(res, &code_resource); 220 request_resource(res, &data_resource); 221 request_resource(res, &bss_resource); 222 223 /* 224 * Also make sure that there is a PMB mapping that covers this 225 * range before we attempt to activate it, to avoid reset by MMU. 226 * We can hit this path with NUMA or memory hot-add. 227 */ 228 pmb_bolt_mapping((unsigned long)__va(start), start, end - start, 229 PAGE_KERNEL); 230 231 add_active_range(nid, start_pfn, end_pfn); 232 } 233 234 void __init __weak plat_early_device_setup(void) 235 { 236 } 237 238 void __init setup_arch(char **cmdline_p) 239 { 240 enable_mmu(); 241 242 ROOT_DEV = old_decode_dev(ORIG_ROOT_DEV); 243 244 printk(KERN_NOTICE "Boot params:\n" 245 "... MOUNT_ROOT_RDONLY - %08lx\n" 246 "... RAMDISK_FLAGS - %08lx\n" 247 "... ORIG_ROOT_DEV - %08lx\n" 248 "... LOADER_TYPE - %08lx\n" 249 "... INITRD_START - %08lx\n" 250 "... INITRD_SIZE - %08lx\n", 251 MOUNT_ROOT_RDONLY, RAMDISK_FLAGS, 252 ORIG_ROOT_DEV, LOADER_TYPE, 253 INITRD_START, INITRD_SIZE); 254 255 #ifdef CONFIG_BLK_DEV_RAM 256 rd_image_start = RAMDISK_FLAGS & RAMDISK_IMAGE_START_MASK; 257 rd_prompt = ((RAMDISK_FLAGS & RAMDISK_PROMPT_FLAG) != 0); 258 rd_doload = ((RAMDISK_FLAGS & RAMDISK_LOAD_FLAG) != 0); 259 #endif 260 261 if (!MOUNT_ROOT_RDONLY) 262 root_mountflags &= ~MS_RDONLY; 263 init_mm.start_code = (unsigned long) _text; 264 init_mm.end_code = (unsigned long) _etext; 265 init_mm.end_data = (unsigned long) _edata; 266 init_mm.brk = (unsigned long) _end; 267 268 code_resource.start = virt_to_phys(_text); 269 code_resource.end = virt_to_phys(_etext)-1; 270 data_resource.start = virt_to_phys(_etext); 271 data_resource.end = virt_to_phys(_edata)-1; 272 bss_resource.start = virt_to_phys(__bss_start); 273 bss_resource.end = virt_to_phys(_ebss)-1; 274 275 #ifdef CONFIG_CMDLINE_OVERWRITE 276 strlcpy(command_line, CONFIG_CMDLINE, sizeof(command_line)); 277 #else 278 strlcpy(command_line, COMMAND_LINE, sizeof(command_line)); 279 #ifdef CONFIG_CMDLINE_EXTEND 280 strlcat(command_line, " ", sizeof(command_line)); 281 strlcat(command_line, CONFIG_CMDLINE, sizeof(command_line)); 282 #endif 283 #endif 284 285 /* Save unparsed command line copy for /proc/cmdline */ 286 memcpy(boot_command_line, command_line, COMMAND_LINE_SIZE); 287 *cmdline_p = command_line; 288 289 parse_early_param(); 290 291 plat_early_device_setup(); 292 293 sh_mv_setup(); 294 295 /* Let earlyprintk output early console messages */ 296 early_platform_driver_probe("earlyprintk", 1, 1); 297 298 paging_init(); 299 300 #ifdef CONFIG_DUMMY_CONSOLE 301 conswitchp = &dummy_con; 302 #endif 303 304 /* Perform the machine specific initialisation */ 305 if (likely(sh_mv.mv_setup)) 306 sh_mv.mv_setup(cmdline_p); 307 308 plat_smp_setup(); 309 } 310 311 /* processor boot mode configuration */ 312 int generic_mode_pins(void) 313 { 314 pr_warning("generic_mode_pins(): missing mode pin configuration\n"); 315 return 0; 316 } 317 318 int test_mode_pin(int pin) 319 { 320 return sh_mv.mv_mode_pins() & pin; 321 } 322 323 static const char *cpu_name[] = { 324 [CPU_SH7201] = "SH7201", 325 [CPU_SH7203] = "SH7203", [CPU_SH7263] = "SH7263", 326 [CPU_SH7206] = "SH7206", [CPU_SH7619] = "SH7619", 327 [CPU_SH7705] = "SH7705", [CPU_SH7706] = "SH7706", 328 [CPU_SH7707] = "SH7707", [CPU_SH7708] = "SH7708", 329 [CPU_SH7709] = "SH7709", [CPU_SH7710] = "SH7710", 330 [CPU_SH7712] = "SH7712", [CPU_SH7720] = "SH7720", 331 [CPU_SH7721] = "SH7721", [CPU_SH7729] = "SH7729", 332 [CPU_SH7750] = "SH7750", [CPU_SH7750S] = "SH7750S", 333 [CPU_SH7750R] = "SH7750R", [CPU_SH7751] = "SH7751", 334 [CPU_SH7751R] = "SH7751R", [CPU_SH7760] = "SH7760", 335 [CPU_SH4_202] = "SH4-202", [CPU_SH4_501] = "SH4-501", 336 [CPU_SH7763] = "SH7763", [CPU_SH7770] = "SH7770", 337 [CPU_SH7780] = "SH7780", [CPU_SH7781] = "SH7781", 338 [CPU_SH7343] = "SH7343", [CPU_SH7785] = "SH7785", 339 [CPU_SH7786] = "SH7786", [CPU_SH7757] = "SH7757", 340 [CPU_SH7722] = "SH7722", [CPU_SHX3] = "SH-X3", 341 [CPU_SH5_101] = "SH5-101", [CPU_SH5_103] = "SH5-103", 342 [CPU_MXG] = "MX-G", [CPU_SH7723] = "SH7723", 343 [CPU_SH7366] = "SH7366", [CPU_SH7724] = "SH7724", 344 [CPU_SH_NONE] = "Unknown" 345 }; 346 347 const char *get_cpu_subtype(struct sh_cpuinfo *c) 348 { 349 return cpu_name[c->type]; 350 } 351 EXPORT_SYMBOL(get_cpu_subtype); 352 353 #ifdef CONFIG_PROC_FS 354 /* Symbolic CPU flags, keep in sync with asm/cpu-features.h */ 355 static const char *cpu_flags[] = { 356 "none", "fpu", "p2flush", "mmuassoc", "dsp", "perfctr", 357 "ptea", "llsc", "l2", "op32", "pteaex", NULL 358 }; 359 360 static void show_cpuflags(struct seq_file *m, struct sh_cpuinfo *c) 361 { 362 unsigned long i; 363 364 seq_printf(m, "cpu flags\t:"); 365 366 if (!c->flags) { 367 seq_printf(m, " %s\n", cpu_flags[0]); 368 return; 369 } 370 371 for (i = 0; cpu_flags[i]; i++) 372 if ((c->flags & (1 << i))) 373 seq_printf(m, " %s", cpu_flags[i+1]); 374 375 seq_printf(m, "\n"); 376 } 377 378 static void show_cacheinfo(struct seq_file *m, const char *type, 379 struct cache_info info) 380 { 381 unsigned int cache_size; 382 383 cache_size = info.ways * info.sets * info.linesz; 384 385 seq_printf(m, "%s size\t: %2dKiB (%d-way)\n", 386 type, cache_size >> 10, info.ways); 387 } 388 389 /* 390 * Get CPU information for use by the procfs. 391 */ 392 static int show_cpuinfo(struct seq_file *m, void *v) 393 { 394 struct sh_cpuinfo *c = v; 395 unsigned int cpu = c - cpu_data; 396 397 if (!cpu_online(cpu)) 398 return 0; 399 400 if (cpu == 0) 401 seq_printf(m, "machine\t\t: %s\n", get_system_type()); 402 else 403 seq_printf(m, "\n"); 404 405 seq_printf(m, "processor\t: %d\n", cpu); 406 seq_printf(m, "cpu family\t: %s\n", init_utsname()->machine); 407 seq_printf(m, "cpu type\t: %s\n", get_cpu_subtype(c)); 408 if (c->cut_major == -1) 409 seq_printf(m, "cut\t\t: unknown\n"); 410 else if (c->cut_minor == -1) 411 seq_printf(m, "cut\t\t: %d.x\n", c->cut_major); 412 else 413 seq_printf(m, "cut\t\t: %d.%d\n", c->cut_major, c->cut_minor); 414 415 show_cpuflags(m, c); 416 417 seq_printf(m, "cache type\t: "); 418 419 /* 420 * Check for what type of cache we have, we support both the 421 * unified cache on the SH-2 and SH-3, as well as the harvard 422 * style cache on the SH-4. 423 */ 424 if (c->icache.flags & SH_CACHE_COMBINED) { 425 seq_printf(m, "unified\n"); 426 show_cacheinfo(m, "cache", c->icache); 427 } else { 428 seq_printf(m, "split (harvard)\n"); 429 show_cacheinfo(m, "icache", c->icache); 430 show_cacheinfo(m, "dcache", c->dcache); 431 } 432 433 /* Optional secondary cache */ 434 if (c->flags & CPU_HAS_L2_CACHE) 435 show_cacheinfo(m, "scache", c->scache); 436 437 seq_printf(m, "address sizes\t: %u bits physical\n", c->phys_bits); 438 439 seq_printf(m, "bogomips\t: %lu.%02lu\n", 440 c->loops_per_jiffy/(500000/HZ), 441 (c->loops_per_jiffy/(5000/HZ)) % 100); 442 443 return 0; 444 } 445 446 static void *c_start(struct seq_file *m, loff_t *pos) 447 { 448 return *pos < NR_CPUS ? cpu_data + *pos : NULL; 449 } 450 static void *c_next(struct seq_file *m, void *v, loff_t *pos) 451 { 452 ++*pos; 453 return c_start(m, pos); 454 } 455 static void c_stop(struct seq_file *m, void *v) 456 { 457 } 458 const struct seq_operations cpuinfo_op = { 459 .start = c_start, 460 .next = c_next, 461 .stop = c_stop, 462 .show = show_cpuinfo, 463 }; 464 #endif /* CONFIG_PROC_FS */ 465