1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * arch/sh/kernel/cpu/sh4a/clock-sh7770.c 4 * 5 * SH7770 support for the clock framework 6 * 7 * Copyright (C) 2005 Paul Mundt 8 */ 9 #include <linux/init.h> 10 #include <linux/kernel.h> 11 #include <asm/clock.h> 12 #include <asm/freq.h> 13 #include <asm/io.h> 14 15 static int ifc_divisors[] = { 1, 1, 1, 1, 1, 1, 1, 1 }; 16 static int bfc_divisors[] = { 1, 1, 1, 1, 1, 8,12, 1 }; 17 static int pfc_divisors[] = { 1, 8, 1,10,12,16, 1, 1 }; 18 19 static void master_clk_init(struct clk *clk) 20 { 21 clk->rate *= pfc_divisors[(__raw_readl(FRQCR) >> 28) & 0x000f]; 22 } 23 24 static struct sh_clk_ops sh7770_master_clk_ops = { 25 .init = master_clk_init, 26 }; 27 28 static unsigned long module_clk_recalc(struct clk *clk) 29 { 30 int idx = ((__raw_readl(FRQCR) >> 28) & 0x000f); 31 return clk->parent->rate / pfc_divisors[idx]; 32 } 33 34 static struct sh_clk_ops sh7770_module_clk_ops = { 35 .recalc = module_clk_recalc, 36 }; 37 38 static unsigned long bus_clk_recalc(struct clk *clk) 39 { 40 int idx = (__raw_readl(FRQCR) & 0x000f); 41 return clk->parent->rate / bfc_divisors[idx]; 42 } 43 44 static struct sh_clk_ops sh7770_bus_clk_ops = { 45 .recalc = bus_clk_recalc, 46 }; 47 48 static unsigned long cpu_clk_recalc(struct clk *clk) 49 { 50 int idx = ((__raw_readl(FRQCR) >> 24) & 0x000f); 51 return clk->parent->rate / ifc_divisors[idx]; 52 } 53 54 static struct sh_clk_ops sh7770_cpu_clk_ops = { 55 .recalc = cpu_clk_recalc, 56 }; 57 58 static struct sh_clk_ops *sh7770_clk_ops[] = { 59 &sh7770_master_clk_ops, 60 &sh7770_module_clk_ops, 61 &sh7770_bus_clk_ops, 62 &sh7770_cpu_clk_ops, 63 }; 64 65 void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx) 66 { 67 if (idx < ARRAY_SIZE(sh7770_clk_ops)) 68 *ops = sh7770_clk_ops[idx]; 69 } 70 71