1 /* 2 * SH7206 Setup 3 * 4 * Copyright (C) 2006 Yoshinori Sato 5 * 6 * This file is subject to the terms and conditions of the GNU General Public 7 * License. See the file "COPYING" in the main directory of this archive 8 * for more details. 9 */ 10 #include <linux/platform_device.h> 11 #include <linux/init.h> 12 #include <linux/serial.h> 13 #include <asm/sci.h> 14 15 static struct plat_sci_port sci_platform_data[] = { 16 { 17 .mapbase = 0xfffe8000, 18 .flags = UPF_BOOT_AUTOCONF, 19 .type = PORT_SCIF, 20 .irqs = { 241, 242, 243, 240}, 21 }, { 22 .mapbase = 0xfffe8800, 23 .flags = UPF_BOOT_AUTOCONF, 24 .type = PORT_SCIF, 25 .irqs = { 247, 244, 245, 246}, 26 }, { 27 .mapbase = 0xfffe9000, 28 .flags = UPF_BOOT_AUTOCONF, 29 .type = PORT_SCIF, 30 .irqs = { 249, 250, 251, 248}, 31 }, { 32 .mapbase = 0xfffe9800, 33 .flags = UPF_BOOT_AUTOCONF, 34 .type = PORT_SCIF, 35 .irqs = { 253, 254, 255, 252}, 36 }, { 37 .flags = 0, 38 } 39 }; 40 41 static struct platform_device sci_device = { 42 .name = "sh-sci", 43 .id = -1, 44 .dev = { 45 .platform_data = sci_platform_data, 46 }, 47 }; 48 49 static struct platform_device *sh7206_devices[] __initdata = { 50 &sci_device, 51 }; 52 53 static int __init sh7206_devices_setup(void) 54 { 55 return platform_add_devices(sh7206_devices, 56 ARRAY_SIZE(sh7206_devices)); 57 } 58 __initcall(sh7206_devices_setup); 59 60 #define INTC_IPR08 0xfffe0c04UL 61 #define INTC_IPR09 0xfffe0c06UL 62 #define INTC_IPR14 0xfffe0c10UL 63 64 #define CMI0_IRQ 140 65 66 #define MTU1_TGI1A 164 67 68 #define SCIF0_BRI_IRQ 240 69 #define SCIF0_ERI_IRQ 241 70 #define SCIF0_RXI_IRQ 242 71 #define SCIF0_TXI_IRQ 243 72 73 #define SCIF1_BRI_IRQ 244 74 #define SCIF1_ERI_IRQ 245 75 #define SCIF1_RXI_IRQ 246 76 #define SCIF1_TXI_IRQ 247 77 78 #define SCIF2_BRI_IRQ 248 79 #define SCIF2_ERI_IRQ 249 80 #define SCIF2_RXI_IRQ 250 81 #define SCIF2_TXI_IRQ 251 82 83 #define SCIF3_BRI_IRQ 252 84 #define SCIF3_ERI_IRQ 253 85 #define SCIF3_RXI_IRQ 254 86 #define SCIF3_TXI_IRQ 255 87 88 static struct ipr_data sh7206_ipr_map[] = { 89 { CMI0_IRQ, INTC_IPR08, 3, 2 }, 90 { MTU2_TGI1A, INTC_IPR09, 1, 2 }, 91 { SCIF0_ERI_IRQ, INTC_IPR14, 3, 3 }, 92 { SCIF0_RXI_IRQ, INTC_IPR14, 3, 3 }, 93 { SCIF0_BRI_IRQ, INTC_IPR14, 3, 3 }, 94 { SCIF0_TXI_IRQ, INTC_IPR14, 3, 3 }, 95 { SCIF1_ERI_IRQ, INTC_IPR14, 2, 3 }, 96 { SCIF1_RXI_IRQ, INTC_IPR14, 2, 3 }, 97 { SCIF1_BRI_IRQ, INTC_IPR14, 2, 3 }, 98 { SCIF1_TXI_IRQ, INTC_IPR14, 2, 3 }, 99 { SCIF2_ERI_IRQ, INTC_IPR14, 1, 3 }, 100 { SCIF2_RXI_IRQ, INTC_IPR14, 1, 3 }, 101 { SCIF2_BRI_IRQ, INTC_IPR14, 1, 3 }, 102 { SCIF2_TXI_IRQ, INTC_IPR14, 1, 3 }, 103 { SCIF3_ERI_IRQ, INTC_IPR14, 0, 3 }, 104 { SCIF3_RXI_IRQ, INTC_IPR14, 0, 3 }, 105 { SCIF3_BRI_IRQ, INTC_IPR14, 0, 3 }, 106 { SCIF3_TXI_IRQ, INTC_IPR14, 0, 3 }, 107 }; 108 109 void __init init_IRQ_ipr(void) 110 { 111 make_ipr_irq(sh7206_ipr_map, ARRAY_SIZE(sh7206_ipr_map)); 112 } 113