1f15cbe6fSPaul Mundt /* include/asm-sh/dreamcast/sysasic.h 2f15cbe6fSPaul Mundt * 3f15cbe6fSPaul Mundt * Definitions for the Dreamcast System ASIC and related peripherals. 4f15cbe6fSPaul Mundt * 5f15cbe6fSPaul Mundt * Copyright (c) 2001 M. R. Brown <mrbrown@linuxdc.org> 6f15cbe6fSPaul Mundt * Copyright (C) 2003 Paul Mundt <lethal@linux-sh.org> 7f15cbe6fSPaul Mundt * 8f15cbe6fSPaul Mundt * This file is part of the LinuxDC project (www.linuxdc.org) 9f15cbe6fSPaul Mundt * 10f15cbe6fSPaul Mundt * Released under the terms of the GNU GPL v2.0. 11f15cbe6fSPaul Mundt * 12f15cbe6fSPaul Mundt */ 13f15cbe6fSPaul Mundt #ifndef __ASM_SH_DREAMCAST_SYSASIC_H 14f15cbe6fSPaul Mundt #define __ASM_SH_DREAMCAST_SYSASIC_H 15f15cbe6fSPaul Mundt 16f15cbe6fSPaul Mundt #include <asm/irq.h> 17f15cbe6fSPaul Mundt 18f15cbe6fSPaul Mundt /* Hardware events - 19f15cbe6fSPaul Mundt 20f15cbe6fSPaul Mundt Each of these events correspond to a bit within the Event Mask Registers/ 21f15cbe6fSPaul Mundt Event Status Registers. Because of the virtual IRQ numbering scheme, a 22f15cbe6fSPaul Mundt base offset must be used when calculating the virtual IRQ that each event 23f15cbe6fSPaul Mundt takes. 24f15cbe6fSPaul Mundt */ 25f15cbe6fSPaul Mundt 26f15cbe6fSPaul Mundt #define HW_EVENT_IRQ_BASE 48 27f15cbe6fSPaul Mundt 28f15cbe6fSPaul Mundt /* IRQ 13 */ 29f15cbe6fSPaul Mundt #define HW_EVENT_VSYNC (HW_EVENT_IRQ_BASE + 5) /* VSync */ 30f15cbe6fSPaul Mundt #define HW_EVENT_MAPLE_DMA (HW_EVENT_IRQ_BASE + 12) /* Maple DMA complete */ 31f15cbe6fSPaul Mundt #define HW_EVENT_GDROM_DMA (HW_EVENT_IRQ_BASE + 14) /* GD-ROM DMA complete */ 32f15cbe6fSPaul Mundt #define HW_EVENT_G2_DMA (HW_EVENT_IRQ_BASE + 15) /* G2 DMA complete */ 33f15cbe6fSPaul Mundt #define HW_EVENT_PVR2_DMA (HW_EVENT_IRQ_BASE + 19) /* PVR2 DMA complete */ 34f15cbe6fSPaul Mundt 35f15cbe6fSPaul Mundt /* IRQ 11 */ 36f15cbe6fSPaul Mundt #define HW_EVENT_GDROM_CMD (HW_EVENT_IRQ_BASE + 32) /* GD-ROM cmd. complete */ 37f15cbe6fSPaul Mundt #define HW_EVENT_AICA_SYS (HW_EVENT_IRQ_BASE + 33) /* AICA-related */ 38f15cbe6fSPaul Mundt #define HW_EVENT_EXTERNAL (HW_EVENT_IRQ_BASE + 35) /* Ext. (expansion) */ 39f15cbe6fSPaul Mundt 40f15cbe6fSPaul Mundt #define HW_EVENT_IRQ_MAX (HW_EVENT_IRQ_BASE + 95) 41f15cbe6fSPaul Mundt 42*deb9b22bSPaul Mundt /* arch/sh/boards/mach-dreamcast/irq.c */ 43*deb9b22bSPaul Mundt extern int systemasic_irq_demux(int); 44*deb9b22bSPaul Mundt extern void systemasic_irq_init(void); 45*deb9b22bSPaul Mundt extern void aica_time_init(void); 46*deb9b22bSPaul Mundt 47f15cbe6fSPaul Mundt #endif /* __ASM_SH_DREAMCAST_SYSASIC_H */ 48f15cbe6fSPaul Mundt 49