xref: /linux/arch/sh/include/mach-dreamcast/mach/sysasic.h (revision cdd5b5a9761fd66d17586e4f4ba6588c70e640ea)
16a0abce4SKuninori Morimoto /* SPDX-License-Identifier: GPL-2.0
26a0abce4SKuninori Morimoto  *
36a0abce4SKuninori Morimoto  * include/asm-sh/dreamcast/sysasic.h
4f15cbe6fSPaul Mundt  *
5f15cbe6fSPaul Mundt  * Definitions for the Dreamcast System ASIC and related peripherals.
6f15cbe6fSPaul Mundt  *
7f15cbe6fSPaul Mundt  * Copyright (c) 2001 M. R. Brown <mrbrown@linuxdc.org>
8f15cbe6fSPaul Mundt  * Copyright (C) 2003 Paul Mundt <lethal@linux-sh.org>
9f15cbe6fSPaul Mundt  *
10f15cbe6fSPaul Mundt  * This file is part of the LinuxDC project (www.linuxdc.org)
11f15cbe6fSPaul Mundt  */
12f15cbe6fSPaul Mundt #ifndef __ASM_SH_DREAMCAST_SYSASIC_H
13f15cbe6fSPaul Mundt #define __ASM_SH_DREAMCAST_SYSASIC_H
14f15cbe6fSPaul Mundt 
15f15cbe6fSPaul Mundt #include <asm/irq.h>
16f15cbe6fSPaul Mundt 
17f15cbe6fSPaul Mundt /* Hardware events -
18f15cbe6fSPaul Mundt 
19f15cbe6fSPaul Mundt    Each of these events correspond to a bit within the Event Mask Registers/
20f15cbe6fSPaul Mundt    Event Status Registers.  Because of the virtual IRQ numbering scheme, a
21f15cbe6fSPaul Mundt    base offset must be used when calculating the virtual IRQ that each event
22f15cbe6fSPaul Mundt    takes.
23f15cbe6fSPaul Mundt */
24f15cbe6fSPaul Mundt 
25*a8ac2961SSergey Shtylyov #define HW_EVENT_IRQ_BASE  (48 + 16)
26f15cbe6fSPaul Mundt 
27f15cbe6fSPaul Mundt /* IRQ 13 */
28f15cbe6fSPaul Mundt #define HW_EVENT_VSYNC     (HW_EVENT_IRQ_BASE +  5) /* VSync */
29f15cbe6fSPaul Mundt #define HW_EVENT_MAPLE_DMA (HW_EVENT_IRQ_BASE + 12) /* Maple DMA complete */
30f15cbe6fSPaul Mundt #define HW_EVENT_GDROM_DMA (HW_EVENT_IRQ_BASE + 14) /* GD-ROM DMA complete */
31f15cbe6fSPaul Mundt #define HW_EVENT_G2_DMA    (HW_EVENT_IRQ_BASE + 15) /* G2 DMA complete */
32f15cbe6fSPaul Mundt #define HW_EVENT_PVR2_DMA  (HW_EVENT_IRQ_BASE + 19) /* PVR2 DMA complete */
33f15cbe6fSPaul Mundt 
34f15cbe6fSPaul Mundt /* IRQ 11 */
35f15cbe6fSPaul Mundt #define HW_EVENT_GDROM_CMD (HW_EVENT_IRQ_BASE + 32) /* GD-ROM cmd. complete */
36f15cbe6fSPaul Mundt #define HW_EVENT_AICA_SYS  (HW_EVENT_IRQ_BASE + 33) /* AICA-related */
37f15cbe6fSPaul Mundt #define HW_EVENT_EXTERNAL  (HW_EVENT_IRQ_BASE + 35) /* Ext. (expansion) */
38f15cbe6fSPaul Mundt 
39f15cbe6fSPaul Mundt #define HW_EVENT_IRQ_MAX (HW_EVENT_IRQ_BASE + 95)
40f15cbe6fSPaul Mundt 
41deb9b22bSPaul Mundt /* arch/sh/boards/mach-dreamcast/irq.c */
42deb9b22bSPaul Mundt extern int systemasic_irq_demux(int);
43deb9b22bSPaul Mundt extern void systemasic_irq_init(void);
44deb9b22bSPaul Mundt 
45f15cbe6fSPaul Mundt #endif /* __ASM_SH_DREAMCAST_SYSASIC_H */
46f15cbe6fSPaul Mundt 
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