1 #ifndef __ASM_SH_PGTABLE_32_H 2 #define __ASM_SH_PGTABLE_32_H 3 4 /* 5 * Linux PTEL encoding. 6 * 7 * Hardware and software bit definitions for the PTEL value (see below for 8 * notes on SH-X2 MMUs and 64-bit PTEs): 9 * 10 * - Bits 0 and 7 are reserved on SH-3 (_PAGE_WT and _PAGE_SZ1 on SH-4). 11 * 12 * - Bit 1 is the SH-bit, but is unused on SH-3 due to an MMU bug (the 13 * hardware PTEL value can't have the SH-bit set when MMUCR.IX is set, 14 * which is the default in cpu-sh3/mmu_context.h:MMU_CONTROL_INIT). 15 * 16 * In order to keep this relatively clean, do not use these for defining 17 * SH-3 specific flags until all of the other unused bits have been 18 * exhausted. 19 * 20 * - Bit 9 is reserved by everyone and used by _PAGE_PROTNONE. 21 * 22 * - Bits 10 and 11 are low bits of the PPN that are reserved on >= 4K pages. 23 * Bit 10 is used for _PAGE_ACCESSED, and bit 11 is used for _PAGE_SPECIAL. 24 * 25 * - On 29 bit platforms, bits 31 to 29 are used for the space attributes 26 * and timing control which (together with bit 0) are moved into the 27 * old-style PTEA on the parts that support it. 28 * 29 * XXX: Leave the _PAGE_FILE and _PAGE_WT overhaul for a rainy day. 30 * 31 * SH-X2 MMUs and extended PTEs 32 * 33 * SH-X2 supports an extended mode TLB with split data arrays due to the 34 * number of bits needed for PR and SZ (now EPR and ESZ) encodings. The PR and 35 * SZ bit placeholders still exist in data array 1, but are implemented as 36 * reserved bits, with the real logic existing in data array 2. 37 * 38 * The downside to this is that we can no longer fit everything in to a 32-bit 39 * PTE encoding, so a 64-bit pte_t is necessary for these parts. On the plus 40 * side, this gives us quite a few spare bits to play with for future usage. 41 */ 42 /* Legacy and compat mode bits */ 43 #define _PAGE_WT 0x001 /* WT-bit on SH-4, 0 on SH-3 */ 44 #define _PAGE_HW_SHARED 0x002 /* SH-bit : shared among processes */ 45 #define _PAGE_DIRTY 0x004 /* D-bit : page changed */ 46 #define _PAGE_CACHABLE 0x008 /* C-bit : cachable */ 47 #define _PAGE_SZ0 0x010 /* SZ0-bit : Size of page */ 48 #define _PAGE_RW 0x020 /* PR0-bit : write access allowed */ 49 #define _PAGE_USER 0x040 /* PR1-bit : user space access allowed*/ 50 #define _PAGE_SZ1 0x080 /* SZ1-bit : Size of page (on SH-4) */ 51 #define _PAGE_PRESENT 0x100 /* V-bit : page is valid */ 52 #define _PAGE_PROTNONE 0x200 /* software: if not present */ 53 #define _PAGE_ACCESSED 0x400 /* software: page referenced */ 54 #define _PAGE_FILE _PAGE_WT /* software: pagecache or swap? */ 55 #define _PAGE_SPECIAL 0x800 /* software: special page */ 56 57 #define _PAGE_SZ_MASK (_PAGE_SZ0 | _PAGE_SZ1) 58 #define _PAGE_PR_MASK (_PAGE_RW | _PAGE_USER) 59 60 /* Extended mode bits */ 61 #define _PAGE_EXT_ESZ0 0x0010 /* ESZ0-bit: Size of page */ 62 #define _PAGE_EXT_ESZ1 0x0020 /* ESZ1-bit: Size of page */ 63 #define _PAGE_EXT_ESZ2 0x0040 /* ESZ2-bit: Size of page */ 64 #define _PAGE_EXT_ESZ3 0x0080 /* ESZ3-bit: Size of page */ 65 66 #define _PAGE_EXT_USER_EXEC 0x0100 /* EPR0-bit: User space executable */ 67 #define _PAGE_EXT_USER_WRITE 0x0200 /* EPR1-bit: User space writable */ 68 #define _PAGE_EXT_USER_READ 0x0400 /* EPR2-bit: User space readable */ 69 70 #define _PAGE_EXT_KERN_EXEC 0x0800 /* EPR3-bit: Kernel space executable */ 71 #define _PAGE_EXT_KERN_WRITE 0x1000 /* EPR4-bit: Kernel space writable */ 72 #define _PAGE_EXT_KERN_READ 0x2000 /* EPR5-bit: Kernel space readable */ 73 74 /* Wrapper for extended mode pgprot twiddling */ 75 #define _PAGE_EXT(x) ((unsigned long long)(x) << 32) 76 77 /* software: moves to PTEA.TC (Timing Control) */ 78 #define _PAGE_PCC_AREA5 0x00000000 /* use BSC registers for area5 */ 79 #define _PAGE_PCC_AREA6 0x80000000 /* use BSC registers for area6 */ 80 81 /* software: moves to PTEA.SA[2:0] (Space Attributes) */ 82 #define _PAGE_PCC_IODYN 0x00000001 /* IO space, dynamically sized bus */ 83 #define _PAGE_PCC_IO8 0x20000000 /* IO space, 8 bit bus */ 84 #define _PAGE_PCC_IO16 0x20000001 /* IO space, 16 bit bus */ 85 #define _PAGE_PCC_COM8 0x40000000 /* Common Memory space, 8 bit bus */ 86 #define _PAGE_PCC_COM16 0x40000001 /* Common Memory space, 16 bit bus */ 87 #define _PAGE_PCC_ATR8 0x60000000 /* Attribute Memory space, 8 bit bus */ 88 #define _PAGE_PCC_ATR16 0x60000001 /* Attribute Memory space, 6 bit bus */ 89 90 /* Mask which drops unused bits from the PTEL value */ 91 #if defined(CONFIG_CPU_SH3) 92 #define _PAGE_CLEAR_FLAGS (_PAGE_PROTNONE | _PAGE_ACCESSED| \ 93 _PAGE_FILE | _PAGE_SZ1 | \ 94 _PAGE_HW_SHARED) 95 #elif defined(CONFIG_X2TLB) 96 /* Get rid of the legacy PR/SZ bits when using extended mode */ 97 #define _PAGE_CLEAR_FLAGS (_PAGE_PROTNONE | _PAGE_ACCESSED | \ 98 _PAGE_FILE | _PAGE_PR_MASK | _PAGE_SZ_MASK) 99 #else 100 #define _PAGE_CLEAR_FLAGS (_PAGE_PROTNONE | _PAGE_ACCESSED | _PAGE_FILE) 101 #endif 102 103 #define _PAGE_FLAGS_HARDWARE_MASK (PHYS_ADDR_MASK & ~(_PAGE_CLEAR_FLAGS)) 104 105 /* Hardware flags, page size encoding */ 106 #if !defined(CONFIG_MMU) 107 # define _PAGE_FLAGS_HARD 0ULL 108 #elif defined(CONFIG_X2TLB) 109 # if defined(CONFIG_PAGE_SIZE_4KB) 110 # define _PAGE_FLAGS_HARD _PAGE_EXT(_PAGE_EXT_ESZ0) 111 # elif defined(CONFIG_PAGE_SIZE_8KB) 112 # define _PAGE_FLAGS_HARD _PAGE_EXT(_PAGE_EXT_ESZ1) 113 # elif defined(CONFIG_PAGE_SIZE_64KB) 114 # define _PAGE_FLAGS_HARD _PAGE_EXT(_PAGE_EXT_ESZ2) 115 # endif 116 #else 117 # if defined(CONFIG_PAGE_SIZE_4KB) 118 # define _PAGE_FLAGS_HARD _PAGE_SZ0 119 # elif defined(CONFIG_PAGE_SIZE_64KB) 120 # define _PAGE_FLAGS_HARD _PAGE_SZ1 121 # endif 122 #endif 123 124 #if defined(CONFIG_X2TLB) 125 # if defined(CONFIG_HUGETLB_PAGE_SIZE_64K) 126 # define _PAGE_SZHUGE (_PAGE_EXT_ESZ2) 127 # elif defined(CONFIG_HUGETLB_PAGE_SIZE_256K) 128 # define _PAGE_SZHUGE (_PAGE_EXT_ESZ0 | _PAGE_EXT_ESZ2) 129 # elif defined(CONFIG_HUGETLB_PAGE_SIZE_1MB) 130 # define _PAGE_SZHUGE (_PAGE_EXT_ESZ0 | _PAGE_EXT_ESZ1 | _PAGE_EXT_ESZ2) 131 # elif defined(CONFIG_HUGETLB_PAGE_SIZE_4MB) 132 # define _PAGE_SZHUGE (_PAGE_EXT_ESZ3) 133 # elif defined(CONFIG_HUGETLB_PAGE_SIZE_64MB) 134 # define _PAGE_SZHUGE (_PAGE_EXT_ESZ2 | _PAGE_EXT_ESZ3) 135 # endif 136 #else 137 # if defined(CONFIG_HUGETLB_PAGE_SIZE_64K) 138 # define _PAGE_SZHUGE (_PAGE_SZ1) 139 # elif defined(CONFIG_HUGETLB_PAGE_SIZE_1MB) 140 # define _PAGE_SZHUGE (_PAGE_SZ0 | _PAGE_SZ1) 141 # endif 142 #endif 143 144 /* 145 * Stub out _PAGE_SZHUGE if we don't have a good definition for it, 146 * to make pte_mkhuge() happy. 147 */ 148 #ifndef _PAGE_SZHUGE 149 # define _PAGE_SZHUGE (_PAGE_FLAGS_HARD) 150 #endif 151 152 /* 153 * Mask of bits that are to be preserved accross pgprot changes. 154 */ 155 #define _PAGE_CHG_MASK \ 156 (PTE_MASK | _PAGE_ACCESSED | _PAGE_CACHABLE | \ 157 _PAGE_DIRTY | _PAGE_SPECIAL) 158 159 #ifndef __ASSEMBLY__ 160 161 #if defined(CONFIG_X2TLB) /* SH-X2 TLB */ 162 #define PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_CACHABLE | \ 163 _PAGE_ACCESSED | _PAGE_FLAGS_HARD) 164 165 #define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \ 166 _PAGE_CACHABLE | _PAGE_FLAGS_HARD | \ 167 _PAGE_EXT(_PAGE_EXT_KERN_READ | \ 168 _PAGE_EXT_KERN_WRITE | \ 169 _PAGE_EXT_USER_READ | \ 170 _PAGE_EXT_USER_WRITE)) 171 172 #define PAGE_EXECREAD __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \ 173 _PAGE_CACHABLE | _PAGE_FLAGS_HARD | \ 174 _PAGE_EXT(_PAGE_EXT_KERN_EXEC | \ 175 _PAGE_EXT_KERN_READ | \ 176 _PAGE_EXT_USER_EXEC | \ 177 _PAGE_EXT_USER_READ)) 178 179 #define PAGE_COPY PAGE_EXECREAD 180 181 #define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \ 182 _PAGE_CACHABLE | _PAGE_FLAGS_HARD | \ 183 _PAGE_EXT(_PAGE_EXT_KERN_READ | \ 184 _PAGE_EXT_USER_READ)) 185 186 #define PAGE_WRITEONLY __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \ 187 _PAGE_CACHABLE | _PAGE_FLAGS_HARD | \ 188 _PAGE_EXT(_PAGE_EXT_KERN_WRITE | \ 189 _PAGE_EXT_USER_WRITE)) 190 191 #define PAGE_RWX __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \ 192 _PAGE_CACHABLE | _PAGE_FLAGS_HARD | \ 193 _PAGE_EXT(_PAGE_EXT_KERN_WRITE | \ 194 _PAGE_EXT_KERN_READ | \ 195 _PAGE_EXT_KERN_EXEC | \ 196 _PAGE_EXT_USER_WRITE | \ 197 _PAGE_EXT_USER_READ | \ 198 _PAGE_EXT_USER_EXEC)) 199 200 #define PAGE_KERNEL __pgprot(_PAGE_PRESENT | _PAGE_CACHABLE | \ 201 _PAGE_DIRTY | _PAGE_ACCESSED | \ 202 _PAGE_HW_SHARED | _PAGE_FLAGS_HARD | \ 203 _PAGE_EXT(_PAGE_EXT_KERN_READ | \ 204 _PAGE_EXT_KERN_WRITE | \ 205 _PAGE_EXT_KERN_EXEC)) 206 207 #define PAGE_KERNEL_NOCACHE \ 208 __pgprot(_PAGE_PRESENT | _PAGE_DIRTY | \ 209 _PAGE_ACCESSED | _PAGE_HW_SHARED | \ 210 _PAGE_FLAGS_HARD | \ 211 _PAGE_EXT(_PAGE_EXT_KERN_READ | \ 212 _PAGE_EXT_KERN_WRITE | \ 213 _PAGE_EXT_KERN_EXEC)) 214 215 #define PAGE_KERNEL_RO __pgprot(_PAGE_PRESENT | _PAGE_CACHABLE | \ 216 _PAGE_DIRTY | _PAGE_ACCESSED | \ 217 _PAGE_HW_SHARED | _PAGE_FLAGS_HARD | \ 218 _PAGE_EXT(_PAGE_EXT_KERN_READ | \ 219 _PAGE_EXT_KERN_EXEC)) 220 221 #define PAGE_KERNEL_PCC(slot, type) \ 222 __pgprot(_PAGE_PRESENT | _PAGE_DIRTY | \ 223 _PAGE_ACCESSED | _PAGE_FLAGS_HARD | \ 224 _PAGE_EXT(_PAGE_EXT_KERN_READ | \ 225 _PAGE_EXT_KERN_WRITE | \ 226 _PAGE_EXT_KERN_EXEC) \ 227 (slot ? _PAGE_PCC_AREA5 : _PAGE_PCC_AREA6) | \ 228 (type)) 229 230 #elif defined(CONFIG_MMU) /* SH-X TLB */ 231 #define PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_CACHABLE | \ 232 _PAGE_ACCESSED | _PAGE_FLAGS_HARD) 233 234 #define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | \ 235 _PAGE_CACHABLE | _PAGE_ACCESSED | \ 236 _PAGE_FLAGS_HARD) 237 238 #define PAGE_COPY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_CACHABLE | \ 239 _PAGE_ACCESSED | _PAGE_FLAGS_HARD) 240 241 #define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_CACHABLE | \ 242 _PAGE_ACCESSED | _PAGE_FLAGS_HARD) 243 244 #define PAGE_EXECREAD PAGE_READONLY 245 #define PAGE_RWX PAGE_SHARED 246 #define PAGE_WRITEONLY PAGE_SHARED 247 248 #define PAGE_KERNEL __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_CACHABLE | \ 249 _PAGE_DIRTY | _PAGE_ACCESSED | \ 250 _PAGE_HW_SHARED | _PAGE_FLAGS_HARD) 251 252 #define PAGE_KERNEL_NOCACHE \ 253 __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | \ 254 _PAGE_ACCESSED | _PAGE_HW_SHARED | \ 255 _PAGE_FLAGS_HARD) 256 257 #define PAGE_KERNEL_RO __pgprot(_PAGE_PRESENT | _PAGE_CACHABLE | \ 258 _PAGE_DIRTY | _PAGE_ACCESSED | \ 259 _PAGE_HW_SHARED | _PAGE_FLAGS_HARD) 260 261 #define PAGE_KERNEL_PCC(slot, type) \ 262 __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | \ 263 _PAGE_ACCESSED | _PAGE_FLAGS_HARD | \ 264 (slot ? _PAGE_PCC_AREA5 : _PAGE_PCC_AREA6) | \ 265 (type)) 266 #else /* no mmu */ 267 #define PAGE_NONE __pgprot(0) 268 #define PAGE_SHARED __pgprot(0) 269 #define PAGE_COPY __pgprot(0) 270 #define PAGE_EXECREAD __pgprot(0) 271 #define PAGE_RWX __pgprot(0) 272 #define PAGE_READONLY __pgprot(0) 273 #define PAGE_WRITEONLY __pgprot(0) 274 #define PAGE_KERNEL __pgprot(0) 275 #define PAGE_KERNEL_NOCACHE __pgprot(0) 276 #define PAGE_KERNEL_RO __pgprot(0) 277 278 #define PAGE_KERNEL_PCC(slot, type) \ 279 __pgprot(0) 280 #endif 281 282 #endif /* __ASSEMBLY__ */ 283 284 #ifndef __ASSEMBLY__ 285 286 /* 287 * Certain architectures need to do special things when PTEs 288 * within a page table are directly modified. Thus, the following 289 * hook is made available. 290 */ 291 #ifdef CONFIG_X2TLB 292 static inline void set_pte(pte_t *ptep, pte_t pte) 293 { 294 ptep->pte_high = pte.pte_high; 295 smp_wmb(); 296 ptep->pte_low = pte.pte_low; 297 } 298 #else 299 #define set_pte(pteptr, pteval) (*(pteptr) = pteval) 300 #endif 301 302 #define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval) 303 304 /* 305 * (pmds are folded into pgds so this doesn't get actually called, 306 * but the define is needed for a generic inline function.) 307 */ 308 #define set_pmd(pmdptr, pmdval) (*(pmdptr) = pmdval) 309 310 #define pfn_pte(pfn, prot) \ 311 __pte(((unsigned long long)(pfn) << PAGE_SHIFT) | pgprot_val(prot)) 312 #define pfn_pmd(pfn, prot) \ 313 __pmd(((unsigned long long)(pfn) << PAGE_SHIFT) | pgprot_val(prot)) 314 315 #define pte_none(x) (!pte_val(x)) 316 #define pte_present(x) ((x).pte_low & (_PAGE_PRESENT | _PAGE_PROTNONE)) 317 318 #define pte_clear(mm,addr,xp) do { set_pte_at(mm, addr, xp, __pte(0)); } while (0) 319 320 #define pmd_none(x) (!pmd_val(x)) 321 #define pmd_present(x) (pmd_val(x)) 322 #define pmd_clear(xp) do { set_pmd(xp, __pmd(0)); } while (0) 323 #define pmd_bad(x) (pmd_val(x) & ~PAGE_MASK) 324 325 #define pages_to_mb(x) ((x) >> (20-PAGE_SHIFT)) 326 #define pte_page(x) pfn_to_page(pte_pfn(x)) 327 328 /* 329 * The following only work if pte_present() is true. 330 * Undefined behaviour if not.. 331 */ 332 #define pte_not_present(pte) (!((pte).pte_low & _PAGE_PRESENT)) 333 #define pte_dirty(pte) ((pte).pte_low & _PAGE_DIRTY) 334 #define pte_young(pte) ((pte).pte_low & _PAGE_ACCESSED) 335 #define pte_file(pte) ((pte).pte_low & _PAGE_FILE) 336 #define pte_special(pte) ((pte).pte_low & _PAGE_SPECIAL) 337 338 #ifdef CONFIG_X2TLB 339 #define pte_write(pte) ((pte).pte_high & _PAGE_EXT_USER_WRITE) 340 #else 341 #define pte_write(pte) ((pte).pte_low & _PAGE_RW) 342 #endif 343 344 #define PTE_BIT_FUNC(h,fn,op) \ 345 static inline pte_t pte_##fn(pte_t pte) { pte.pte_##h op; return pte; } 346 347 #ifdef CONFIG_X2TLB 348 /* 349 * We cheat a bit in the SH-X2 TLB case. As the permission bits are 350 * individually toggled (and user permissions are entirely decoupled from 351 * kernel permissions), we attempt to couple them a bit more sanely here. 352 */ 353 PTE_BIT_FUNC(high, wrprotect, &= ~_PAGE_EXT_USER_WRITE); 354 PTE_BIT_FUNC(high, mkwrite, |= _PAGE_EXT_USER_WRITE | _PAGE_EXT_KERN_WRITE); 355 PTE_BIT_FUNC(high, mkhuge, |= _PAGE_SZHUGE); 356 #else 357 PTE_BIT_FUNC(low, wrprotect, &= ~_PAGE_RW); 358 PTE_BIT_FUNC(low, mkwrite, |= _PAGE_RW); 359 PTE_BIT_FUNC(low, mkhuge, |= _PAGE_SZHUGE); 360 #endif 361 362 PTE_BIT_FUNC(low, mkclean, &= ~_PAGE_DIRTY); 363 PTE_BIT_FUNC(low, mkdirty, |= _PAGE_DIRTY); 364 PTE_BIT_FUNC(low, mkold, &= ~_PAGE_ACCESSED); 365 PTE_BIT_FUNC(low, mkyoung, |= _PAGE_ACCESSED); 366 PTE_BIT_FUNC(low, mkspecial, |= _PAGE_SPECIAL); 367 368 #define __HAVE_ARCH_PTE_SPECIAL 369 370 /* 371 * Macro and implementation to make a page protection as uncachable. 372 */ 373 #define pgprot_writecombine(prot) \ 374 __pgprot(pgprot_val(prot) & ~_PAGE_CACHABLE) 375 376 #define pgprot_noncached pgprot_writecombine 377 378 /* 379 * Conversion functions: convert a page and protection to a page entry, 380 * and a page entry and page directory to the page they refer to. 381 * 382 * extern pte_t mk_pte(struct page *page, pgprot_t pgprot) 383 */ 384 #define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot)) 385 386 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) 387 { 388 pte.pte_low &= _PAGE_CHG_MASK; 389 pte.pte_low |= pgprot_val(newprot); 390 391 #ifdef CONFIG_X2TLB 392 pte.pte_high |= pgprot_val(newprot) >> 32; 393 #endif 394 395 return pte; 396 } 397 398 #define pmd_page_vaddr(pmd) ((unsigned long)pmd_val(pmd)) 399 #define pmd_page(pmd) (virt_to_page(pmd_val(pmd))) 400 401 /* to find an entry in a page-table-directory. */ 402 #define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1)) 403 #define pgd_offset(mm, address) ((mm)->pgd+pgd_index(address)) 404 405 /* to find an entry in a kernel page-table-directory */ 406 #define pgd_offset_k(address) pgd_offset(&init_mm, address) 407 408 /* Find an entry in the third-level page table.. */ 409 #define pte_index(address) ((address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)) 410 #define pte_offset_kernel(dir, address) \ 411 ((pte_t *) pmd_page_vaddr(*(dir)) + pte_index(address)) 412 #define pte_offset_map(dir, address) pte_offset_kernel(dir, address) 413 #define pte_offset_map_nested(dir, address) pte_offset_kernel(dir, address) 414 415 #define pte_unmap(pte) do { } while (0) 416 #define pte_unmap_nested(pte) do { } while (0) 417 418 #ifdef CONFIG_X2TLB 419 #define pte_ERROR(e) \ 420 printk("%s:%d: bad pte %p(%08lx%08lx).\n", __FILE__, __LINE__, \ 421 &(e), (e).pte_high, (e).pte_low) 422 #define pgd_ERROR(e) \ 423 printk("%s:%d: bad pgd %016llx.\n", __FILE__, __LINE__, pgd_val(e)) 424 #else 425 #define pte_ERROR(e) \ 426 printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e)) 427 #define pgd_ERROR(e) \ 428 printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e)) 429 #endif 430 431 /* 432 * Encode and de-code a swap entry 433 * 434 * Constraints: 435 * _PAGE_FILE at bit 0 436 * _PAGE_PRESENT at bit 8 437 * _PAGE_PROTNONE at bit 9 438 * 439 * For the normal case, we encode the swap type into bits 0:7 and the 440 * swap offset into bits 10:30. For the 64-bit PTE case, we keep the 441 * preserved bits in the low 32-bits and use the upper 32 as the swap 442 * offset (along with a 5-bit type), following the same approach as x86 443 * PAE. This keeps the logic quite simple, and allows for a full 32 444 * PTE_FILE_MAX_BITS, as opposed to the 29-bits we're constrained with 445 * in the pte_low case. 446 * 447 * As is evident by the Alpha code, if we ever get a 64-bit unsigned 448 * long (swp_entry_t) to match up with the 64-bit PTEs, this all becomes 449 * much cleaner.. 450 * 451 * NOTE: We should set ZEROs at the position of _PAGE_PRESENT 452 * and _PAGE_PROTNONE bits 453 */ 454 #ifdef CONFIG_X2TLB 455 #define __swp_type(x) ((x).val & 0x1f) 456 #define __swp_offset(x) ((x).val >> 5) 457 #define __swp_entry(type, offset) ((swp_entry_t){ (type) | (offset) << 5}) 458 #define __pte_to_swp_entry(pte) ((swp_entry_t){ (pte).pte_high }) 459 #define __swp_entry_to_pte(x) ((pte_t){ 0, (x).val }) 460 461 /* 462 * Encode and decode a nonlinear file mapping entry 463 */ 464 #define pte_to_pgoff(pte) ((pte).pte_high) 465 #define pgoff_to_pte(off) ((pte_t) { _PAGE_FILE, (off) }) 466 467 #define PTE_FILE_MAX_BITS 32 468 #else 469 #define __swp_type(x) ((x).val & 0xff) 470 #define __swp_offset(x) ((x).val >> 10) 471 #define __swp_entry(type, offset) ((swp_entry_t){(type) | (offset) <<10}) 472 473 #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) >> 1 }) 474 #define __swp_entry_to_pte(x) ((pte_t) { (x).val << 1 }) 475 476 /* 477 * Encode and decode a nonlinear file mapping entry 478 */ 479 #define PTE_FILE_MAX_BITS 29 480 #define pte_to_pgoff(pte) (pte_val(pte) >> 1) 481 #define pgoff_to_pte(off) ((pte_t) { ((off) << 1) | _PAGE_FILE }) 482 #endif 483 484 #endif /* __ASSEMBLY__ */ 485 #endif /* __ASM_SH_PGTABLE_32_H */ 486