1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef __ASM_SH_PGTABLE_3LEVEL_H 3 #define __ASM_SH_PGTABLE_3LEVEL_H 4 5 #define __ARCH_USE_5LEVEL_HACK 6 #include <asm-generic/pgtable-nopud.h> 7 8 /* 9 * Some cores need a 3-level page table layout, for example when using 10 * 64-bit PTEs and 4K pages. 11 */ 12 #define PAGETABLE_LEVELS 3 13 14 #define PTE_MAGNITUDE 3 /* 64-bit PTEs on SH-X2 TLB */ 15 16 /* PGD bits */ 17 #define PGDIR_SHIFT 30 18 19 #define PTRS_PER_PGD 4 20 #define USER_PTRS_PER_PGD 2 21 22 /* PMD bits */ 23 #define PMD_SHIFT (PAGE_SHIFT + (PAGE_SHIFT - PTE_MAGNITUDE)) 24 #define PMD_SIZE (1UL << PMD_SHIFT) 25 #define PMD_MASK (~(PMD_SIZE-1)) 26 27 #define PTRS_PER_PMD ((1 << PGDIR_SHIFT) / PMD_SIZE) 28 29 #define pmd_ERROR(e) \ 30 printk("%s:%d: bad pmd %016llx.\n", __FILE__, __LINE__, pmd_val(e)) 31 32 typedef struct { unsigned long long pmd; } pmd_t; 33 #define pmd_val(x) ((x).pmd) 34 #define __pmd(x) ((pmd_t) { (x) } ) 35 36 static inline unsigned long pud_page_vaddr(pud_t pud) 37 { 38 return pud_val(pud); 39 } 40 41 /* only used by the stubbed out hugetlb gup code, should never be called */ 42 #define pud_page(pud) NULL 43 44 #define pmd_index(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1)) 45 static inline pmd_t *pmd_offset(pud_t *pud, unsigned long address) 46 { 47 return (pmd_t *)pud_page_vaddr(*pud) + pmd_index(address); 48 } 49 50 #define pud_none(x) (!pud_val(x)) 51 #define pud_present(x) (pud_val(x)) 52 #define pud_clear(xp) do { set_pud(xp, __pud(0)); } while (0) 53 #define pud_bad(x) (pud_val(x) & ~PAGE_MASK) 54 55 /* 56 * (puds are folded into pgds so this doesn't get actually called, 57 * but the define is needed for a generic inline function.) 58 */ 59 #define set_pud(pudptr, pudval) do { *(pudptr) = (pudval); } while(0) 60 61 #endif /* __ASM_SH_PGTABLE_3LEVEL_H */ 62