1 #ifndef __ASM_SH_PCI_H 2 #define __ASM_SH_PCI_H 3 4 #ifdef __KERNEL__ 5 6 #include <linux/dma-mapping.h> 7 8 /* Can be used to override the logic in pci_scan_bus for skipping 9 already-configured bus numbers - to be used for buggy BIOSes 10 or architectures with incomplete PCI setup by the loader */ 11 12 #define pcibios_assign_all_busses() 1 13 #define pcibios_scan_all_fns(a, b) 0 14 15 /* 16 * A board can define one or more PCI channels that represent built-in (or 17 * external) PCI controllers. 18 */ 19 struct pci_channel { 20 int (*init)(struct pci_channel *chan); 21 struct pci_ops *pci_ops; 22 struct resource *io_resource; 23 struct resource *mem_resource; 24 int first_devfn; 25 int last_devfn; 26 int enabled; 27 unsigned long reg_base; 28 unsigned long io_base; 29 }; 30 31 /* 32 * Each board initializes this array and terminates it with a NULL entry. 33 */ 34 extern struct pci_channel board_pci_channels[]; 35 36 /* ugly as hell, but makes drivers/pci/setup-res.c compile and work */ 37 #define __PCI_CHAN(bus) ((struct pci_channel *)bus->sysdata) 38 #define PCIBIOS_MIN_IO __PCI_CHAN(bus)->io_resource->start 39 #define PCIBIOS_MIN_MEM __PCI_CHAN(bus)->mem_resource->start 40 41 struct pci_dev; 42 43 extern void pcibios_set_master(struct pci_dev *dev); 44 45 static inline void pcibios_penalize_isa_irq(int irq, int active) 46 { 47 /* We don't do dynamic PCI IRQ allocation */ 48 } 49 50 /* Dynamic DMA mapping stuff. 51 * SuperH has everything mapped statically like x86. 52 */ 53 54 /* The PCI address space does equal the physical memory 55 * address space. The networking and block device layers use 56 * this boolean for bounce buffer decisions. 57 */ 58 #define PCI_DMA_BUS_IS_PHYS (1) 59 60 #include <linux/types.h> 61 #include <linux/slab.h> 62 #include <asm/scatterlist.h> 63 #include <linux/string.h> 64 #include <asm/io.h> 65 66 /* pci_unmap_{single,page} being a nop depends upon the 67 * configuration. 68 */ 69 #ifdef CONFIG_SH_PCIDMA_NONCOHERENT 70 #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \ 71 dma_addr_t ADDR_NAME; 72 #define DECLARE_PCI_UNMAP_LEN(LEN_NAME) \ 73 __u32 LEN_NAME; 74 #define pci_unmap_addr(PTR, ADDR_NAME) \ 75 ((PTR)->ADDR_NAME) 76 #define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) \ 77 (((PTR)->ADDR_NAME) = (VAL)) 78 #define pci_unmap_len(PTR, LEN_NAME) \ 79 ((PTR)->LEN_NAME) 80 #define pci_unmap_len_set(PTR, LEN_NAME, VAL) \ 81 (((PTR)->LEN_NAME) = (VAL)) 82 #else 83 #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) 84 #define DECLARE_PCI_UNMAP_LEN(LEN_NAME) 85 #define pci_unmap_addr(PTR, ADDR_NAME) (0) 86 #define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0) 87 #define pci_unmap_len(PTR, LEN_NAME) (0) 88 #define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0) 89 #endif 90 91 #ifdef CONFIG_PCI 92 static inline void pci_dma_burst_advice(struct pci_dev *pdev, 93 enum pci_dma_burst_strategy *strat, 94 unsigned long *strategy_parameter) 95 { 96 *strat = PCI_DMA_BURST_INFINITY; 97 *strategy_parameter = ~0UL; 98 } 99 100 static inline int __is_pci_memory(unsigned long phys_addr, unsigned long size) 101 { 102 struct pci_channel *p; 103 struct resource *res; 104 105 for (p = board_pci_channels; p->init; p++) { 106 res = p->mem_resource; 107 if (p->enabled && (phys_addr >= res->start) && 108 (phys_addr + size) <= (res->end + 1)) 109 return 1; 110 } 111 return 0; 112 } 113 114 static inline void __iomem *__get_pci_io_base(unsigned long port, 115 unsigned long size) 116 { 117 struct pci_channel *p; 118 struct resource *res; 119 120 for (p = board_pci_channels; p->init; p++) { 121 res = p->io_resource; 122 if (p->enabled && (port >= res->start) && 123 (port + size) <= (res->end + 1)) 124 return (void __iomem *)(p->io_base + port); 125 } 126 return NULL; 127 } 128 #else 129 static inline int __is_pci_memory(unsigned long phys_addr, unsigned long size) 130 { 131 return 0; 132 } 133 static inline void __iomem *__get_pci_io_base(unsigned long port, 134 unsigned long size) 135 { 136 return NULL; 137 } 138 #endif 139 140 /* Board-specific fixup routines. */ 141 void pcibios_fixup(void); 142 int pcibios_init_platform(void); 143 int pcibios_map_platform_irq(struct pci_dev *dev, u8 slot, u8 pin); 144 145 #ifdef CONFIG_PCI_AUTO 146 int pciauto_assign_resources(int busno, struct pci_channel *hose); 147 #endif 148 149 extern void pcibios_resource_to_bus(struct pci_dev *dev, 150 struct pci_bus_region *region, struct resource *res); 151 152 extern void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res, 153 struct pci_bus_region *region); 154 155 static inline struct resource * 156 pcibios_select_root(struct pci_dev *pdev, struct resource *res) 157 { 158 struct resource *root = NULL; 159 160 if (res->flags & IORESOURCE_IO) 161 root = &ioport_resource; 162 if (res->flags & IORESOURCE_MEM) 163 root = &iomem_resource; 164 165 return root; 166 } 167 168 /* Chances are this interrupt is wired PC-style ... */ 169 static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel) 170 { 171 return channel ? 15 : 14; 172 } 173 174 /* generic DMA-mapping stuff */ 175 #include <asm-generic/pci-dma-compat.h> 176 177 #endif /* __KERNEL__ */ 178 #endif /* __ASM_SH_PCI_H */ 179 180