1 #ifndef __ASM_SH_PCI_H 2 #define __ASM_SH_PCI_H 3 4 #ifdef __KERNEL__ 5 6 /* Can be used to override the logic in pci_scan_bus for skipping 7 already-configured bus numbers - to be used for buggy BIOSes 8 or architectures with incomplete PCI setup by the loader */ 9 10 #define pcibios_assign_all_busses() 1 11 12 /* 13 * A board can define one or more PCI channels that represent built-in (or 14 * external) PCI controllers. 15 */ 16 struct pci_channel { 17 struct pci_channel *next; 18 struct pci_bus *bus; 19 20 struct pci_ops *pci_ops; 21 struct resource *io_resource; 22 struct resource *mem_resource; 23 24 unsigned long io_offset; 25 unsigned long mem_offset; 26 27 unsigned long reg_base; 28 unsigned long io_map_base; 29 30 unsigned int index; 31 unsigned int need_domain_info; 32 }; 33 34 extern void register_pci_controller(struct pci_channel *hose); 35 extern int pci_is_66mhz_capable(struct pci_channel *hose, 36 int top_bus, int current_bus); 37 38 extern unsigned long PCIBIOS_MIN_IO, PCIBIOS_MIN_MEM; 39 40 struct pci_dev; 41 42 #define HAVE_PCI_MMAP 43 extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma, 44 enum pci_mmap_state mmap_state, int write_combine); 45 extern void pcibios_set_master(struct pci_dev *dev); 46 47 static inline void pcibios_penalize_isa_irq(int irq, int active) 48 { 49 /* We don't do dynamic PCI IRQ allocation */ 50 } 51 52 /* Dynamic DMA mapping stuff. 53 * SuperH has everything mapped statically like x86. 54 */ 55 56 /* The PCI address space does equal the physical memory 57 * address space. The networking and block device layers use 58 * this boolean for bounce buffer decisions. 59 */ 60 #define PCI_DMA_BUS_IS_PHYS (dma_ops->is_phys) 61 62 /* pci_unmap_{single,page} being a nop depends upon the 63 * configuration. 64 */ 65 #ifdef CONFIG_DMA_NONCOHERENT 66 #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) dma_addr_t ADDR_NAME; 67 #define DECLARE_PCI_UNMAP_LEN(LEN_NAME) __u32 LEN_NAME; 68 #define pci_unmap_addr(PTR, ADDR_NAME) ((PTR)->ADDR_NAME) 69 #define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) (((PTR)->ADDR_NAME) = (VAL)) 70 #define pci_unmap_len(PTR, LEN_NAME) ((PTR)->LEN_NAME) 71 #define pci_unmap_len_set(PTR, LEN_NAME, VAL) (((PTR)->LEN_NAME) = (VAL)) 72 #else 73 #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) 74 #define DECLARE_PCI_UNMAP_LEN(LEN_NAME) 75 #define pci_unmap_addr(PTR, ADDR_NAME) (0) 76 #define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0) 77 #define pci_unmap_len(PTR, LEN_NAME) (0) 78 #define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0) 79 #endif 80 81 #ifdef CONFIG_PCI 82 /* 83 * None of the SH PCI controllers support MWI, it is always treated as a 84 * direct memory write. 85 */ 86 #define PCI_DISABLE_MWI 87 88 static inline void pci_dma_burst_advice(struct pci_dev *pdev, 89 enum pci_dma_burst_strategy *strat, 90 unsigned long *strategy_parameter) 91 { 92 unsigned long cacheline_size; 93 u8 byte; 94 95 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &byte); 96 97 if (byte == 0) 98 cacheline_size = L1_CACHE_BYTES; 99 else 100 cacheline_size = byte << 2; 101 102 *strat = PCI_DMA_BURST_MULTIPLE; 103 *strategy_parameter = cacheline_size; 104 } 105 #endif 106 107 /* Board-specific fixup routines. */ 108 int pcibios_map_platform_irq(struct pci_dev *dev, u8 slot, u8 pin); 109 110 extern void pcibios_resource_to_bus(struct pci_dev *dev, 111 struct pci_bus_region *region, struct resource *res); 112 113 extern void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res, 114 struct pci_bus_region *region); 115 116 #define pci_domain_nr(bus) ((struct pci_channel *)(bus)->sysdata)->index 117 118 static inline int pci_proc_domain(struct pci_bus *bus) 119 { 120 struct pci_channel *hose = bus->sysdata; 121 return hose->need_domain_info; 122 } 123 124 /* Chances are this interrupt is wired PC-style ... */ 125 static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel) 126 { 127 return channel ? 15 : 14; 128 } 129 130 /* generic DMA-mapping stuff */ 131 #include <asm-generic/pci-dma-compat.h> 132 133 #endif /* __KERNEL__ */ 134 #endif /* __ASM_SH_PCI_H */ 135 136