xref: /linux/arch/sh/include/asm/irq.h (revision bf070bb0e6c62ba3075db0a666763ba52c677102)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef __ASM_SH_IRQ_H
3 #define __ASM_SH_IRQ_H
4 
5 #include <linux/cpumask.h>
6 #include <asm/machvec.h>
7 
8 /*
9  * Only legacy non-sparseirq platforms have to set a reasonably sane
10  * value here. sparseirq platforms allocate their irq_descs on the fly,
11  * so will expand automatically based on the number of registered IRQs.
12  */
13 #ifdef CONFIG_SPARSE_IRQ
14 # define NR_IRQS		8
15 #else
16 # define NR_IRQS		512
17 #endif
18 
19 /*
20  * This is a special IRQ number for indicating that no IRQ has been
21  * triggered and to simply ignore the IRQ dispatch. This is a special
22  * case that can happen with IRQ auto-distribution when multiple CPUs
23  * are woken up and signalled in parallel.
24  */
25 #define NO_IRQ_IGNORE		((unsigned int)-1)
26 
27 /*
28  * Simple Mask Register Support
29  */
30 extern void make_maskreg_irq(unsigned int irq);
31 extern unsigned short *irq_mask_register;
32 
33 /*
34  * PINT IRQs
35  */
36 void init_IRQ_pint(void);
37 void make_imask_irq(unsigned int irq);
38 
39 static inline int generic_irq_demux(int irq)
40 {
41 	return irq;
42 }
43 
44 #define irq_demux(irq)		sh_mv.mv_irq_demux(irq)
45 
46 void init_IRQ(void);
47 void migrate_irqs(void);
48 
49 asmlinkage int do_IRQ(unsigned int irq, struct pt_regs *regs);
50 
51 #ifdef CONFIG_IRQSTACKS
52 extern void irq_ctx_init(int cpu);
53 extern void irq_ctx_exit(int cpu);
54 # define __ARCH_HAS_DO_SOFTIRQ
55 #else
56 # define irq_ctx_init(cpu) do { } while (0)
57 # define irq_ctx_exit(cpu) do { } while (0)
58 #endif
59 
60 #ifdef CONFIG_INTC_BALANCING
61 extern unsigned int irq_lookup(unsigned int irq);
62 extern void irq_finish(unsigned int irq);
63 #else
64 #define irq_lookup(irq)		(irq)
65 #define irq_finish(irq)		do { } while (0)
66 #endif
67 
68 #include <asm-generic/irq.h>
69 #ifdef CONFIG_CPU_SH5
70 #include <cpu/irq.h>
71 #endif
72 
73 #endif /* __ASM_SH_IRQ_H */
74