1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef __ASM_SH_HW_BREAKPOINT_H 3 #define __ASM_SH_HW_BREAKPOINT_H 4 5 #include <uapi/asm/hw_breakpoint.h> 6 7 #define __ARCH_HW_BREAKPOINT_H 8 9 #include <linux/kdebug.h> 10 #include <linux/types.h> 11 12 struct arch_hw_breakpoint { 13 unsigned long address; 14 u16 len; 15 u16 type; 16 }; 17 18 enum { 19 SH_BREAKPOINT_READ = (1 << 1), 20 SH_BREAKPOINT_WRITE = (1 << 2), 21 SH_BREAKPOINT_RW = SH_BREAKPOINT_READ | SH_BREAKPOINT_WRITE, 22 23 SH_BREAKPOINT_LEN_1 = (1 << 12), 24 SH_BREAKPOINT_LEN_2 = (1 << 13), 25 SH_BREAKPOINT_LEN_4 = SH_BREAKPOINT_LEN_1 | SH_BREAKPOINT_LEN_2, 26 SH_BREAKPOINT_LEN_8 = (1 << 14), 27 }; 28 29 struct sh_ubc { 30 const char *name; 31 unsigned int num_events; 32 unsigned int trap_nr; 33 void (*enable)(struct arch_hw_breakpoint *, int); 34 void (*disable)(struct arch_hw_breakpoint *, int); 35 void (*enable_all)(unsigned long); 36 void (*disable_all)(void); 37 unsigned long (*active_mask)(void); 38 unsigned long (*triggered_mask)(void); 39 void (*clear_triggered_mask)(unsigned long); 40 struct clk *clk; /* optional interface clock / MSTP bit */ 41 }; 42 43 struct perf_event_attr; 44 struct perf_event; 45 struct task_struct; 46 struct pmu; 47 48 /* Maximum number of UBC channels */ 49 #define HBP_NUM 2 50 51 #define hw_breakpoint_slots(type) (HBP_NUM) 52 53 /* arch/sh/kernel/hw_breakpoint.c */ 54 extern int arch_check_bp_in_kernelspace(struct arch_hw_breakpoint *hw); 55 extern int hw_breakpoint_arch_parse(struct perf_event *bp, 56 const struct perf_event_attr *attr, 57 struct arch_hw_breakpoint *hw); 58 extern int hw_breakpoint_exceptions_notify(struct notifier_block *unused, 59 unsigned long val, void *data); 60 61 int arch_install_hw_breakpoint(struct perf_event *bp); 62 void arch_uninstall_hw_breakpoint(struct perf_event *bp); 63 void hw_breakpoint_pmu_read(struct perf_event *bp); 64 65 extern void arch_fill_perf_breakpoint(struct perf_event *bp); 66 extern int register_sh_ubc(struct sh_ubc *); 67 68 extern struct pmu perf_ops_bp; 69 70 #endif /* __ASM_SH_HW_BREAKPOINT_H */ 71