xref: /linux/arch/sh/include/asm/addrspace.h (revision 63307d015b91e626c97bb82e88054af3d0b74643)
1 /* SPDX-License-Identifier: GPL-2.0
2  *
3  * Copyright (C) 1999 by Kaz Kojima
4  *
5  * Defitions for the address spaces of the SH CPUs.
6  */
7 #ifndef __ASM_SH_ADDRSPACE_H
8 #define __ASM_SH_ADDRSPACE_H
9 
10 #ifdef __KERNEL__
11 
12 #include <cpu/addrspace.h>
13 
14 /* If this CPU supports segmentation, hook up the helpers */
15 #ifdef P1SEG
16 
17 /*
18    [ P0/U0 (virtual) ]		0x00000000     <------ User space
19    [ P1 (fixed)   cached ]	0x80000000     <------ Kernel space
20    [ P2 (fixed)  non-cachable]	0xA0000000     <------ Physical access
21    [ P3 (virtual) cached]	0xC0000000     <------ vmalloced area
22    [ P4 control   ]		0xE0000000
23  */
24 
25 /* Returns the privileged segment base of a given address  */
26 #define PXSEG(a)	(((unsigned long)(a)) & 0xe0000000)
27 
28 #ifdef CONFIG_29BIT
29 /*
30  * Map an address to a certain privileged segment
31  */
32 #define P1SEGADDR(a)	\
33 	((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P1SEG))
34 #define P2SEGADDR(a)	\
35 	((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P2SEG))
36 #define P3SEGADDR(a)	\
37 	((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P3SEG))
38 #define P4SEGADDR(a)	\
39 	((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P4SEG))
40 #else
41 /*
42  * These will never work in 32-bit, don't even bother.
43  */
44 #define P1SEGADDR(a)	({ (void)(a); BUG(); NULL; })
45 #define P2SEGADDR(a)	({ (void)(a); BUG(); NULL; })
46 #define P3SEGADDR(a)	({ (void)(a); BUG(); NULL; })
47 #define P4SEGADDR(a)	({ (void)(a); BUG(); NULL; })
48 #endif
49 #endif /* P1SEG */
50 
51 /* Check if an address can be reached in 29 bits */
52 #define IS_29BIT(a)	(((unsigned long)(a)) < 0x20000000)
53 
54 #ifdef CONFIG_SH_STORE_QUEUES
55 /*
56  * This is a special case for the SH-4 store queues, as pages for this
57  * space still need to be faulted in before it's possible to flush the
58  * store queue cache for writeout to the remapped region.
59  */
60 #define P3_ADDR_MAX		(P4SEG_STORE_QUE + 0x04000000)
61 #else
62 #define P3_ADDR_MAX		P4SEG
63 #endif
64 
65 #endif /* __KERNEL__ */
66 #endif /* __ASM_SH_ADDRSPACE_H */
67