1 /* 2 * Generic SH-4 / SH-4A PCIC operations (SH7751, SH7780). 3 * 4 * Copyright (C) 2002 - 2006 Paul Mundt 5 * 6 * This file is subject to the terms and conditions of the GNU General Public 7 * License v2. See the file "COPYING" in the main directory of this archive 8 * for more details. 9 */ 10 #include <linux/pci.h> 11 #include <asm/addrspace.h> 12 #include <asm/io.h> 13 #include "pci-sh4.h" 14 15 /* 16 * Direct access to PCI hardware... 17 */ 18 #define CONFIG_CMD(bus, devfn, where) \ 19 P1SEGADDR((bus->number << 16) | (devfn << 8) | (where & ~3)) 20 21 static DEFINE_SPINLOCK(sh4_pci_lock); 22 23 /* 24 * Functions for accessing PCI configuration space with type 1 accesses 25 */ 26 static int sh4_pci_read(struct pci_bus *bus, unsigned int devfn, 27 int where, int size, u32 *val) 28 { 29 struct pci_channel *chan = bus->sysdata; 30 unsigned long flags; 31 u32 data; 32 33 /* 34 * PCIPDR may only be accessed as 32 bit words, 35 * so we must do byte alignment by hand 36 */ 37 spin_lock_irqsave(&sh4_pci_lock, flags); 38 pci_write_reg(chan, CONFIG_CMD(bus, devfn, where), SH4_PCIPAR); 39 data = pci_read_reg(chan, SH4_PCIPDR); 40 spin_unlock_irqrestore(&sh4_pci_lock, flags); 41 42 switch (size) { 43 case 1: 44 *val = (data >> ((where & 3) << 3)) & 0xff; 45 break; 46 case 2: 47 *val = (data >> ((where & 2) << 3)) & 0xffff; 48 break; 49 case 4: 50 *val = data; 51 break; 52 default: 53 return PCIBIOS_FUNC_NOT_SUPPORTED; 54 } 55 56 return PCIBIOS_SUCCESSFUL; 57 } 58 59 /* 60 * Since SH4 only does 32bit access we'll have to do a read, 61 * mask,write operation. 62 * We'll allow an odd byte offset, though it should be illegal. 63 */ 64 static int sh4_pci_write(struct pci_bus *bus, unsigned int devfn, 65 int where, int size, u32 val) 66 { 67 struct pci_channel *chan = bus->sysdata; 68 unsigned long flags; 69 int shift; 70 u32 data; 71 72 spin_lock_irqsave(&sh4_pci_lock, flags); 73 pci_write_reg(chan, CONFIG_CMD(bus, devfn, where), SH4_PCIPAR); 74 data = pci_read_reg(chan, SH4_PCIPDR); 75 spin_unlock_irqrestore(&sh4_pci_lock, flags); 76 77 switch (size) { 78 case 1: 79 shift = (where & 3) << 3; 80 data &= ~(0xff << shift); 81 data |= ((val & 0xff) << shift); 82 break; 83 case 2: 84 shift = (where & 2) << 3; 85 data &= ~(0xffff << shift); 86 data |= ((val & 0xffff) << shift); 87 break; 88 case 4: 89 data = val; 90 break; 91 default: 92 return PCIBIOS_FUNC_NOT_SUPPORTED; 93 } 94 95 pci_write_reg(chan, data, SH4_PCIPDR); 96 97 return PCIBIOS_SUCCESSFUL; 98 } 99 100 struct pci_ops sh4_pci_ops = { 101 .read = sh4_pci_read, 102 .write = sh4_pci_write, 103 }; 104 105 /* 106 * Not really related to pci_ops, but it's common and not worth shoving 107 * somewhere else for now.. 108 */ 109 static unsigned int pci_probe = PCI_PROBE_CONF1; 110 111 int __init sh4_pci_check_direct(struct pci_channel *chan) 112 { 113 /* 114 * Check if configuration works. 115 */ 116 if (pci_probe & PCI_PROBE_CONF1) { 117 unsigned int tmp = pci_read_reg(chan, SH4_PCIPAR); 118 119 pci_write_reg(chan, P1SEG, SH4_PCIPAR); 120 121 if (pci_read_reg(chan, SH4_PCIPAR) == P1SEG) { 122 pci_write_reg(chan, tmp, SH4_PCIPAR); 123 printk(KERN_INFO "PCI: Using configuration type 1\n"); 124 request_region(chan->reg_base + SH4_PCIPAR, 8, 125 "PCI conf1"); 126 return 0; 127 } 128 129 pci_write_reg(chan, tmp, SH4_PCIPAR); 130 } 131 132 pr_debug("PCI: pci_check_direct failed\n"); 133 return -EINVAL; 134 } 135 136 /* Handle generic fixups */ 137 static void __init pci_fixup_ide_bases(struct pci_dev *d) 138 { 139 int i; 140 141 /* 142 * PCI IDE controllers use non-standard I/O port decoding, respect it. 143 */ 144 if ((d->class >> 8) != PCI_CLASS_STORAGE_IDE) 145 return; 146 pr_debug("PCI: IDE base address fixup for %s\n", pci_name(d)); 147 for(i = 0; i < 4; i++) { 148 struct resource *r = &d->resource[i]; 149 150 if ((r->start & ~0x80) == 0x374) { 151 r->start |= 2; 152 r->end = r->start; 153 } 154 } 155 } 156 DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, pci_fixup_ide_bases); 157 158 char * __devinit pcibios_setup(char *str) 159 { 160 if (!strcmp(str, "off")) { 161 pci_probe = 0; 162 return NULL; 163 } 164 165 return str; 166 } 167 168 int __attribute__((weak)) pci_fixup_pcic(struct pci_channel *chan) 169 { 170 /* Nothing to do. */ 171 return 0; 172 } 173