1 /* 2 * arch/sh/drivers/dma/dma-api.c 3 * 4 * SuperH-specific DMA management API 5 * 6 * Copyright (C) 2003, 2004, 2005 Paul Mundt 7 * 8 * This file is subject to the terms and conditions of the GNU General Public 9 * License. See the file "COPYING" in the main directory of this archive 10 * for more details. 11 */ 12 #include <linux/init.h> 13 #include <linux/module.h> 14 #include <linux/interrupt.h> 15 #include <linux/spinlock.h> 16 #include <linux/proc_fs.h> 17 #include <linux/list.h> 18 #include <linux/platform_device.h> 19 #include <asm/dma.h> 20 21 DEFINE_SPINLOCK(dma_spin_lock); 22 static LIST_HEAD(registered_dmac_list); 23 24 /* 25 * A brief note about the reasons for this API as it stands. 26 * 27 * For starters, the old ISA DMA API didn't work for us for a number of 28 * reasons, for one, the vast majority of channels on the SH DMAC are 29 * dual-address mode only, and both the new and the old DMA APIs are after the 30 * concept of managing a DMA buffer, which doesn't overly fit this model very 31 * well. In addition to which, the new API is largely geared at IOMMUs and 32 * GARTs, and doesn't even support the channel notion very well. 33 * 34 * The other thing that's a marginal issue, is the sheer number of random DMA 35 * engines that are present (ie, in boards like the Dreamcast), some of which 36 * cascade off of the SH DMAC, and others do not. As such, there was a real 37 * need for a scalable subsystem that could deal with both single and 38 * dual-address mode usage, in addition to interoperating with cascaded DMACs. 39 * 40 * There really isn't any reason why this needs to be SH specific, though I'm 41 * not aware of too many other processors (with the exception of some MIPS) 42 * that have the same concept of a dual address mode, or any real desire to 43 * actually make use of the DMAC even if such a subsystem were exposed 44 * elsewhere. 45 * 46 * The idea for this was derived from the ARM port, which acted as an excellent 47 * reference when trying to address these issues. 48 * 49 * It should also be noted that the decision to add Yet Another DMA API(tm) to 50 * the kernel wasn't made easily, and was only decided upon after conferring 51 * with jejb with regards to the state of the old and new APIs as they applied 52 * to these circumstances. Philip Blundell was also a great help in figuring 53 * out some single-address mode DMA semantics that were otherwise rather 54 * confusing. 55 */ 56 57 struct dma_info *get_dma_info(unsigned int chan) 58 { 59 struct dma_info *info; 60 unsigned int total = 0; 61 62 /* 63 * Look for each DMAC's range to determine who the owner of 64 * the channel is. 65 */ 66 list_for_each_entry(info, ®istered_dmac_list, list) { 67 total += info->nr_channels; 68 if (chan > total) 69 continue; 70 71 return info; 72 } 73 74 return NULL; 75 } 76 77 static unsigned int get_nr_channels(void) 78 { 79 struct dma_info *info; 80 unsigned int nr = 0; 81 82 if (unlikely(list_empty(®istered_dmac_list))) 83 return nr; 84 85 list_for_each_entry(info, ®istered_dmac_list, list) 86 nr += info->nr_channels; 87 88 return nr; 89 } 90 91 struct dma_channel *get_dma_channel(unsigned int chan) 92 { 93 struct dma_info *info = get_dma_info(chan); 94 95 if (!info) 96 return ERR_PTR(-EINVAL); 97 98 return info->channels + chan; 99 } 100 101 int get_dma_residue(unsigned int chan) 102 { 103 struct dma_info *info = get_dma_info(chan); 104 struct dma_channel *channel = &info->channels[chan]; 105 106 if (info->ops->get_residue) 107 return info->ops->get_residue(channel); 108 109 return 0; 110 } 111 112 int request_dma(unsigned int chan, const char *dev_id) 113 { 114 struct dma_info *info = get_dma_info(chan); 115 struct dma_channel *channel = &info->channels[chan]; 116 117 down(&channel->sem); 118 119 if (!info->ops || chan >= MAX_DMA_CHANNELS) { 120 up(&channel->sem); 121 return -EINVAL; 122 } 123 124 atomic_set(&channel->busy, 1); 125 126 strlcpy(channel->dev_id, dev_id, sizeof(channel->dev_id)); 127 128 up(&channel->sem); 129 130 if (info->ops->request) 131 return info->ops->request(channel); 132 133 return 0; 134 } 135 136 void free_dma(unsigned int chan) 137 { 138 struct dma_info *info = get_dma_info(chan); 139 struct dma_channel *channel = &info->channels[chan]; 140 141 if (info->ops->free) 142 info->ops->free(channel); 143 144 atomic_set(&channel->busy, 0); 145 } 146 147 void dma_wait_for_completion(unsigned int chan) 148 { 149 struct dma_info *info = get_dma_info(chan); 150 struct dma_channel *channel = &info->channels[chan]; 151 152 if (channel->flags & DMA_TEI_CAPABLE) { 153 wait_event(channel->wait_queue, 154 (info->ops->get_residue(channel) == 0)); 155 return; 156 } 157 158 while (info->ops->get_residue(channel)) 159 cpu_relax(); 160 } 161 162 void dma_configure_channel(unsigned int chan, unsigned long flags) 163 { 164 struct dma_info *info = get_dma_info(chan); 165 struct dma_channel *channel = &info->channels[chan]; 166 167 if (info->ops->configure) 168 info->ops->configure(channel, flags); 169 } 170 171 int dma_xfer(unsigned int chan, unsigned long from, 172 unsigned long to, size_t size, unsigned int mode) 173 { 174 struct dma_info *info = get_dma_info(chan); 175 struct dma_channel *channel = &info->channels[chan]; 176 177 channel->sar = from; 178 channel->dar = to; 179 channel->count = size; 180 channel->mode = mode; 181 182 return info->ops->xfer(channel); 183 } 184 185 #ifdef CONFIG_PROC_FS 186 static int dma_read_proc(char *buf, char **start, off_t off, 187 int len, int *eof, void *data) 188 { 189 struct dma_info *info; 190 char *p = buf; 191 192 if (list_empty(®istered_dmac_list)) 193 return 0; 194 195 /* 196 * Iterate over each registered DMAC 197 */ 198 list_for_each_entry(info, ®istered_dmac_list, list) { 199 int i; 200 201 /* 202 * Iterate over each channel 203 */ 204 for (i = 0; i < info->nr_channels; i++) { 205 struct dma_channel *channel = info->channels + i; 206 207 if (!(channel->flags & DMA_CONFIGURED)) 208 continue; 209 210 p += sprintf(p, "%2d: %14s %s\n", i, 211 info->name, channel->dev_id); 212 } 213 } 214 215 return p - buf; 216 } 217 #endif 218 219 220 int register_dmac(struct dma_info *info) 221 { 222 unsigned int total_channels, i; 223 224 INIT_LIST_HEAD(&info->list); 225 226 printk(KERN_INFO "DMA: Registering %s handler (%d channel%s).\n", 227 info->name, info->nr_channels, 228 info->nr_channels > 1 ? "s" : ""); 229 230 BUG_ON((info->flags & DMAC_CHANNELS_CONFIGURED) && !info->channels); 231 232 info->pdev = platform_device_register_simple((char *)info->name, -1, 233 NULL, 0); 234 if (IS_ERR(info->pdev)) 235 return PTR_ERR(info->pdev); 236 237 /* 238 * Don't touch pre-configured channels 239 */ 240 if (!(info->flags & DMAC_CHANNELS_CONFIGURED)) { 241 unsigned int size; 242 243 size = sizeof(struct dma_channel) * info->nr_channels; 244 245 info->channels = kmalloc(size, GFP_KERNEL); 246 if (!info->channels) 247 return -ENOMEM; 248 249 memset(info->channels, 0, size); 250 } 251 252 total_channels = get_nr_channels(); 253 for (i = 0; i < info->nr_channels; i++) { 254 struct dma_channel *chan = info->channels + i; 255 256 chan->chan = i; 257 chan->vchan = i + total_channels; 258 259 memcpy(chan->dev_id, "Unused", 7); 260 261 if (info->flags & DMAC_CHANNELS_TEI_CAPABLE) 262 chan->flags |= DMA_TEI_CAPABLE; 263 264 init_MUTEX(&chan->sem); 265 init_waitqueue_head(&chan->wait_queue); 266 267 dma_create_sysfs_files(chan, info); 268 } 269 270 list_add(&info->list, ®istered_dmac_list); 271 272 return 0; 273 } 274 275 void unregister_dmac(struct dma_info *info) 276 { 277 unsigned int i; 278 279 for (i = 0; i < info->nr_channels; i++) 280 dma_remove_sysfs_files(info->channels + i, info); 281 282 if (!(info->flags & DMAC_CHANNELS_CONFIGURED)) 283 kfree(info->channels); 284 285 list_del(&info->list); 286 platform_device_unregister(info->pdev); 287 } 288 289 static int __init dma_api_init(void) 290 { 291 printk("DMA: Registering DMA API.\n"); 292 293 #ifdef CONFIG_PROC_FS 294 create_proc_read_entry("dma", 0, 0, dma_read_proc, 0); 295 #endif 296 297 return 0; 298 } 299 300 subsys_initcall(dma_api_init); 301 302 MODULE_AUTHOR("Paul Mundt <lethal@linux-sh.org>"); 303 MODULE_DESCRIPTION("DMA API for SuperH"); 304 MODULE_LICENSE("GPL"); 305 306 EXPORT_SYMBOL(request_dma); 307 EXPORT_SYMBOL(free_dma); 308 EXPORT_SYMBOL(register_dmac); 309 EXPORT_SYMBOL(get_dma_residue); 310 EXPORT_SYMBOL(get_dma_info); 311 EXPORT_SYMBOL(get_dma_channel); 312 EXPORT_SYMBOL(dma_xfer); 313 EXPORT_SYMBOL(dma_wait_for_completion); 314 EXPORT_SYMBOL(dma_configure_channel); 315 316