11da177e4SLinus Torvaldsmenu "DMA support" 21da177e4SLinus Torvalds 3fc467a26SManuel Laussconfig SH_DMA_API 4fc467a26SManuel Lauss bool 51da177e4SLinus Torvalds 6fc467a26SManuel Laussconfig SH_DMA 7fc467a26SManuel Lauss bool "SuperH on-chip DMA controller (DMAC) support" 83e767833SPaul Mundt depends on CPU_SH3 || CPU_SH4 9fc467a26SManuel Lauss select SH_DMA_API 10fc467a26SManuel Lauss default n 111da177e4SLinus Torvalds 12*988f831dSNobuhiro Iwamatsuconfig SH_DMA_IRQ_MULTI 13*988f831dSNobuhiro Iwamatsu bool 14*988f831dSNobuhiro Iwamatsu depends on SH_DMA 15*988f831dSNobuhiro Iwamatsu default y if CPU_SUBTYPE_SH7750 || CPU_SUBTYPE_SH7751 || \ 16*988f831dSNobuhiro Iwamatsu CPU_SUBTYPE_SH7750S || CPU_SUBTYPE_SH7750R || CPU_SUBTYPE_SH7751R || \ 17*988f831dSNobuhiro Iwamatsu CPU_SUBTYPE_SH7091 || CPU_SUBTYPE_SH7763 || CPU_SUBTYPE_SH7764 || \ 18*988f831dSNobuhiro Iwamatsu CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785 19*988f831dSNobuhiro Iwamatsu 201da177e4SLinus Torvaldsconfig NR_ONCHIP_DMA_CHANNELS 21fc100202SPaul Mundt int 221da177e4SLinus Torvalds depends on SH_DMA 2371b973a4SNobuhiro Iwamatsu default "4" if CPU_SUBTYPE_SH7750 || CPU_SUBTYPE_SH7751 || CPU_SUBTYPE_SH7750S 2471b973a4SNobuhiro Iwamatsu default "8" if CPU_SUBTYPE_SH7750R || CPU_SUBTYPE_SH7751R || CPU_SUBTYPE_SH7760 2571b973a4SNobuhiro Iwamatsu default "12" if CPU_SUBTYPE_SH7723 || CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785 2671b973a4SNobuhiro Iwamatsu default "6" 271da177e4SLinus Torvalds help 281da177e4SLinus Torvalds This allows you to specify the number of channels that the on-chip 291da177e4SLinus Torvalds DMAC supports. This will be 4 for SH7750/SH7751 and 8 for the 301da177e4SLinus Torvalds SH7750R/SH7751R. 311da177e4SLinus Torvalds 321da177e4SLinus Torvaldsconfig NR_DMA_CHANNELS_BOOL 331da177e4SLinus Torvalds depends on SH_DMA 341da177e4SLinus Torvalds bool "Override default number of maximum DMA channels" 351da177e4SLinus Torvalds help 361da177e4SLinus Torvalds This allows you to forcibly update the maximum number of supported 371da177e4SLinus Torvalds DMA channels for a given board. If this is unset, this will default 381da177e4SLinus Torvalds to the number of channels that the on-chip DMAC has. 391da177e4SLinus Torvalds 401da177e4SLinus Torvaldsconfig NR_DMA_CHANNELS 411da177e4SLinus Torvalds int "Maximum number of DMA channels" 421da177e4SLinus Torvalds depends on SH_DMA && NR_DMA_CHANNELS_BOOL 431da177e4SLinus Torvalds default NR_ONCHIP_DMA_CHANNELS 441da177e4SLinus Torvalds help 451da177e4SLinus Torvalds This allows you to specify the maximum number of DMA channels to 461da177e4SLinus Torvalds support. Setting this to a higher value allows for cascading DMACs 471da177e4SLinus Torvalds with additional channels. 481da177e4SLinus Torvalds 49fc467a26SManuel Laussconfig SH_DMABRG 50fc467a26SManuel Lauss bool "SH7760 DMABRG support" 51fc467a26SManuel Lauss depends on CPU_SUBTYPE_SH7760 52fc467a26SManuel Lauss help 53fc467a26SManuel Lauss The DMABRG does data transfers from main memory to Audio/USB units 54fc467a26SManuel Lauss of the SH7760. 55fc467a26SManuel Lauss Say Y if you want to use Audio/USB DMA on your SH7760 board. 56fc467a26SManuel Lauss 571da177e4SLinus Torvaldsendmenu 58