11da177e4SLinus Torvaldsmenu "DMA support" 21da177e4SLinus Torvalds 31da177e4SLinus Torvalds 4fc467a26SManuel Laussconfig SH_DMA 5fc467a26SManuel Lauss bool "SuperH on-chip DMA controller (DMAC) support" 63e767833SPaul Mundt depends on CPU_SH3 || CPU_SH4 7fc467a26SManuel Lauss default n 81da177e4SLinus Torvalds 9988f831dSNobuhiro Iwamatsuconfig SH_DMA_IRQ_MULTI 10988f831dSNobuhiro Iwamatsu bool 11988f831dSNobuhiro Iwamatsu depends on SH_DMA 12988f831dSNobuhiro Iwamatsu default y if CPU_SUBTYPE_SH7750 || CPU_SUBTYPE_SH7751 || \ 13a27873cdSPaul Mundt CPU_SUBTYPE_SH7750S || CPU_SUBTYPE_SH7750R || \ 14a27873cdSPaul Mundt CPU_SUBTYPE_SH7751R || CPU_SUBTYPE_SH7091 || \ 15*455f9726SRichard Weinberger CPU_SUBTYPE_SH7763 || CPU_SUBTYPE_SH7780 || \ 16*455f9726SRichard Weinberger CPU_SUBTYPE_SH7785 || CPU_SUBTYPE_SH7760 17988f831dSNobuhiro Iwamatsu 18d8902adcSNobuhiro Iwamatsuconfig SH_DMA_API 19d8902adcSNobuhiro Iwamatsu depends on SH_DMA 20d8902adcSNobuhiro Iwamatsu bool "SuperH DMA API support" 21d8902adcSNobuhiro Iwamatsu default n 22d8902adcSNobuhiro Iwamatsu help 23d8902adcSNobuhiro Iwamatsu SH_DMA_API always enabled DMA API of used SuperH. 24d8902adcSNobuhiro Iwamatsu If you want to use DMA ENGINE, you must not enable this. 25d8902adcSNobuhiro Iwamatsu Please enable DMA_ENGINE and SH_DMAE. 26d8902adcSNobuhiro Iwamatsu 271da177e4SLinus Torvaldsconfig NR_ONCHIP_DMA_CHANNELS 28fc100202SPaul Mundt int 291da177e4SLinus Torvalds depends on SH_DMA 30a27873cdSPaul Mundt default "4" if CPU_SUBTYPE_SH7750 || CPU_SUBTYPE_SH7751 || \ 31a27873cdSPaul Mundt CPU_SUBTYPE_SH7750S || CPU_SUBTYPE_SH7091 32a27873cdSPaul Mundt default "8" if CPU_SUBTYPE_SH7750R || CPU_SUBTYPE_SH7751R || \ 33a27873cdSPaul Mundt CPU_SUBTYPE_SH7760 34a27873cdSPaul Mundt default "12" if CPU_SUBTYPE_SH7723 || CPU_SUBTYPE_SH7780 || \ 3524d76195SKuninori Morimoto CPU_SUBTYPE_SH7785 || CPU_SUBTYPE_SH7724 3671b973a4SNobuhiro Iwamatsu default "6" 371da177e4SLinus Torvalds help 381da177e4SLinus Torvalds This allows you to specify the number of channels that the on-chip 3924d76195SKuninori Morimoto DMAC supports. This will be 4 for SH7750/SH7751/Sh7750S/SH7091 and 8 for the 4024d76195SKuninori Morimoto SH7750R/SH7751R/SH7760, 12 for the SH7723/SH7780/SH7785/SH7724, default is 6. 411da177e4SLinus Torvalds 42fc467a26SManuel Laussconfig SH_DMABRG 43fc467a26SManuel Lauss bool "SH7760 DMABRG support" 44fc467a26SManuel Lauss depends on CPU_SUBTYPE_SH7760 45fc467a26SManuel Lauss help 46fc467a26SManuel Lauss The DMABRG does data transfers from main memory to Audio/USB units 47fc467a26SManuel Lauss of the SH7760. 48fc467a26SManuel Lauss Say Y if you want to use Audio/USB DMA on your SH7760 board. 49fc467a26SManuel Lauss 50da62e71dSPaul Mundtconfig PVR2_DMA 51da62e71dSPaul Mundt tristate "PowerVR 2 DMAC support" 52da62e71dSPaul Mundt depends on SH_DREAMCAST && SH_DMA 53da62e71dSPaul Mundt help 54da62e71dSPaul Mundt Selecting this will enable support for the PVR2 DMA controller. 55da62e71dSPaul Mundt As this chains off of the on-chip DMAC, that must also be 56da62e71dSPaul Mundt enabled by default. 57da62e71dSPaul Mundt 58da62e71dSPaul Mundt This is primarily used by the pvr2fb framebuffer driver for 59da62e71dSPaul Mundt certain optimizations, but is not necessary for functionality. 60da62e71dSPaul Mundt 61da62e71dSPaul Mundt If in doubt, say N. 62da62e71dSPaul Mundt 6340f49e7eSPaul Mundtconfig G2_DMA 6440f49e7eSPaul Mundt tristate "G2 Bus DMA support" 6540f49e7eSPaul Mundt depends on SH_DREAMCAST 6640f49e7eSPaul Mundt select SH_DMA_API 6740f49e7eSPaul Mundt help 6840f49e7eSPaul Mundt This enables support for the DMA controller for the Dreamcast's 6940f49e7eSPaul Mundt G2 bus. Drivers that want this will generally enable this on 7040f49e7eSPaul Mundt their own. 7140f49e7eSPaul Mundt 7240f49e7eSPaul Mundt If in doubt, say N. 7340f49e7eSPaul Mundt 741da177e4SLinus Torvaldsendmenu 75