1*1da177e4SLinus Torvaldsmenu "DMA support" 2*1da177e4SLinus Torvalds 3*1da177e4SLinus Torvaldsconfig SH_DMA 4*1da177e4SLinus Torvalds bool "DMA controller (DMAC) support" 5*1da177e4SLinus Torvalds help 6*1da177e4SLinus Torvalds Selecting this option will provide same API as PC's Direct Memory 7*1da177e4SLinus Torvalds Access Controller(8237A) for SuperH DMAC. 8*1da177e4SLinus Torvalds 9*1da177e4SLinus Torvalds If unsure, say N. 10*1da177e4SLinus Torvalds 11*1da177e4SLinus Torvaldsconfig NR_ONCHIP_DMA_CHANNELS 12*1da177e4SLinus Torvalds depends on SH_DMA 13*1da177e4SLinus Torvalds int "Number of on-chip DMAC channels" 14*1da177e4SLinus Torvalds default "4" 15*1da177e4SLinus Torvalds help 16*1da177e4SLinus Torvalds This allows you to specify the number of channels that the on-chip 17*1da177e4SLinus Torvalds DMAC supports. This will be 4 for SH7750/SH7751 and 8 for the 18*1da177e4SLinus Torvalds SH7750R/SH7751R. 19*1da177e4SLinus Torvalds 20*1da177e4SLinus Torvaldsconfig NR_DMA_CHANNELS_BOOL 21*1da177e4SLinus Torvalds depends on SH_DMA 22*1da177e4SLinus Torvalds bool "Override default number of maximum DMA channels" 23*1da177e4SLinus Torvalds help 24*1da177e4SLinus Torvalds This allows you to forcibly update the maximum number of supported 25*1da177e4SLinus Torvalds DMA channels for a given board. If this is unset, this will default 26*1da177e4SLinus Torvalds to the number of channels that the on-chip DMAC has. 27*1da177e4SLinus Torvalds 28*1da177e4SLinus Torvaldsconfig NR_DMA_CHANNELS 29*1da177e4SLinus Torvalds int "Maximum number of DMA channels" 30*1da177e4SLinus Torvalds depends on SH_DMA && NR_DMA_CHANNELS_BOOL 31*1da177e4SLinus Torvalds default NR_ONCHIP_DMA_CHANNELS 32*1da177e4SLinus Torvalds help 33*1da177e4SLinus Torvalds This allows you to specify the maximum number of DMA channels to 34*1da177e4SLinus Torvalds support. Setting this to a higher value allows for cascading DMACs 35*1da177e4SLinus Torvalds with additional channels. 36*1da177e4SLinus Torvalds 37*1da177e4SLinus Torvaldsconfig DMA_PAGE_OPS 38*1da177e4SLinus Torvalds bool "Use DMAC for page copy/clear" 39*1da177e4SLinus Torvalds depends on SH_DMA && BROKEN 40*1da177e4SLinus Torvalds help 41*1da177e4SLinus Torvalds Selecting this option will use a dual-address mode configured channel 42*1da177e4SLinus Torvalds in the SH DMAC for copy_page()/clear_page(). Primarily a performance 43*1da177e4SLinus Torvalds hack. 44*1da177e4SLinus Torvalds 45*1da177e4SLinus Torvaldsconfig DMA_PAGE_OPS_CHANNEL 46*1da177e4SLinus Torvalds depends on DMA_PAGE_OPS 47*1da177e4SLinus Torvalds int "DMA channel for sh memory-manager page copy/clear" 48*1da177e4SLinus Torvalds default "3" 49*1da177e4SLinus Torvalds help 50*1da177e4SLinus Torvalds This allows the specification of the dual address dma channel, 51*1da177e4SLinus Torvalds in case channel 3 is unavailable. On the SH4, channels 1,2, and 3 52*1da177e4SLinus Torvalds are dual-address capable. 53*1da177e4SLinus Torvalds 54*1da177e4SLinus Torvaldsendmenu 55*1da177e4SLinus Torvalds 56