1*da2014a2SPaul Mundt /* 2*da2014a2SPaul Mundt * Renesas Solutions Highlander R7785RP Support. 3*da2014a2SPaul Mundt * 4*da2014a2SPaul Mundt * Copyright (C) 2002 Atom Create Engineering Co., Ltd. 5*da2014a2SPaul Mundt * Copyright (C) 2006 - 2008 Paul Mundt 6*da2014a2SPaul Mundt * Copyright (C) 2007 Magnus Damm 7*da2014a2SPaul Mundt * 8*da2014a2SPaul Mundt * This file is subject to the terms and conditions of the GNU General Public 9*da2014a2SPaul Mundt * License. See the file "COPYING" in the main directory of this archive 10*da2014a2SPaul Mundt * for more details. 11*da2014a2SPaul Mundt */ 12*da2014a2SPaul Mundt #include <linux/init.h> 13*da2014a2SPaul Mundt #include <linux/irq.h> 14*da2014a2SPaul Mundt #include <linux/io.h> 15*da2014a2SPaul Mundt #include <asm/r7780rp.h> 16*da2014a2SPaul Mundt 17*da2014a2SPaul Mundt enum { 18*da2014a2SPaul Mundt UNUSED = 0, 19*da2014a2SPaul Mundt 20*da2014a2SPaul Mundt /* FPGA specific interrupt sources */ 21*da2014a2SPaul Mundt CF, /* Compact Flash */ 22*da2014a2SPaul Mundt SMBUS, /* SMBUS */ 23*da2014a2SPaul Mundt TP, /* Touch panel */ 24*da2014a2SPaul Mundt RTC, /* RTC Alarm */ 25*da2014a2SPaul Mundt TH_ALERT, /* Temperature sensor */ 26*da2014a2SPaul Mundt AX88796, /* Ethernet controller */ 27*da2014a2SPaul Mundt 28*da2014a2SPaul Mundt /* external bus connector */ 29*da2014a2SPaul Mundt EXT0, EXT1, EXT2, EXT3, EXT4, EXT5, EXT6, EXT7, 30*da2014a2SPaul Mundt }; 31*da2014a2SPaul Mundt 32*da2014a2SPaul Mundt static struct intc_vect vectors[] __initdata = { 33*da2014a2SPaul Mundt INTC_IRQ(CF, IRQ_CF), 34*da2014a2SPaul Mundt INTC_IRQ(SMBUS, IRQ_SMBUS), 35*da2014a2SPaul Mundt INTC_IRQ(TP, IRQ_TP), 36*da2014a2SPaul Mundt INTC_IRQ(RTC, IRQ_RTC), 37*da2014a2SPaul Mundt INTC_IRQ(TH_ALERT, IRQ_TH_ALERT), 38*da2014a2SPaul Mundt 39*da2014a2SPaul Mundt INTC_IRQ(EXT0, IRQ_EXT0), INTC_IRQ(EXT1, IRQ_EXT1), 40*da2014a2SPaul Mundt INTC_IRQ(EXT2, IRQ_EXT2), INTC_IRQ(EXT3, IRQ_EXT3), 41*da2014a2SPaul Mundt 42*da2014a2SPaul Mundt INTC_IRQ(EXT4, IRQ_EXT4), INTC_IRQ(EXT5, IRQ_EXT5), 43*da2014a2SPaul Mundt INTC_IRQ(EXT6, IRQ_EXT6), INTC_IRQ(EXT7, IRQ_EXT7), 44*da2014a2SPaul Mundt 45*da2014a2SPaul Mundt INTC_IRQ(AX88796, IRQ_AX88796), 46*da2014a2SPaul Mundt }; 47*da2014a2SPaul Mundt 48*da2014a2SPaul Mundt static struct intc_mask_reg mask_registers[] __initdata = { 49*da2014a2SPaul Mundt { 0xa4000010, 0, 16, /* IRLMCR1 */ 50*da2014a2SPaul Mundt { 0, 0, 0, 0, CF, AX88796, SMBUS, TP, 51*da2014a2SPaul Mundt RTC, 0, TH_ALERT, 0, 0, 0, 0, 0 } }, 52*da2014a2SPaul Mundt { 0xa4000012, 0, 16, /* IRLMCR2 */ 53*da2014a2SPaul Mundt { 0, 0, 0, 0, 0, 0, 0, 0, 54*da2014a2SPaul Mundt EXT7, EXT6, EXT5, EXT4, EXT3, EXT2, EXT1, EXT0 } }, 55*da2014a2SPaul Mundt }; 56*da2014a2SPaul Mundt 57*da2014a2SPaul Mundt static unsigned char irl2irq[HL_NR_IRL] __initdata = { 58*da2014a2SPaul Mundt 0, IRQ_CF, IRQ_EXT4, IRQ_EXT5, 59*da2014a2SPaul Mundt IRQ_EXT6, IRQ_EXT7, IRQ_SMBUS, IRQ_TP, 60*da2014a2SPaul Mundt IRQ_RTC, IRQ_TH_ALERT, IRQ_AX88796, IRQ_EXT0, 61*da2014a2SPaul Mundt IRQ_EXT1, IRQ_EXT2, IRQ_EXT3, 62*da2014a2SPaul Mundt }; 63*da2014a2SPaul Mundt 64*da2014a2SPaul Mundt static DECLARE_INTC_DESC(intc_desc, "r7785rp", vectors, 65*da2014a2SPaul Mundt NULL, mask_registers, NULL, NULL); 66*da2014a2SPaul Mundt 67*da2014a2SPaul Mundt unsigned char * __init highlander_plat_irq_setup(void) 68*da2014a2SPaul Mundt { 69*da2014a2SPaul Mundt if ((ctrl_inw(0xa4000158) & 0xf000) != 0x1000) 70*da2014a2SPaul Mundt return NULL; 71*da2014a2SPaul Mundt 72*da2014a2SPaul Mundt printk(KERN_INFO "Using r7785rp interrupt controller.\n"); 73*da2014a2SPaul Mundt 74*da2014a2SPaul Mundt ctrl_outw(0x0000, PA_IRLSSR1); /* FPGA IRLSSR1(CF_CD clear) */ 75*da2014a2SPaul Mundt 76*da2014a2SPaul Mundt /* Setup the FPGA IRL */ 77*da2014a2SPaul Mundt ctrl_outw(0x0000, PA_IRLPRA); /* FPGA IRLA */ 78*da2014a2SPaul Mundt ctrl_outw(0xe598, PA_IRLPRB); /* FPGA IRLB */ 79*da2014a2SPaul Mundt ctrl_outw(0x7060, PA_IRLPRC); /* FPGA IRLC */ 80*da2014a2SPaul Mundt ctrl_outw(0x0000, PA_IRLPRD); /* FPGA IRLD */ 81*da2014a2SPaul Mundt ctrl_outw(0x4321, PA_IRLPRE); /* FPGA IRLE */ 82*da2014a2SPaul Mundt ctrl_outw(0xdcba, PA_IRLPRF); /* FPGA IRLF */ 83*da2014a2SPaul Mundt 84*da2014a2SPaul Mundt register_intc_controller(&intc_desc); 85*da2014a2SPaul Mundt return irl2irq; 86*da2014a2SPaul Mundt } 87