xref: /linux/arch/sh/boards/mach-highlander/irq-r7785rp.c (revision 7639a4541f7e7abb1295ff8ab39cc2f5842239ae)
1da2014a2SPaul Mundt /*
2da2014a2SPaul Mundt  * Renesas Solutions Highlander R7785RP Support.
3da2014a2SPaul Mundt  *
4da2014a2SPaul Mundt  * Copyright (C) 2002  Atom Create Engineering Co., Ltd.
5da2014a2SPaul Mundt  * Copyright (C) 2006 - 2008  Paul Mundt
6da2014a2SPaul Mundt  * Copyright (C) 2007  Magnus Damm
7da2014a2SPaul Mundt  *
8da2014a2SPaul Mundt  * This file is subject to the terms and conditions of the GNU General Public
9da2014a2SPaul Mundt  * License.  See the file "COPYING" in the main directory of this archive
10da2014a2SPaul Mundt  * for more details.
11da2014a2SPaul Mundt  */
12da2014a2SPaul Mundt #include <linux/init.h>
13da2014a2SPaul Mundt #include <linux/irq.h>
14da2014a2SPaul Mundt #include <linux/io.h>
15*7639a454SPaul Mundt #include <mach/highlander.h>
16da2014a2SPaul Mundt 
17da2014a2SPaul Mundt enum {
18da2014a2SPaul Mundt 	UNUSED = 0,
19da2014a2SPaul Mundt 
20da2014a2SPaul Mundt 	/* FPGA specific interrupt sources */
21da2014a2SPaul Mundt 	CF,		/* Compact Flash */
22da2014a2SPaul Mundt 	SMBUS,		/* SMBUS */
23da2014a2SPaul Mundt 	TP,		/* Touch panel */
24da2014a2SPaul Mundt 	RTC,		/* RTC Alarm */
25da2014a2SPaul Mundt 	TH_ALERT,	/* Temperature sensor */
26da2014a2SPaul Mundt 	AX88796,	/* Ethernet controller */
27da2014a2SPaul Mundt 
28da2014a2SPaul Mundt 	/* external bus connector */
29da2014a2SPaul Mundt 	EXT0, EXT1, EXT2, EXT3, EXT4, EXT5, EXT6, EXT7,
30da2014a2SPaul Mundt };
31da2014a2SPaul Mundt 
32da2014a2SPaul Mundt static struct intc_vect vectors[] __initdata = {
33da2014a2SPaul Mundt 	INTC_IRQ(CF, IRQ_CF),
34da2014a2SPaul Mundt 	INTC_IRQ(SMBUS, IRQ_SMBUS),
35da2014a2SPaul Mundt 	INTC_IRQ(TP, IRQ_TP),
36da2014a2SPaul Mundt 	INTC_IRQ(RTC, IRQ_RTC),
37da2014a2SPaul Mundt 	INTC_IRQ(TH_ALERT, IRQ_TH_ALERT),
38da2014a2SPaul Mundt 
39da2014a2SPaul Mundt 	INTC_IRQ(EXT0, IRQ_EXT0), INTC_IRQ(EXT1, IRQ_EXT1),
40da2014a2SPaul Mundt 	INTC_IRQ(EXT2, IRQ_EXT2), INTC_IRQ(EXT3, IRQ_EXT3),
41da2014a2SPaul Mundt 
42da2014a2SPaul Mundt 	INTC_IRQ(EXT4, IRQ_EXT4), INTC_IRQ(EXT5, IRQ_EXT5),
43da2014a2SPaul Mundt 	INTC_IRQ(EXT6, IRQ_EXT6), INTC_IRQ(EXT7, IRQ_EXT7),
44da2014a2SPaul Mundt 
45da2014a2SPaul Mundt 	INTC_IRQ(AX88796, IRQ_AX88796),
46da2014a2SPaul Mundt };
47da2014a2SPaul Mundt 
48da2014a2SPaul Mundt static struct intc_mask_reg mask_registers[] __initdata = {
49da2014a2SPaul Mundt 	{ 0xa4000010, 0, 16, /* IRLMCR1 */
50da2014a2SPaul Mundt 	  { 0, 0, 0, 0, CF, AX88796, SMBUS, TP,
51da2014a2SPaul Mundt 	    RTC, 0, TH_ALERT, 0, 0, 0, 0, 0 } },
52da2014a2SPaul Mundt 	{ 0xa4000012, 0, 16, /* IRLMCR2 */
53da2014a2SPaul Mundt 	  { 0, 0, 0, 0, 0, 0, 0, 0,
54da2014a2SPaul Mundt 	    EXT7, EXT6, EXT5, EXT4, EXT3, EXT2, EXT1, EXT0 } },
55da2014a2SPaul Mundt };
56da2014a2SPaul Mundt 
57da2014a2SPaul Mundt static unsigned char irl2irq[HL_NR_IRL] __initdata = {
58da2014a2SPaul Mundt 	0, IRQ_CF, IRQ_EXT4, IRQ_EXT5,
59da2014a2SPaul Mundt 	IRQ_EXT6, IRQ_EXT7, IRQ_SMBUS, IRQ_TP,
60da2014a2SPaul Mundt 	IRQ_RTC, IRQ_TH_ALERT, IRQ_AX88796, IRQ_EXT0,
61da2014a2SPaul Mundt 	IRQ_EXT1, IRQ_EXT2, IRQ_EXT3,
62da2014a2SPaul Mundt };
63da2014a2SPaul Mundt 
64da2014a2SPaul Mundt static DECLARE_INTC_DESC(intc_desc, "r7785rp", vectors,
65da2014a2SPaul Mundt 			 NULL, mask_registers, NULL, NULL);
66da2014a2SPaul Mundt 
67da2014a2SPaul Mundt unsigned char * __init highlander_plat_irq_setup(void)
68da2014a2SPaul Mundt {
69da2014a2SPaul Mundt 	if ((ctrl_inw(0xa4000158) & 0xf000) != 0x1000)
70da2014a2SPaul Mundt 		return NULL;
71da2014a2SPaul Mundt 
72da2014a2SPaul Mundt 	printk(KERN_INFO "Using r7785rp interrupt controller.\n");
73da2014a2SPaul Mundt 
74da2014a2SPaul Mundt 	ctrl_outw(0x0000, PA_IRLSSR1);	/* FPGA IRLSSR1(CF_CD clear) */
75da2014a2SPaul Mundt 
76da2014a2SPaul Mundt 	/* Setup the FPGA IRL */
77da2014a2SPaul Mundt 	ctrl_outw(0x0000, PA_IRLPRA);	/* FPGA IRLA */
78da2014a2SPaul Mundt 	ctrl_outw(0xe598, PA_IRLPRB);	/* FPGA IRLB */
79da2014a2SPaul Mundt 	ctrl_outw(0x7060, PA_IRLPRC);	/* FPGA IRLC */
80da2014a2SPaul Mundt 	ctrl_outw(0x0000, PA_IRLPRD);	/* FPGA IRLD */
81da2014a2SPaul Mundt 	ctrl_outw(0x4321, PA_IRLPRE);	/* FPGA IRLE */
82da2014a2SPaul Mundt 	ctrl_outw(0xdcba, PA_IRLPRF);	/* FPGA IRLF */
83da2014a2SPaul Mundt 
84da2014a2SPaul Mundt 	register_intc_controller(&intc_desc);
85da2014a2SPaul Mundt 	return irl2irq;
86da2014a2SPaul Mundt }
87