1 /* 2 * Copyright (C) 2009 Renesas Solutions Corp. 3 * 4 * Kuninori Morimoto <morimoto.kuninori@renesas.com> 5 * 6 * This file is subject to the terms and conditions of the GNU General Public 7 * License. See the file "COPYING" in the main directory of this archive 8 * for more details. 9 */ 10 11 #include <linux/init.h> 12 #include <linux/device.h> 13 #include <linux/platform_device.h> 14 #include <linux/mtd/physmap.h> 15 #include <linux/gpio.h> 16 #include <linux/interrupt.h> 17 #include <linux/io.h> 18 #include <linux/delay.h> 19 #include <linux/usb/r8a66597.h> 20 #include <linux/i2c.h> 21 #include <linux/i2c/tsc2007.h> 22 #include <linux/spi/spi.h> 23 #include <linux/spi/sh_msiof.h> 24 #include <linux/spi/mmc_spi.h> 25 #include <linux/mmc/host.h> 26 #include <linux/input.h> 27 #include <linux/input/sh_keysc.h> 28 #include <linux/mfd/sh_mobile_sdhi.h> 29 #include <video/sh_mobile_lcdc.h> 30 #include <sound/sh_fsi.h> 31 #include <media/sh_mobile_ceu.h> 32 #include <media/tw9910.h> 33 #include <media/mt9t112.h> 34 #include <asm/heartbeat.h> 35 #include <asm/sh_eth.h> 36 #include <asm/clock.h> 37 #include <asm/suspend.h> 38 #include <cpu/sh7724.h> 39 40 /* 41 * Address Interface BusWidth 42 *----------------------------------------- 43 * 0x0000_0000 uboot 16bit 44 * 0x0004_0000 Linux romImage 16bit 45 * 0x0014_0000 MTD for Linux 16bit 46 * 0x0400_0000 Internal I/O 16/32bit 47 * 0x0800_0000 DRAM 32bit 48 * 0x1800_0000 MFI 16bit 49 */ 50 51 /* SWITCH 52 *------------------------------ 53 * DS2[1] = FlashROM write protect ON : write protect 54 * OFF : No write protect 55 * DS2[2] = RMII / TS, SCIF ON : RMII 56 * OFF : TS, SCIF3 57 * DS2[3] = Camera / Video ON : Camera 58 * OFF : NTSC/PAL (IN) 59 * DS2[5] = NTSC_OUT Clock ON : On board OSC 60 * OFF : SH7724 DV_CLK 61 * DS2[6-7] = MMC / SD ON-OFF : SD 62 * OFF-ON : MMC 63 */ 64 65 /* Heartbeat */ 66 static unsigned char led_pos[] = { 0, 1, 2, 3 }; 67 static struct heartbeat_data heartbeat_data = { 68 .regsize = 8, 69 .nr_bits = 4, 70 .bit_pos = led_pos, 71 }; 72 73 static struct resource heartbeat_resources[] = { 74 [0] = { 75 .start = 0xA405012C, /* PTG */ 76 .end = 0xA405012E - 1, 77 .flags = IORESOURCE_MEM, 78 }, 79 }; 80 81 static struct platform_device heartbeat_device = { 82 .name = "heartbeat", 83 .id = -1, 84 .dev = { 85 .platform_data = &heartbeat_data, 86 }, 87 .num_resources = ARRAY_SIZE(heartbeat_resources), 88 .resource = heartbeat_resources, 89 }; 90 91 /* MTD */ 92 static struct mtd_partition nor_flash_partitions[] = { 93 { 94 .name = "boot loader", 95 .offset = 0, 96 .size = (5 * 1024 * 1024), 97 .mask_flags = MTD_WRITEABLE, /* force read-only */ 98 }, { 99 .name = "free-area", 100 .offset = MTDPART_OFS_APPEND, 101 .size = MTDPART_SIZ_FULL, 102 }, 103 }; 104 105 static struct physmap_flash_data nor_flash_data = { 106 .width = 2, 107 .parts = nor_flash_partitions, 108 .nr_parts = ARRAY_SIZE(nor_flash_partitions), 109 }; 110 111 static struct resource nor_flash_resources[] = { 112 [0] = { 113 .name = "NOR Flash", 114 .start = 0x00000000, 115 .end = 0x03ffffff, 116 .flags = IORESOURCE_MEM, 117 } 118 }; 119 120 static struct platform_device nor_flash_device = { 121 .name = "physmap-flash", 122 .resource = nor_flash_resources, 123 .num_resources = ARRAY_SIZE(nor_flash_resources), 124 .dev = { 125 .platform_data = &nor_flash_data, 126 }, 127 }; 128 129 /* SH Eth */ 130 #define SH_ETH_ADDR (0xA4600000) 131 static struct resource sh_eth_resources[] = { 132 [0] = { 133 .start = SH_ETH_ADDR, 134 .end = SH_ETH_ADDR + 0x1FC, 135 .flags = IORESOURCE_MEM, 136 }, 137 [1] = { 138 .start = 91, 139 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, 140 }, 141 }; 142 143 struct sh_eth_plat_data sh_eth_plat = { 144 .phy = 0x1f, /* SMSC LAN8700 */ 145 .edmac_endian = EDMAC_LITTLE_ENDIAN, 146 .ether_link_active_low = 1 147 }; 148 149 static struct platform_device sh_eth_device = { 150 .name = "sh-eth", 151 .id = 0, 152 .dev = { 153 .platform_data = &sh_eth_plat, 154 }, 155 .num_resources = ARRAY_SIZE(sh_eth_resources), 156 .resource = sh_eth_resources, 157 .archdata = { 158 .hwblk_id = HWBLK_ETHER, 159 }, 160 }; 161 162 /* USB0 host */ 163 void usb0_port_power(int port, int power) 164 { 165 gpio_set_value(GPIO_PTB4, power); 166 } 167 168 static struct r8a66597_platdata usb0_host_data = { 169 .on_chip = 1, 170 .port_power = usb0_port_power, 171 }; 172 173 static struct resource usb0_host_resources[] = { 174 [0] = { 175 .start = 0xa4d80000, 176 .end = 0xa4d80124 - 1, 177 .flags = IORESOURCE_MEM, 178 }, 179 [1] = { 180 .start = 65, 181 .end = 65, 182 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW, 183 }, 184 }; 185 186 static struct platform_device usb0_host_device = { 187 .name = "r8a66597_hcd", 188 .id = 0, 189 .dev = { 190 .dma_mask = NULL, /* not use dma */ 191 .coherent_dma_mask = 0xffffffff, 192 .platform_data = &usb0_host_data, 193 }, 194 .num_resources = ARRAY_SIZE(usb0_host_resources), 195 .resource = usb0_host_resources, 196 }; 197 198 /* USB1 host/function */ 199 void usb1_port_power(int port, int power) 200 { 201 gpio_set_value(GPIO_PTB5, power); 202 } 203 204 static struct r8a66597_platdata usb1_common_data = { 205 .on_chip = 1, 206 .port_power = usb1_port_power, 207 }; 208 209 static struct resource usb1_common_resources[] = { 210 [0] = { 211 .start = 0xa4d90000, 212 .end = 0xa4d90124 - 1, 213 .flags = IORESOURCE_MEM, 214 }, 215 [1] = { 216 .start = 66, 217 .end = 66, 218 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW, 219 }, 220 }; 221 222 static struct platform_device usb1_common_device = { 223 /* .name will be added in arch_setup */ 224 .id = 1, 225 .dev = { 226 .dma_mask = NULL, /* not use dma */ 227 .coherent_dma_mask = 0xffffffff, 228 .platform_data = &usb1_common_data, 229 }, 230 .num_resources = ARRAY_SIZE(usb1_common_resources), 231 .resource = usb1_common_resources, 232 }; 233 234 /* LCDC */ 235 static struct sh_mobile_lcdc_info lcdc_info = { 236 .ch[0] = { 237 .interface_type = RGB18, 238 .chan = LCDC_CHAN_MAINLCD, 239 .bpp = 16, 240 .lcd_cfg = { 241 .sync = 0, /* hsync and vsync are active low */ 242 }, 243 .lcd_size_cfg = { /* 7.0 inch */ 244 .width = 152, 245 .height = 91, 246 }, 247 .board_cfg = { 248 }, 249 } 250 }; 251 252 static struct resource lcdc_resources[] = { 253 [0] = { 254 .name = "LCDC", 255 .start = 0xfe940000, 256 .end = 0xfe942fff, 257 .flags = IORESOURCE_MEM, 258 }, 259 [1] = { 260 .start = 106, 261 .flags = IORESOURCE_IRQ, 262 }, 263 }; 264 265 static struct platform_device lcdc_device = { 266 .name = "sh_mobile_lcdc_fb", 267 .num_resources = ARRAY_SIZE(lcdc_resources), 268 .resource = lcdc_resources, 269 .dev = { 270 .platform_data = &lcdc_info, 271 }, 272 .archdata = { 273 .hwblk_id = HWBLK_LCDC, 274 }, 275 }; 276 277 /* CEU0 */ 278 static struct sh_mobile_ceu_info sh_mobile_ceu0_info = { 279 .flags = SH_CEU_FLAG_USE_8BIT_BUS, 280 }; 281 282 static struct resource ceu0_resources[] = { 283 [0] = { 284 .name = "CEU0", 285 .start = 0xfe910000, 286 .end = 0xfe91009f, 287 .flags = IORESOURCE_MEM, 288 }, 289 [1] = { 290 .start = 52, 291 .flags = IORESOURCE_IRQ, 292 }, 293 [2] = { 294 /* place holder for contiguous memory */ 295 }, 296 }; 297 298 static struct platform_device ceu0_device = { 299 .name = "sh_mobile_ceu", 300 .id = 0, /* "ceu0" clock */ 301 .num_resources = ARRAY_SIZE(ceu0_resources), 302 .resource = ceu0_resources, 303 .dev = { 304 .platform_data = &sh_mobile_ceu0_info, 305 }, 306 .archdata = { 307 .hwblk_id = HWBLK_CEU0, 308 }, 309 }; 310 311 /* CEU1 */ 312 static struct sh_mobile_ceu_info sh_mobile_ceu1_info = { 313 .flags = SH_CEU_FLAG_USE_8BIT_BUS, 314 }; 315 316 static struct resource ceu1_resources[] = { 317 [0] = { 318 .name = "CEU1", 319 .start = 0xfe914000, 320 .end = 0xfe91409f, 321 .flags = IORESOURCE_MEM, 322 }, 323 [1] = { 324 .start = 63, 325 .flags = IORESOURCE_IRQ, 326 }, 327 [2] = { 328 /* place holder for contiguous memory */ 329 }, 330 }; 331 332 static struct platform_device ceu1_device = { 333 .name = "sh_mobile_ceu", 334 .id = 1, /* "ceu1" clock */ 335 .num_resources = ARRAY_SIZE(ceu1_resources), 336 .resource = ceu1_resources, 337 .dev = { 338 .platform_data = &sh_mobile_ceu1_info, 339 }, 340 .archdata = { 341 .hwblk_id = HWBLK_CEU1, 342 }, 343 }; 344 345 /* I2C device */ 346 static struct i2c_board_info i2c0_devices[] = { 347 { 348 I2C_BOARD_INFO("da7210", 0x1a), 349 }, 350 }; 351 352 static struct i2c_board_info i2c1_devices[] = { 353 { 354 I2C_BOARD_INFO("r2025sd", 0x32), 355 }, 356 { 357 I2C_BOARD_INFO("lis3lv02d", 0x1c), 358 .irq = 33, 359 } 360 }; 361 362 /* KEYSC */ 363 static struct sh_keysc_info keysc_info = { 364 .mode = SH_KEYSC_MODE_1, 365 .scan_timing = 3, 366 .delay = 50, 367 .kycr2_delay = 100, 368 .keycodes = { KEY_1, 0, 0, 0, 0, 369 KEY_2, 0, 0, 0, 0, 370 KEY_3, 0, 0, 0, 0, 371 KEY_4, 0, 0, 0, 0, 372 KEY_5, 0, 0, 0, 0, 373 KEY_6, 0, 0, 0, 0, }, 374 }; 375 376 static struct resource keysc_resources[] = { 377 [0] = { 378 .name = "KEYSC", 379 .start = 0x044b0000, 380 .end = 0x044b000f, 381 .flags = IORESOURCE_MEM, 382 }, 383 [1] = { 384 .start = 79, 385 .flags = IORESOURCE_IRQ, 386 }, 387 }; 388 389 static struct platform_device keysc_device = { 390 .name = "sh_keysc", 391 .id = 0, /* keysc0 clock */ 392 .num_resources = ARRAY_SIZE(keysc_resources), 393 .resource = keysc_resources, 394 .dev = { 395 .platform_data = &keysc_info, 396 }, 397 .archdata = { 398 .hwblk_id = HWBLK_KEYSC, 399 }, 400 }; 401 402 /* TouchScreen */ 403 #define IRQ0 32 404 static int ts_get_pendown_state(void) 405 { 406 int val = 0; 407 gpio_free(GPIO_FN_INTC_IRQ0); 408 gpio_request(GPIO_PTZ0, NULL); 409 gpio_direction_input(GPIO_PTZ0); 410 411 val = gpio_get_value(GPIO_PTZ0); 412 413 gpio_free(GPIO_PTZ0); 414 gpio_request(GPIO_FN_INTC_IRQ0, NULL); 415 416 return val ? 0 : 1; 417 } 418 419 static int ts_init(void) 420 { 421 gpio_request(GPIO_FN_INTC_IRQ0, NULL); 422 return 0; 423 } 424 425 struct tsc2007_platform_data tsc2007_info = { 426 .model = 2007, 427 .x_plate_ohms = 180, 428 .get_pendown_state = ts_get_pendown_state, 429 .init_platform_hw = ts_init, 430 }; 431 432 static struct i2c_board_info ts_i2c_clients = { 433 I2C_BOARD_INFO("tsc2007", 0x48), 434 .type = "tsc2007", 435 .platform_data = &tsc2007_info, 436 .irq = IRQ0, 437 }; 438 439 #ifdef CONFIG_MFD_SH_MOBILE_SDHI 440 /* SHDI0 */ 441 static void sdhi0_set_pwr(struct platform_device *pdev, int state) 442 { 443 gpio_set_value(GPIO_PTB6, state); 444 } 445 446 static struct sh_mobile_sdhi_info sdhi0_info = { 447 .set_pwr = sdhi0_set_pwr, 448 }; 449 450 static struct resource sdhi0_resources[] = { 451 [0] = { 452 .name = "SDHI0", 453 .start = 0x04ce0000, 454 .end = 0x04ce01ff, 455 .flags = IORESOURCE_MEM, 456 }, 457 [1] = { 458 .start = 101, 459 .flags = IORESOURCE_IRQ, 460 }, 461 }; 462 463 static struct platform_device sdhi0_device = { 464 .name = "sh_mobile_sdhi", 465 .num_resources = ARRAY_SIZE(sdhi0_resources), 466 .resource = sdhi0_resources, 467 .id = 0, 468 .dev = { 469 .platform_data = &sdhi0_info, 470 }, 471 .archdata = { 472 .hwblk_id = HWBLK_SDHI0, 473 }, 474 }; 475 476 /* SHDI1 */ 477 static void sdhi1_set_pwr(struct platform_device *pdev, int state) 478 { 479 gpio_set_value(GPIO_PTB7, state); 480 } 481 482 static struct sh_mobile_sdhi_info sdhi1_info = { 483 .set_pwr = sdhi1_set_pwr, 484 }; 485 486 static struct resource sdhi1_resources[] = { 487 [0] = { 488 .name = "SDHI1", 489 .start = 0x04cf0000, 490 .end = 0x04cf01ff, 491 .flags = IORESOURCE_MEM, 492 }, 493 [1] = { 494 .start = 24, 495 .flags = IORESOURCE_IRQ, 496 }, 497 }; 498 499 static struct platform_device sdhi1_device = { 500 .name = "sh_mobile_sdhi", 501 .num_resources = ARRAY_SIZE(sdhi1_resources), 502 .resource = sdhi1_resources, 503 .id = 1, 504 .dev = { 505 .platform_data = &sdhi1_info, 506 }, 507 .archdata = { 508 .hwblk_id = HWBLK_SDHI1, 509 }, 510 }; 511 512 #else 513 514 /* MMC SPI */ 515 static int mmc_spi_get_ro(struct device *dev) 516 { 517 return gpio_get_value(GPIO_PTY6); 518 } 519 520 static int mmc_spi_get_cd(struct device *dev) 521 { 522 return !gpio_get_value(GPIO_PTY7); 523 } 524 525 static void mmc_spi_setpower(struct device *dev, unsigned int maskval) 526 { 527 gpio_set_value(GPIO_PTB6, maskval ? 1 : 0); 528 } 529 530 static struct mmc_spi_platform_data mmc_spi_info = { 531 .get_ro = mmc_spi_get_ro, 532 .get_cd = mmc_spi_get_cd, 533 .caps = MMC_CAP_NEEDS_POLL, 534 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, /* 3.3V only */ 535 .setpower = mmc_spi_setpower, 536 }; 537 538 static struct spi_board_info spi_bus[] = { 539 { 540 .modalias = "mmc_spi", 541 .platform_data = &mmc_spi_info, 542 .max_speed_hz = 5000000, 543 .mode = SPI_MODE_0, 544 .controller_data = (void *) GPIO_PTM4, 545 }, 546 }; 547 548 /* MSIOF0 */ 549 static struct sh_msiof_spi_info msiof0_data = { 550 .num_chipselect = 1, 551 }; 552 553 static struct resource msiof0_resources[] = { 554 [0] = { 555 .name = "MSIOF0", 556 .start = 0xa4c40000, 557 .end = 0xa4c40063, 558 .flags = IORESOURCE_MEM, 559 }, 560 [1] = { 561 .start = 84, 562 .flags = IORESOURCE_IRQ, 563 }, 564 }; 565 566 static struct platform_device msiof0_device = { 567 .name = "spi_sh_msiof", 568 .id = 0, /* MSIOF0 */ 569 .dev = { 570 .platform_data = &msiof0_data, 571 }, 572 .num_resources = ARRAY_SIZE(msiof0_resources), 573 .resource = msiof0_resources, 574 .archdata = { 575 .hwblk_id = HWBLK_MSIOF0, 576 }, 577 }; 578 579 #endif 580 581 /* I2C Video/Camera */ 582 static struct i2c_board_info i2c_camera[] = { 583 { 584 I2C_BOARD_INFO("tw9910", 0x45), 585 }, 586 { 587 /* 1st camera */ 588 I2C_BOARD_INFO("mt9t112", 0x3c), 589 }, 590 { 591 /* 2nd camera */ 592 I2C_BOARD_INFO("mt9t112", 0x3c), 593 }, 594 }; 595 596 /* tw9910 */ 597 static int tw9910_power(struct device *dev, int mode) 598 { 599 int val = mode ? 0 : 1; 600 601 gpio_set_value(GPIO_PTU2, val); 602 if (mode) 603 mdelay(100); 604 605 return 0; 606 } 607 608 static struct tw9910_video_info tw9910_info = { 609 .buswidth = SOCAM_DATAWIDTH_8, 610 .mpout = TW9910_MPO_FIELD, 611 }; 612 613 static struct soc_camera_link tw9910_link = { 614 .i2c_adapter_id = 0, 615 .bus_id = 1, 616 .power = tw9910_power, 617 .board_info = &i2c_camera[0], 618 .module_name = "tw9910", 619 .priv = &tw9910_info, 620 }; 621 622 /* mt9t112 */ 623 static int mt9t112_power1(struct device *dev, int mode) 624 { 625 gpio_set_value(GPIO_PTA3, mode); 626 if (mode) 627 mdelay(100); 628 629 return 0; 630 } 631 632 static struct mt9t112_camera_info mt9t112_info1 = { 633 .flags = MT9T112_FLAG_PCLK_RISING_EDGE | MT9T112_FLAG_DATAWIDTH_8, 634 .divider = { 0x49, 0x6, 0, 6, 0, 9, 9, 6, 0 }, /* for 24MHz */ 635 }; 636 637 static struct soc_camera_link mt9t112_link1 = { 638 .i2c_adapter_id = 0, 639 .power = mt9t112_power1, 640 .bus_id = 0, 641 .board_info = &i2c_camera[1], 642 .module_name = "mt9t112", 643 .priv = &mt9t112_info1, 644 }; 645 646 static int mt9t112_power2(struct device *dev, int mode) 647 { 648 gpio_set_value(GPIO_PTA4, mode); 649 if (mode) 650 mdelay(100); 651 652 return 0; 653 } 654 655 static struct mt9t112_camera_info mt9t112_info2 = { 656 .flags = MT9T112_FLAG_PCLK_RISING_EDGE | MT9T112_FLAG_DATAWIDTH_8, 657 .divider = { 0x49, 0x6, 0, 6, 0, 9, 9, 6, 0 }, /* for 24MHz */ 658 }; 659 660 static struct soc_camera_link mt9t112_link2 = { 661 .i2c_adapter_id = 1, 662 .power = mt9t112_power2, 663 .bus_id = 1, 664 .board_info = &i2c_camera[2], 665 .module_name = "mt9t112", 666 .priv = &mt9t112_info2, 667 }; 668 669 static struct platform_device camera_devices[] = { 670 { 671 .name = "soc-camera-pdrv", 672 .id = 0, 673 .dev = { 674 .platform_data = &tw9910_link, 675 }, 676 }, 677 { 678 .name = "soc-camera-pdrv", 679 .id = 1, 680 .dev = { 681 .platform_data = &mt9t112_link1, 682 }, 683 }, 684 { 685 .name = "soc-camera-pdrv", 686 .id = 2, 687 .dev = { 688 .platform_data = &mt9t112_link2, 689 }, 690 }, 691 }; 692 693 /* FSI */ 694 /* 695 * FSI-B use external clock which came from da7210. 696 * So, we should change parent of fsi 697 */ 698 #define FCLKBCR 0xa415000c 699 static void fsimck_init(struct clk *clk) 700 { 701 u32 status = ctrl_inl(clk->enable_reg); 702 703 /* use external clock */ 704 status &= ~0x000000ff; 705 status |= 0x00000080; 706 707 ctrl_outl(status, clk->enable_reg); 708 } 709 710 static struct clk_ops fsimck_clk_ops = { 711 .init = fsimck_init, 712 }; 713 714 static struct clk fsimckb_clk = { 715 .name = "fsimckb_clk", 716 .id = -1, 717 .ops = &fsimck_clk_ops, 718 .enable_reg = (void __iomem *)FCLKBCR, 719 .rate = 0, /* unknown */ 720 }; 721 722 struct sh_fsi_platform_info fsi_info = { 723 .portb_flags = SH_FSI_BRS_INV | 724 SH_FSI_OUT_SLAVE_MODE | 725 SH_FSI_IN_SLAVE_MODE | 726 SH_FSI_OFMT(I2S) | 727 SH_FSI_IFMT(I2S), 728 }; 729 730 static struct resource fsi_resources[] = { 731 [0] = { 732 .name = "FSI", 733 .start = 0xFE3C0000, 734 .end = 0xFE3C021d, 735 .flags = IORESOURCE_MEM, 736 }, 737 [1] = { 738 .start = 108, 739 .flags = IORESOURCE_IRQ, 740 }, 741 }; 742 743 static struct platform_device fsi_device = { 744 .name = "sh_fsi", 745 .id = 0, 746 .num_resources = ARRAY_SIZE(fsi_resources), 747 .resource = fsi_resources, 748 .dev = { 749 .platform_data = &fsi_info, 750 }, 751 .archdata = { 752 .hwblk_id = HWBLK_SPU, /* FSI needs SPU hwblk */ 753 }, 754 }; 755 756 static struct platform_device *ecovec_devices[] __initdata = { 757 &heartbeat_device, 758 &nor_flash_device, 759 &sh_eth_device, 760 &usb0_host_device, 761 &usb1_common_device, 762 &lcdc_device, 763 &ceu0_device, 764 &ceu1_device, 765 &keysc_device, 766 #ifdef CONFIG_MFD_SH_MOBILE_SDHI 767 &sdhi0_device, 768 &sdhi1_device, 769 #else 770 &msiof0_device, 771 #endif 772 &camera_devices[0], 773 &camera_devices[1], 774 &camera_devices[2], 775 &fsi_device, 776 }; 777 778 #define EEPROM_ADDR 0x50 779 static u8 mac_read(struct i2c_adapter *a, u8 command) 780 { 781 struct i2c_msg msg[2]; 782 u8 buf; 783 int ret; 784 785 msg[0].addr = EEPROM_ADDR; 786 msg[0].flags = 0; 787 msg[0].len = 1; 788 msg[0].buf = &command; 789 790 msg[1].addr = EEPROM_ADDR; 791 msg[1].flags = I2C_M_RD; 792 msg[1].len = 1; 793 msg[1].buf = &buf; 794 795 ret = i2c_transfer(a, msg, 2); 796 if (ret < 0) { 797 printk(KERN_ERR "error %d\n", ret); 798 buf = 0xff; 799 } 800 801 return buf; 802 } 803 804 static void __init sh_eth_init(struct sh_eth_plat_data *pd) 805 { 806 struct i2c_adapter *a = i2c_get_adapter(1); 807 int i; 808 809 if (!a) { 810 pr_err("can not get I2C 1\n"); 811 return; 812 } 813 814 /* read MAC address frome EEPROM */ 815 for (i = 0; i < sizeof(pd->mac_addr); i++) { 816 pd->mac_addr[i] = mac_read(a, 0x10 + i); 817 msleep(10); 818 } 819 } 820 821 #define PORT_HIZA 0xA4050158 822 #define IODRIVEA 0xA405018A 823 824 extern char ecovec24_sdram_enter_start; 825 extern char ecovec24_sdram_enter_end; 826 extern char ecovec24_sdram_leave_start; 827 extern char ecovec24_sdram_leave_end; 828 829 static int __init arch_setup(void) 830 { 831 struct clk *clk; 832 833 /* register board specific self-refresh code */ 834 sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF, 835 &ecovec24_sdram_enter_start, 836 &ecovec24_sdram_enter_end, 837 &ecovec24_sdram_leave_start, 838 &ecovec24_sdram_leave_end); 839 840 /* enable STATUS0, STATUS2 and PDSTATUS */ 841 gpio_request(GPIO_FN_STATUS0, NULL); 842 gpio_request(GPIO_FN_STATUS2, NULL); 843 gpio_request(GPIO_FN_PDSTATUS, NULL); 844 845 /* enable SCIFA0 */ 846 gpio_request(GPIO_FN_SCIF0_TXD, NULL); 847 gpio_request(GPIO_FN_SCIF0_RXD, NULL); 848 849 /* enable debug LED */ 850 gpio_request(GPIO_PTG0, NULL); 851 gpio_request(GPIO_PTG1, NULL); 852 gpio_request(GPIO_PTG2, NULL); 853 gpio_request(GPIO_PTG3, NULL); 854 gpio_direction_output(GPIO_PTG0, 0); 855 gpio_direction_output(GPIO_PTG1, 0); 856 gpio_direction_output(GPIO_PTG2, 0); 857 gpio_direction_output(GPIO_PTG3, 0); 858 ctrl_outw((ctrl_inw(PORT_HIZA) & ~(0x1 << 1)) , PORT_HIZA); 859 860 /* enable SH-Eth */ 861 gpio_request(GPIO_PTA1, NULL); 862 gpio_direction_output(GPIO_PTA1, 1); 863 mdelay(20); 864 865 gpio_request(GPIO_FN_RMII_RXD0, NULL); 866 gpio_request(GPIO_FN_RMII_RXD1, NULL); 867 gpio_request(GPIO_FN_RMII_TXD0, NULL); 868 gpio_request(GPIO_FN_RMII_TXD1, NULL); 869 gpio_request(GPIO_FN_RMII_REF_CLK, NULL); 870 gpio_request(GPIO_FN_RMII_TX_EN, NULL); 871 gpio_request(GPIO_FN_RMII_RX_ER, NULL); 872 gpio_request(GPIO_FN_RMII_CRS_DV, NULL); 873 gpio_request(GPIO_FN_MDIO, NULL); 874 gpio_request(GPIO_FN_MDC, NULL); 875 gpio_request(GPIO_FN_LNKSTA, NULL); 876 877 /* enable USB */ 878 ctrl_outw(0x0000, 0xA4D80000); 879 ctrl_outw(0x0000, 0xA4D90000); 880 gpio_request(GPIO_PTB3, NULL); 881 gpio_request(GPIO_PTB4, NULL); 882 gpio_request(GPIO_PTB5, NULL); 883 gpio_direction_input(GPIO_PTB3); 884 gpio_direction_output(GPIO_PTB4, 0); 885 gpio_direction_output(GPIO_PTB5, 0); 886 ctrl_outw(0x0600, 0xa40501d4); 887 ctrl_outw(0x0600, 0xa4050192); 888 889 if (gpio_get_value(GPIO_PTB3)) { 890 printk(KERN_INFO "USB1 function is selected\n"); 891 usb1_common_device.name = "r8a66597_udc"; 892 } else { 893 printk(KERN_INFO "USB1 host is selected\n"); 894 usb1_common_device.name = "r8a66597_hcd"; 895 } 896 897 /* enable LCDC */ 898 gpio_request(GPIO_FN_LCDD23, NULL); 899 gpio_request(GPIO_FN_LCDD22, NULL); 900 gpio_request(GPIO_FN_LCDD21, NULL); 901 gpio_request(GPIO_FN_LCDD20, NULL); 902 gpio_request(GPIO_FN_LCDD19, NULL); 903 gpio_request(GPIO_FN_LCDD18, NULL); 904 gpio_request(GPIO_FN_LCDD17, NULL); 905 gpio_request(GPIO_FN_LCDD16, NULL); 906 gpio_request(GPIO_FN_LCDD15, NULL); 907 gpio_request(GPIO_FN_LCDD14, NULL); 908 gpio_request(GPIO_FN_LCDD13, NULL); 909 gpio_request(GPIO_FN_LCDD12, NULL); 910 gpio_request(GPIO_FN_LCDD11, NULL); 911 gpio_request(GPIO_FN_LCDD10, NULL); 912 gpio_request(GPIO_FN_LCDD9, NULL); 913 gpio_request(GPIO_FN_LCDD8, NULL); 914 gpio_request(GPIO_FN_LCDD7, NULL); 915 gpio_request(GPIO_FN_LCDD6, NULL); 916 gpio_request(GPIO_FN_LCDD5, NULL); 917 gpio_request(GPIO_FN_LCDD4, NULL); 918 gpio_request(GPIO_FN_LCDD3, NULL); 919 gpio_request(GPIO_FN_LCDD2, NULL); 920 gpio_request(GPIO_FN_LCDD1, NULL); 921 gpio_request(GPIO_FN_LCDD0, NULL); 922 gpio_request(GPIO_FN_LCDDISP, NULL); 923 gpio_request(GPIO_FN_LCDHSYN, NULL); 924 gpio_request(GPIO_FN_LCDDCK, NULL); 925 gpio_request(GPIO_FN_LCDVSYN, NULL); 926 gpio_request(GPIO_FN_LCDDON, NULL); 927 gpio_request(GPIO_FN_LCDLCLK, NULL); 928 ctrl_outw((ctrl_inw(PORT_HIZA) & ~0x0001), PORT_HIZA); 929 930 gpio_request(GPIO_PTE6, NULL); 931 gpio_request(GPIO_PTU1, NULL); 932 gpio_request(GPIO_PTR1, NULL); 933 gpio_request(GPIO_PTA2, NULL); 934 gpio_direction_input(GPIO_PTE6); 935 gpio_direction_output(GPIO_PTU1, 0); 936 gpio_direction_output(GPIO_PTR1, 0); 937 gpio_direction_output(GPIO_PTA2, 0); 938 939 /* I/O buffer drive ability is high */ 940 ctrl_outw((ctrl_inw(IODRIVEA) & ~0x00c0) | 0x0080 , IODRIVEA); 941 942 if (gpio_get_value(GPIO_PTE6)) { 943 /* DVI */ 944 lcdc_info.clock_source = LCDC_CLK_EXTERNAL; 945 lcdc_info.ch[0].clock_divider = 1, 946 lcdc_info.ch[0].lcd_cfg.name = "DVI"; 947 lcdc_info.ch[0].lcd_cfg.xres = 1280; 948 lcdc_info.ch[0].lcd_cfg.yres = 720; 949 lcdc_info.ch[0].lcd_cfg.left_margin = 220; 950 lcdc_info.ch[0].lcd_cfg.right_margin = 110; 951 lcdc_info.ch[0].lcd_cfg.hsync_len = 40; 952 lcdc_info.ch[0].lcd_cfg.upper_margin = 20; 953 lcdc_info.ch[0].lcd_cfg.lower_margin = 5; 954 lcdc_info.ch[0].lcd_cfg.vsync_len = 5; 955 956 gpio_set_value(GPIO_PTA2, 1); 957 gpio_set_value(GPIO_PTU1, 1); 958 } else { 959 /* Panel */ 960 961 lcdc_info.clock_source = LCDC_CLK_PERIPHERAL; 962 lcdc_info.ch[0].clock_divider = 2, 963 lcdc_info.ch[0].lcd_cfg.name = "Panel"; 964 lcdc_info.ch[0].lcd_cfg.xres = 800; 965 lcdc_info.ch[0].lcd_cfg.yres = 480; 966 lcdc_info.ch[0].lcd_cfg.left_margin = 220; 967 lcdc_info.ch[0].lcd_cfg.right_margin = 110; 968 lcdc_info.ch[0].lcd_cfg.hsync_len = 70; 969 lcdc_info.ch[0].lcd_cfg.upper_margin = 20; 970 lcdc_info.ch[0].lcd_cfg.lower_margin = 5; 971 lcdc_info.ch[0].lcd_cfg.vsync_len = 5; 972 973 gpio_set_value(GPIO_PTR1, 1); 974 975 /* FIXME 976 * 977 * LCDDON control is needed for Panel, 978 * but current sh_mobile_lcdc driver doesn't control it. 979 * It is temporary correspondence 980 */ 981 gpio_request(GPIO_PTF4, NULL); 982 gpio_direction_output(GPIO_PTF4, 1); 983 984 /* enable TouchScreen */ 985 i2c_register_board_info(0, &ts_i2c_clients, 1); 986 set_irq_type(IRQ0, IRQ_TYPE_LEVEL_LOW); 987 } 988 989 /* enable CEU0 */ 990 gpio_request(GPIO_FN_VIO0_D15, NULL); 991 gpio_request(GPIO_FN_VIO0_D14, NULL); 992 gpio_request(GPIO_FN_VIO0_D13, NULL); 993 gpio_request(GPIO_FN_VIO0_D12, NULL); 994 gpio_request(GPIO_FN_VIO0_D11, NULL); 995 gpio_request(GPIO_FN_VIO0_D10, NULL); 996 gpio_request(GPIO_FN_VIO0_D9, NULL); 997 gpio_request(GPIO_FN_VIO0_D8, NULL); 998 gpio_request(GPIO_FN_VIO0_D7, NULL); 999 gpio_request(GPIO_FN_VIO0_D6, NULL); 1000 gpio_request(GPIO_FN_VIO0_D5, NULL); 1001 gpio_request(GPIO_FN_VIO0_D4, NULL); 1002 gpio_request(GPIO_FN_VIO0_D3, NULL); 1003 gpio_request(GPIO_FN_VIO0_D2, NULL); 1004 gpio_request(GPIO_FN_VIO0_D1, NULL); 1005 gpio_request(GPIO_FN_VIO0_D0, NULL); 1006 gpio_request(GPIO_FN_VIO0_VD, NULL); 1007 gpio_request(GPIO_FN_VIO0_CLK, NULL); 1008 gpio_request(GPIO_FN_VIO0_FLD, NULL); 1009 gpio_request(GPIO_FN_VIO0_HD, NULL); 1010 platform_resource_setup_memory(&ceu0_device, "ceu0", 4 << 20); 1011 1012 /* enable CEU1 */ 1013 gpio_request(GPIO_FN_VIO1_D7, NULL); 1014 gpio_request(GPIO_FN_VIO1_D6, NULL); 1015 gpio_request(GPIO_FN_VIO1_D5, NULL); 1016 gpio_request(GPIO_FN_VIO1_D4, NULL); 1017 gpio_request(GPIO_FN_VIO1_D3, NULL); 1018 gpio_request(GPIO_FN_VIO1_D2, NULL); 1019 gpio_request(GPIO_FN_VIO1_D1, NULL); 1020 gpio_request(GPIO_FN_VIO1_D0, NULL); 1021 gpio_request(GPIO_FN_VIO1_FLD, NULL); 1022 gpio_request(GPIO_FN_VIO1_HD, NULL); 1023 gpio_request(GPIO_FN_VIO1_VD, NULL); 1024 gpio_request(GPIO_FN_VIO1_CLK, NULL); 1025 platform_resource_setup_memory(&ceu1_device, "ceu1", 4 << 20); 1026 1027 /* enable KEYSC */ 1028 gpio_request(GPIO_FN_KEYOUT5_IN5, NULL); 1029 gpio_request(GPIO_FN_KEYOUT4_IN6, NULL); 1030 gpio_request(GPIO_FN_KEYOUT3, NULL); 1031 gpio_request(GPIO_FN_KEYOUT2, NULL); 1032 gpio_request(GPIO_FN_KEYOUT1, NULL); 1033 gpio_request(GPIO_FN_KEYOUT0, NULL); 1034 gpio_request(GPIO_FN_KEYIN0, NULL); 1035 1036 /* enable user debug switch */ 1037 gpio_request(GPIO_PTR0, NULL); 1038 gpio_request(GPIO_PTR4, NULL); 1039 gpio_request(GPIO_PTR5, NULL); 1040 gpio_request(GPIO_PTR6, NULL); 1041 gpio_direction_input(GPIO_PTR0); 1042 gpio_direction_input(GPIO_PTR4); 1043 gpio_direction_input(GPIO_PTR5); 1044 gpio_direction_input(GPIO_PTR6); 1045 1046 #ifdef CONFIG_MFD_SH_MOBILE_SDHI 1047 /* enable SDHI0 on CN11 (needs DS2.4 set to ON) */ 1048 gpio_request(GPIO_FN_SDHI0CD, NULL); 1049 gpio_request(GPIO_FN_SDHI0WP, NULL); 1050 gpio_request(GPIO_FN_SDHI0CMD, NULL); 1051 gpio_request(GPIO_FN_SDHI0CLK, NULL); 1052 gpio_request(GPIO_FN_SDHI0D3, NULL); 1053 gpio_request(GPIO_FN_SDHI0D2, NULL); 1054 gpio_request(GPIO_FN_SDHI0D1, NULL); 1055 gpio_request(GPIO_FN_SDHI0D0, NULL); 1056 gpio_request(GPIO_PTB6, NULL); 1057 gpio_direction_output(GPIO_PTB6, 0); 1058 1059 /* enable SDHI1 on CN12 (needs DS2.6,7 set to ON,OFF) */ 1060 gpio_request(GPIO_FN_SDHI1CD, NULL); 1061 gpio_request(GPIO_FN_SDHI1WP, NULL); 1062 gpio_request(GPIO_FN_SDHI1CMD, NULL); 1063 gpio_request(GPIO_FN_SDHI1CLK, NULL); 1064 gpio_request(GPIO_FN_SDHI1D3, NULL); 1065 gpio_request(GPIO_FN_SDHI1D2, NULL); 1066 gpio_request(GPIO_FN_SDHI1D1, NULL); 1067 gpio_request(GPIO_FN_SDHI1D0, NULL); 1068 gpio_request(GPIO_PTB7, NULL); 1069 gpio_direction_output(GPIO_PTB7, 0); 1070 1071 /* I/O buffer drive ability is high for SDHI1 */ 1072 ctrl_outw((ctrl_inw(IODRIVEA) & ~0x3000) | 0x2000 , IODRIVEA); 1073 #else 1074 /* enable MSIOF0 on CN11 (needs DS2.4 set to OFF) */ 1075 gpio_request(GPIO_FN_MSIOF0_TXD, NULL); 1076 gpio_request(GPIO_FN_MSIOF0_RXD, NULL); 1077 gpio_request(GPIO_FN_MSIOF0_TSCK, NULL); 1078 gpio_request(GPIO_PTM4, NULL); /* software CS control of TSYNC pin */ 1079 gpio_direction_output(GPIO_PTM4, 1); /* active low CS */ 1080 gpio_request(GPIO_PTB6, NULL); /* 3.3V power control */ 1081 gpio_direction_output(GPIO_PTB6, 0); /* disable power by default */ 1082 gpio_request(GPIO_PTY6, NULL); /* write protect */ 1083 gpio_direction_input(GPIO_PTY6); 1084 gpio_request(GPIO_PTY7, NULL); /* card detect */ 1085 gpio_direction_input(GPIO_PTY7); 1086 1087 spi_register_board_info(spi_bus, ARRAY_SIZE(spi_bus)); 1088 #endif 1089 1090 /* enable Video */ 1091 gpio_request(GPIO_PTU2, NULL); 1092 gpio_direction_output(GPIO_PTU2, 1); 1093 1094 /* enable Camera */ 1095 gpio_request(GPIO_PTA3, NULL); 1096 gpio_request(GPIO_PTA4, NULL); 1097 gpio_direction_output(GPIO_PTA3, 0); 1098 gpio_direction_output(GPIO_PTA4, 0); 1099 1100 /* enable FSI */ 1101 gpio_request(GPIO_FN_FSIMCKB, NULL); 1102 gpio_request(GPIO_FN_FSIIBSD, NULL); 1103 gpio_request(GPIO_FN_FSIOBSD, NULL); 1104 gpio_request(GPIO_FN_FSIIBBCK, NULL); 1105 gpio_request(GPIO_FN_FSIIBLRCK, NULL); 1106 gpio_request(GPIO_FN_FSIOBBCK, NULL); 1107 gpio_request(GPIO_FN_FSIOBLRCK, NULL); 1108 gpio_request(GPIO_FN_CLKAUDIOBO, NULL); 1109 1110 /* change parent of FSI B */ 1111 clk = clk_get(NULL, "fsib_clk"); 1112 clk_register(&fsimckb_clk); 1113 clk_set_parent(clk, &fsimckb_clk); 1114 clk_set_rate(clk, 11000); 1115 clk_set_rate(&fsimckb_clk, 11000); 1116 clk_put(clk); 1117 1118 gpio_request(GPIO_PTU0, NULL); 1119 gpio_direction_output(GPIO_PTU0, 0); 1120 mdelay(20); 1121 1122 /* enable motion sensor */ 1123 gpio_request(GPIO_FN_INTC_IRQ1, NULL); 1124 gpio_direction_input(GPIO_FN_INTC_IRQ1); 1125 1126 /* enable I2C device */ 1127 i2c_register_board_info(0, i2c0_devices, 1128 ARRAY_SIZE(i2c0_devices)); 1129 1130 i2c_register_board_info(1, i2c1_devices, 1131 ARRAY_SIZE(i2c1_devices)); 1132 1133 return platform_add_devices(ecovec_devices, 1134 ARRAY_SIZE(ecovec_devices)); 1135 } 1136 arch_initcall(arch_setup); 1137 1138 static int __init devices_setup(void) 1139 { 1140 sh_eth_init(&sh_eth_plat); 1141 return 0; 1142 } 1143 device_initcall(devices_setup); 1144 1145 static struct sh_machine_vector mv_ecovec __initmv = { 1146 .mv_name = "R0P7724 (EcoVec)", 1147 }; 1148