xref: /linux/arch/sh/boards/mach-ecovec24/setup.c (revision 2839bd61f671d3debf9ef0893a0470fd97b2e2ce)
1 /*
2  * Copyright (C) 2009 Renesas Solutions Corp.
3  *
4  * Kuninori Morimoto <morimoto.kuninori@renesas.com>
5  *
6  * This file is subject to the terms and conditions of the GNU General Public
7  * License.  See the file "COPYING" in the main directory of this archive
8  * for more details.
9  */
10 
11 #include <linux/init.h>
12 #include <linux/device.h>
13 #include <linux/platform_device.h>
14 #include <linux/mtd/physmap.h>
15 #include <linux/gpio.h>
16 #include <linux/interrupt.h>
17 #include <linux/io.h>
18 #include <linux/delay.h>
19 #include <linux/usb/r8a66597.h>
20 #include <linux/i2c.h>
21 #include <linux/i2c/tsc2007.h>
22 #include <linux/spi/spi.h>
23 #include <linux/spi/sh_msiof.h>
24 #include <linux/spi/mmc_spi.h>
25 #include <linux/mmc/host.h>
26 #include <linux/input.h>
27 #include <linux/input/sh_keysc.h>
28 #include <linux/mfd/sh_mobile_sdhi.h>
29 #include <video/sh_mobile_lcdc.h>
30 #include <sound/sh_fsi.h>
31 #include <media/sh_mobile_ceu.h>
32 #include <media/tw9910.h>
33 #include <media/mt9t112.h>
34 #include <asm/heartbeat.h>
35 #include <asm/sh_eth.h>
36 #include <asm/clock.h>
37 #include <asm/suspend.h>
38 #include <cpu/sh7724.h>
39 
40 /*
41  *  Address      Interface        BusWidth
42  *-----------------------------------------
43  *  0x0000_0000  uboot            16bit
44  *  0x0004_0000  Linux romImage   16bit
45  *  0x0014_0000  MTD for Linux    16bit
46  *  0x0400_0000  Internal I/O     16/32bit
47  *  0x0800_0000  DRAM             32bit
48  *  0x1800_0000  MFI              16bit
49  */
50 
51 /* SWITCH
52  *------------------------------
53  * DS2[1] = FlashROM write protect  ON     : write protect
54  *                                  OFF    : No write protect
55  * DS2[2] = RMII / TS, SCIF         ON     : RMII
56  *                                  OFF    : TS, SCIF3
57  * DS2[3] = Camera / Video          ON     : Camera
58  *                                  OFF    : NTSC/PAL (IN)
59  * DS2[5] = NTSC_OUT Clock          ON     : On board OSC
60  *                                  OFF    : SH7724 DV_CLK
61  * DS2[6-7] = MMC / SD              ON-OFF : SD
62  *                                  OFF-ON : MMC
63  */
64 
65 /* Heartbeat */
66 static unsigned char led_pos[] = { 0, 1, 2, 3 };
67 
68 static struct heartbeat_data heartbeat_data = {
69 	.nr_bits = 4,
70 	.bit_pos = led_pos,
71 };
72 
73 static struct resource heartbeat_resource = {
74 	.start  = 0xA405012C, /* PTG */
75 	.end    = 0xA405012E - 1,
76 	.flags  = IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
77 };
78 
79 static struct platform_device heartbeat_device = {
80 	.name           = "heartbeat",
81 	.id             = -1,
82 	.dev = {
83 		.platform_data = &heartbeat_data,
84 	},
85 	.num_resources  = 1,
86 	.resource       = &heartbeat_resource,
87 };
88 
89 /* MTD */
90 static struct mtd_partition nor_flash_partitions[] = {
91 	{
92 		.name = "boot loader",
93 		.offset = 0,
94 		.size = (5 * 1024 * 1024),
95 		.mask_flags = MTD_WRITEABLE,  /* force read-only */
96 	}, {
97 		.name = "free-area",
98 		.offset = MTDPART_OFS_APPEND,
99 		.size = MTDPART_SIZ_FULL,
100 	},
101 };
102 
103 static struct physmap_flash_data nor_flash_data = {
104 	.width		= 2,
105 	.parts		= nor_flash_partitions,
106 	.nr_parts	= ARRAY_SIZE(nor_flash_partitions),
107 };
108 
109 static struct resource nor_flash_resources[] = {
110 	[0] = {
111 		.name	= "NOR Flash",
112 		.start	= 0x00000000,
113 		.end	= 0x03ffffff,
114 		.flags	= IORESOURCE_MEM,
115 	}
116 };
117 
118 static struct platform_device nor_flash_device = {
119 	.name		= "physmap-flash",
120 	.resource	= nor_flash_resources,
121 	.num_resources	= ARRAY_SIZE(nor_flash_resources),
122 	.dev		= {
123 		.platform_data = &nor_flash_data,
124 	},
125 };
126 
127 /* SH Eth */
128 #define SH_ETH_ADDR	(0xA4600000)
129 static struct resource sh_eth_resources[] = {
130 	[0] = {
131 		.start = SH_ETH_ADDR,
132 		.end   = SH_ETH_ADDR + 0x1FC,
133 		.flags = IORESOURCE_MEM,
134 	},
135 	[1] = {
136 		.start = 91,
137 		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
138 	},
139 };
140 
141 struct sh_eth_plat_data sh_eth_plat = {
142 	.phy = 0x1f, /* SMSC LAN8700 */
143 	.edmac_endian = EDMAC_LITTLE_ENDIAN,
144 	.ether_link_active_low = 1
145 };
146 
147 static struct platform_device sh_eth_device = {
148 	.name = "sh-eth",
149 	.id	= 0,
150 	.dev = {
151 		.platform_data = &sh_eth_plat,
152 	},
153 	.num_resources = ARRAY_SIZE(sh_eth_resources),
154 	.resource = sh_eth_resources,
155 	.archdata = {
156 		.hwblk_id = HWBLK_ETHER,
157 	},
158 };
159 
160 /* USB0 host */
161 void usb0_port_power(int port, int power)
162 {
163 	gpio_set_value(GPIO_PTB4, power);
164 }
165 
166 static struct r8a66597_platdata usb0_host_data = {
167 	.on_chip = 1,
168 	.port_power = usb0_port_power,
169 };
170 
171 static struct resource usb0_host_resources[] = {
172 	[0] = {
173 		.start	= 0xa4d80000,
174 		.end	= 0xa4d80124 - 1,
175 		.flags	= IORESOURCE_MEM,
176 	},
177 	[1] = {
178 		.start	= 65,
179 		.end	= 65,
180 		.flags	= IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
181 	},
182 };
183 
184 static struct platform_device usb0_host_device = {
185 	.name		= "r8a66597_hcd",
186 	.id		= 0,
187 	.dev = {
188 		.dma_mask		= NULL,         /*  not use dma */
189 		.coherent_dma_mask	= 0xffffffff,
190 		.platform_data		= &usb0_host_data,
191 	},
192 	.num_resources	= ARRAY_SIZE(usb0_host_resources),
193 	.resource	= usb0_host_resources,
194 };
195 
196 /* USB1 host/function */
197 void usb1_port_power(int port, int power)
198 {
199 	gpio_set_value(GPIO_PTB5, power);
200 }
201 
202 static struct r8a66597_platdata usb1_common_data = {
203 	.on_chip = 1,
204 	.port_power = usb1_port_power,
205 };
206 
207 static struct resource usb1_common_resources[] = {
208 	[0] = {
209 		.start	= 0xa4d90000,
210 		.end	= 0xa4d90124 - 1,
211 		.flags	= IORESOURCE_MEM,
212 	},
213 	[1] = {
214 		.start	= 66,
215 		.end	= 66,
216 		.flags	= IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
217 	},
218 };
219 
220 static struct platform_device usb1_common_device = {
221 	/* .name will be added in arch_setup */
222 	.id		= 1,
223 	.dev = {
224 		.dma_mask		= NULL,         /*  not use dma */
225 		.coherent_dma_mask	= 0xffffffff,
226 		.platform_data		= &usb1_common_data,
227 	},
228 	.num_resources	= ARRAY_SIZE(usb1_common_resources),
229 	.resource	= usb1_common_resources,
230 };
231 
232 /* LCDC */
233 static struct sh_mobile_lcdc_info lcdc_info = {
234 	.ch[0] = {
235 		.interface_type = RGB18,
236 		.chan = LCDC_CHAN_MAINLCD,
237 		.bpp = 16,
238 		.lcd_cfg = {
239 			.sync = 0, /* hsync and vsync are active low */
240 		},
241 		.lcd_size_cfg = { /* 7.0 inch */
242 			.width = 152,
243 			.height = 91,
244 		},
245 		.board_cfg = {
246 		},
247 	}
248 };
249 
250 static struct resource lcdc_resources[] = {
251 	[0] = {
252 		.name	= "LCDC",
253 		.start	= 0xfe940000,
254 		.end	= 0xfe942fff,
255 		.flags	= IORESOURCE_MEM,
256 	},
257 	[1] = {
258 		.start	= 106,
259 		.flags	= IORESOURCE_IRQ,
260 	},
261 };
262 
263 static struct platform_device lcdc_device = {
264 	.name		= "sh_mobile_lcdc_fb",
265 	.num_resources	= ARRAY_SIZE(lcdc_resources),
266 	.resource	= lcdc_resources,
267 	.dev		= {
268 		.platform_data	= &lcdc_info,
269 	},
270 	.archdata = {
271 		.hwblk_id = HWBLK_LCDC,
272 	},
273 };
274 
275 /* CEU0 */
276 static struct sh_mobile_ceu_info sh_mobile_ceu0_info = {
277 	.flags = SH_CEU_FLAG_USE_8BIT_BUS,
278 };
279 
280 static struct resource ceu0_resources[] = {
281 	[0] = {
282 		.name	= "CEU0",
283 		.start	= 0xfe910000,
284 		.end	= 0xfe91009f,
285 		.flags	= IORESOURCE_MEM,
286 	},
287 	[1] = {
288 		.start  = 52,
289 		.flags  = IORESOURCE_IRQ,
290 	},
291 	[2] = {
292 		/* place holder for contiguous memory */
293 	},
294 };
295 
296 static struct platform_device ceu0_device = {
297 	.name		= "sh_mobile_ceu",
298 	.id             = 0, /* "ceu0" clock */
299 	.num_resources	= ARRAY_SIZE(ceu0_resources),
300 	.resource	= ceu0_resources,
301 	.dev	= {
302 		.platform_data	= &sh_mobile_ceu0_info,
303 	},
304 	.archdata = {
305 		.hwblk_id = HWBLK_CEU0,
306 	},
307 };
308 
309 /* CEU1 */
310 static struct sh_mobile_ceu_info sh_mobile_ceu1_info = {
311 	.flags = SH_CEU_FLAG_USE_8BIT_BUS,
312 };
313 
314 static struct resource ceu1_resources[] = {
315 	[0] = {
316 		.name	= "CEU1",
317 		.start	= 0xfe914000,
318 		.end	= 0xfe91409f,
319 		.flags	= IORESOURCE_MEM,
320 	},
321 	[1] = {
322 		.start  = 63,
323 		.flags  = IORESOURCE_IRQ,
324 	},
325 	[2] = {
326 		/* place holder for contiguous memory */
327 	},
328 };
329 
330 static struct platform_device ceu1_device = {
331 	.name		= "sh_mobile_ceu",
332 	.id             = 1, /* "ceu1" clock */
333 	.num_resources	= ARRAY_SIZE(ceu1_resources),
334 	.resource	= ceu1_resources,
335 	.dev	= {
336 		.platform_data	= &sh_mobile_ceu1_info,
337 	},
338 	.archdata = {
339 		.hwblk_id = HWBLK_CEU1,
340 	},
341 };
342 
343 /* I2C device */
344 static struct i2c_board_info i2c0_devices[] = {
345 	{
346 		I2C_BOARD_INFO("da7210", 0x1a),
347 	},
348 };
349 
350 static struct i2c_board_info i2c1_devices[] = {
351 	{
352 		I2C_BOARD_INFO("r2025sd", 0x32),
353 	},
354 	{
355 		I2C_BOARD_INFO("lis3lv02d", 0x1c),
356 		.irq = 33,
357 	}
358 };
359 
360 /* KEYSC */
361 static struct sh_keysc_info keysc_info = {
362 	.mode		= SH_KEYSC_MODE_1,
363 	.scan_timing	= 3,
364 	.delay		= 50,
365 	.kycr2_delay	= 100,
366 	.keycodes	= { KEY_1, 0, 0, 0, 0,
367 			    KEY_2, 0, 0, 0, 0,
368 			    KEY_3, 0, 0, 0, 0,
369 			    KEY_4, 0, 0, 0, 0,
370 			    KEY_5, 0, 0, 0, 0,
371 			    KEY_6, 0, 0, 0, 0, },
372 };
373 
374 static struct resource keysc_resources[] = {
375 	[0] = {
376 		.name	= "KEYSC",
377 		.start  = 0x044b0000,
378 		.end    = 0x044b000f,
379 		.flags  = IORESOURCE_MEM,
380 	},
381 	[1] = {
382 		.start  = 79,
383 		.flags  = IORESOURCE_IRQ,
384 	},
385 };
386 
387 static struct platform_device keysc_device = {
388 	.name           = "sh_keysc",
389 	.id             = 0, /* keysc0 clock */
390 	.num_resources  = ARRAY_SIZE(keysc_resources),
391 	.resource       = keysc_resources,
392 	.dev	= {
393 		.platform_data	= &keysc_info,
394 	},
395 	.archdata = {
396 		.hwblk_id = HWBLK_KEYSC,
397 	},
398 };
399 
400 /* TouchScreen */
401 #define IRQ0 32
402 static int ts_get_pendown_state(void)
403 {
404 	int val = 0;
405 	gpio_free(GPIO_FN_INTC_IRQ0);
406 	gpio_request(GPIO_PTZ0, NULL);
407 	gpio_direction_input(GPIO_PTZ0);
408 
409 	val = gpio_get_value(GPIO_PTZ0);
410 
411 	gpio_free(GPIO_PTZ0);
412 	gpio_request(GPIO_FN_INTC_IRQ0, NULL);
413 
414 	return val ? 0 : 1;
415 }
416 
417 static int ts_init(void)
418 {
419 	gpio_request(GPIO_FN_INTC_IRQ0, NULL);
420 	return 0;
421 }
422 
423 struct tsc2007_platform_data tsc2007_info = {
424 	.model			= 2007,
425 	.x_plate_ohms		= 180,
426 	.get_pendown_state	= ts_get_pendown_state,
427 	.init_platform_hw	= ts_init,
428 };
429 
430 static struct i2c_board_info ts_i2c_clients = {
431 	I2C_BOARD_INFO("tsc2007", 0x48),
432 	.type		= "tsc2007",
433 	.platform_data	= &tsc2007_info,
434 	.irq		= IRQ0,
435 };
436 
437 #ifdef CONFIG_MFD_SH_MOBILE_SDHI
438 /* SHDI0 */
439 static void sdhi0_set_pwr(struct platform_device *pdev, int state)
440 {
441 	gpio_set_value(GPIO_PTB6, state);
442 }
443 
444 static struct sh_mobile_sdhi_info sdhi0_info = {
445 	.set_pwr = sdhi0_set_pwr,
446 };
447 
448 static struct resource sdhi0_resources[] = {
449 	[0] = {
450 		.name	= "SDHI0",
451 		.start  = 0x04ce0000,
452 		.end    = 0x04ce01ff,
453 		.flags  = IORESOURCE_MEM,
454 	},
455 	[1] = {
456 		.start  = 100,
457 		.flags  = IORESOURCE_IRQ,
458 	},
459 };
460 
461 static struct platform_device sdhi0_device = {
462 	.name           = "sh_mobile_sdhi",
463 	.num_resources  = ARRAY_SIZE(sdhi0_resources),
464 	.resource       = sdhi0_resources,
465 	.id             = 0,
466 	.dev	= {
467 		.platform_data	= &sdhi0_info,
468 	},
469 	.archdata = {
470 		.hwblk_id = HWBLK_SDHI0,
471 	},
472 };
473 
474 /* SHDI1 */
475 static void sdhi1_set_pwr(struct platform_device *pdev, int state)
476 {
477 	gpio_set_value(GPIO_PTB7, state);
478 }
479 
480 static struct sh_mobile_sdhi_info sdhi1_info = {
481 	.set_pwr = sdhi1_set_pwr,
482 };
483 
484 static struct resource sdhi1_resources[] = {
485 	[0] = {
486 		.name	= "SDHI1",
487 		.start  = 0x04cf0000,
488 		.end    = 0x04cf01ff,
489 		.flags  = IORESOURCE_MEM,
490 	},
491 	[1] = {
492 		.start  = 23,
493 		.flags  = IORESOURCE_IRQ,
494 	},
495 };
496 
497 static struct platform_device sdhi1_device = {
498 	.name           = "sh_mobile_sdhi",
499 	.num_resources  = ARRAY_SIZE(sdhi1_resources),
500 	.resource       = sdhi1_resources,
501 	.id             = 1,
502 	.dev	= {
503 		.platform_data	= &sdhi1_info,
504 	},
505 	.archdata = {
506 		.hwblk_id = HWBLK_SDHI1,
507 	},
508 };
509 
510 #else
511 
512 /* MMC SPI */
513 static int mmc_spi_get_ro(struct device *dev)
514 {
515 	return gpio_get_value(GPIO_PTY6);
516 }
517 
518 static int mmc_spi_get_cd(struct device *dev)
519 {
520 	return !gpio_get_value(GPIO_PTY7);
521 }
522 
523 static void mmc_spi_setpower(struct device *dev, unsigned int maskval)
524 {
525 	gpio_set_value(GPIO_PTB6, maskval ? 1 : 0);
526 }
527 
528 static struct mmc_spi_platform_data mmc_spi_info = {
529 	.get_ro = mmc_spi_get_ro,
530 	.get_cd = mmc_spi_get_cd,
531 	.caps = MMC_CAP_NEEDS_POLL,
532 	.ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, /* 3.3V only */
533 	.setpower = mmc_spi_setpower,
534 };
535 
536 static struct spi_board_info spi_bus[] = {
537 	{
538 		.modalias	= "mmc_spi",
539 		.platform_data	= &mmc_spi_info,
540 		.max_speed_hz	= 5000000,
541 		.mode		= SPI_MODE_0,
542 		.controller_data = (void *) GPIO_PTM4,
543 	},
544 };
545 
546 /* MSIOF0 */
547 static struct sh_msiof_spi_info msiof0_data = {
548 	.num_chipselect = 1,
549 };
550 
551 static struct resource msiof0_resources[] = {
552 	[0] = {
553 		.name	= "MSIOF0",
554 		.start	= 0xa4c40000,
555 		.end	= 0xa4c40063,
556 		.flags	= IORESOURCE_MEM,
557 	},
558 	[1] = {
559 		.start	= 84,
560 		.flags	= IORESOURCE_IRQ,
561 	},
562 };
563 
564 static struct platform_device msiof0_device = {
565 	.name		= "spi_sh_msiof",
566 	.id		= 0, /* MSIOF0 */
567 	.dev = {
568 		.platform_data = &msiof0_data,
569 	},
570 	.num_resources	= ARRAY_SIZE(msiof0_resources),
571 	.resource	= msiof0_resources,
572 	.archdata = {
573 		.hwblk_id = HWBLK_MSIOF0,
574 	},
575 };
576 
577 #endif
578 
579 /* I2C Video/Camera */
580 static struct i2c_board_info i2c_camera[] = {
581 	{
582 		I2C_BOARD_INFO("tw9910", 0x45),
583 	},
584 	{
585 		/* 1st camera */
586 		I2C_BOARD_INFO("mt9t112", 0x3c),
587 	},
588 	{
589 		/* 2nd camera */
590 		I2C_BOARD_INFO("mt9t112", 0x3c),
591 	},
592 };
593 
594 /* tw9910 */
595 static int tw9910_power(struct device *dev, int mode)
596 {
597 	int val = mode ? 0 : 1;
598 
599 	gpio_set_value(GPIO_PTU2, val);
600 	if (mode)
601 		mdelay(100);
602 
603 	return 0;
604 }
605 
606 static struct tw9910_video_info tw9910_info = {
607 	.buswidth	= SOCAM_DATAWIDTH_8,
608 	.mpout		= TW9910_MPO_FIELD,
609 };
610 
611 static struct soc_camera_link tw9910_link = {
612 	.i2c_adapter_id	= 0,
613 	.bus_id		= 1,
614 	.power		= tw9910_power,
615 	.board_info	= &i2c_camera[0],
616 	.module_name	= "tw9910",
617 	.priv		= &tw9910_info,
618 };
619 
620 /* mt9t112 */
621 static int mt9t112_power1(struct device *dev, int mode)
622 {
623 	gpio_set_value(GPIO_PTA3, mode);
624 	if (mode)
625 		mdelay(100);
626 
627 	return 0;
628 }
629 
630 static struct mt9t112_camera_info mt9t112_info1 = {
631 	.flags = MT9T112_FLAG_PCLK_RISING_EDGE | MT9T112_FLAG_DATAWIDTH_8,
632 	.divider = { 0x49, 0x6, 0, 6, 0, 9, 9, 6, 0 }, /* for 24MHz */
633 };
634 
635 static struct soc_camera_link mt9t112_link1 = {
636 	.i2c_adapter_id	= 0,
637 	.power		= mt9t112_power1,
638 	.bus_id		= 0,
639 	.board_info	= &i2c_camera[1],
640 	.module_name	= "mt9t112",
641 	.priv		= &mt9t112_info1,
642 };
643 
644 static int mt9t112_power2(struct device *dev, int mode)
645 {
646 	gpio_set_value(GPIO_PTA4, mode);
647 	if (mode)
648 		mdelay(100);
649 
650 	return 0;
651 }
652 
653 static struct mt9t112_camera_info mt9t112_info2 = {
654 	.flags = MT9T112_FLAG_PCLK_RISING_EDGE | MT9T112_FLAG_DATAWIDTH_8,
655 	.divider = { 0x49, 0x6, 0, 6, 0, 9, 9, 6, 0 }, /* for 24MHz */
656 };
657 
658 static struct soc_camera_link mt9t112_link2 = {
659 	.i2c_adapter_id	= 1,
660 	.power		= mt9t112_power2,
661 	.bus_id		= 1,
662 	.board_info	= &i2c_camera[2],
663 	.module_name	= "mt9t112",
664 	.priv		= &mt9t112_info2,
665 };
666 
667 static struct platform_device camera_devices[] = {
668 	{
669 		.name	= "soc-camera-pdrv",
670 		.id	= 0,
671 		.dev	= {
672 			.platform_data = &tw9910_link,
673 		},
674 	},
675 	{
676 		.name	= "soc-camera-pdrv",
677 		.id	= 1,
678 		.dev	= {
679 			.platform_data = &mt9t112_link1,
680 		},
681 	},
682 	{
683 		.name	= "soc-camera-pdrv",
684 		.id	= 2,
685 		.dev	= {
686 			.platform_data = &mt9t112_link2,
687 		},
688 	},
689 };
690 
691 /* FSI */
692 /*
693  * FSI-B use external clock which came from da7210.
694  * So, we should change parent of fsi
695  */
696 #define FCLKBCR		0xa415000c
697 static void fsimck_init(struct clk *clk)
698 {
699 	u32 status = __raw_readl(clk->enable_reg);
700 
701 	/* use external clock */
702 	status &= ~0x000000ff;
703 	status |= 0x00000080;
704 
705 	__raw_writel(status, clk->enable_reg);
706 }
707 
708 static struct clk_ops fsimck_clk_ops = {
709 	.init = fsimck_init,
710 };
711 
712 static struct clk fsimckb_clk = {
713 	.name		= "fsimckb_clk",
714 	.id		= -1,
715 	.ops		= &fsimck_clk_ops,
716 	.enable_reg	= (void __iomem *)FCLKBCR,
717 	.rate		= 0, /* unknown */
718 };
719 
720 struct sh_fsi_platform_info fsi_info = {
721 	.portb_flags = SH_FSI_BRS_INV |
722 		       SH_FSI_OUT_SLAVE_MODE |
723 		       SH_FSI_IN_SLAVE_MODE |
724 		       SH_FSI_OFMT(I2S) |
725 		       SH_FSI_IFMT(I2S),
726 };
727 
728 static struct resource fsi_resources[] = {
729 	[0] = {
730 		.name	= "FSI",
731 		.start	= 0xFE3C0000,
732 		.end	= 0xFE3C021d,
733 		.flags	= IORESOURCE_MEM,
734 	},
735 	[1] = {
736 		.start  = 108,
737 		.flags  = IORESOURCE_IRQ,
738 	},
739 };
740 
741 static struct platform_device fsi_device = {
742 	.name		= "sh_fsi",
743 	.id		= 0,
744 	.num_resources	= ARRAY_SIZE(fsi_resources),
745 	.resource	= fsi_resources,
746 	.dev	= {
747 		.platform_data	= &fsi_info,
748 	},
749 	.archdata = {
750 		.hwblk_id = HWBLK_SPU, /* FSI needs SPU hwblk */
751 	},
752 };
753 
754 /* IrDA */
755 static struct resource irda_resources[] = {
756 	[0] = {
757 		.name	= "IrDA",
758 		.start  = 0xA45D0000,
759 		.end    = 0xA45D0049,
760 		.flags  = IORESOURCE_MEM,
761 	},
762 	[1] = {
763 		.start  = 20,
764 		.flags  = IORESOURCE_IRQ,
765 	},
766 };
767 
768 static struct platform_device irda_device = {
769 	.name           = "sh_sir",
770 	.num_resources  = ARRAY_SIZE(irda_resources),
771 	.resource       = irda_resources,
772 };
773 
774 static struct platform_device *ecovec_devices[] __initdata = {
775 	&heartbeat_device,
776 	&nor_flash_device,
777 	&sh_eth_device,
778 	&usb0_host_device,
779 	&usb1_common_device,
780 	&lcdc_device,
781 	&ceu0_device,
782 	&ceu1_device,
783 	&keysc_device,
784 #ifdef CONFIG_MFD_SH_MOBILE_SDHI
785 	&sdhi0_device,
786 	&sdhi1_device,
787 #else
788 	&msiof0_device,
789 #endif
790 	&camera_devices[0],
791 	&camera_devices[1],
792 	&camera_devices[2],
793 	&fsi_device,
794 	&irda_device,
795 };
796 
797 #define EEPROM_ADDR 0x50
798 static u8 mac_read(struct i2c_adapter *a, u8 command)
799 {
800 	struct i2c_msg msg[2];
801 	u8 buf;
802 	int ret;
803 
804 	msg[0].addr  = EEPROM_ADDR;
805 	msg[0].flags = 0;
806 	msg[0].len   = 1;
807 	msg[0].buf   = &command;
808 
809 	msg[1].addr  = EEPROM_ADDR;
810 	msg[1].flags = I2C_M_RD;
811 	msg[1].len   = 1;
812 	msg[1].buf   = &buf;
813 
814 	ret = i2c_transfer(a, msg, 2);
815 	if (ret < 0) {
816 		printk(KERN_ERR "error %d\n", ret);
817 		buf = 0xff;
818 	}
819 
820 	return buf;
821 }
822 
823 static void __init sh_eth_init(struct sh_eth_plat_data *pd)
824 {
825 	struct i2c_adapter *a = i2c_get_adapter(1);
826 	int i;
827 
828 	if (!a) {
829 		pr_err("can not get I2C 1\n");
830 		return;
831 	}
832 
833 	/* read MAC address frome EEPROM */
834 	for (i = 0; i < sizeof(pd->mac_addr); i++) {
835 		pd->mac_addr[i] = mac_read(a, 0x10 + i);
836 		msleep(10);
837 	}
838 }
839 
840 #define PORT_HIZA 0xA4050158
841 #define IODRIVEA  0xA405018A
842 
843 extern char ecovec24_sdram_enter_start;
844 extern char ecovec24_sdram_enter_end;
845 extern char ecovec24_sdram_leave_start;
846 extern char ecovec24_sdram_leave_end;
847 
848 static int __init arch_setup(void)
849 {
850 	struct clk *clk;
851 
852 	/* register board specific self-refresh code */
853 	sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF |
854 					SUSP_SH_RSTANDBY,
855 					&ecovec24_sdram_enter_start,
856 					&ecovec24_sdram_enter_end,
857 					&ecovec24_sdram_leave_start,
858 					&ecovec24_sdram_leave_end);
859 
860 	/* enable STATUS0, STATUS2 and PDSTATUS */
861 	gpio_request(GPIO_FN_STATUS0, NULL);
862 	gpio_request(GPIO_FN_STATUS2, NULL);
863 	gpio_request(GPIO_FN_PDSTATUS, NULL);
864 
865 	/* enable SCIFA0 */
866 	gpio_request(GPIO_FN_SCIF0_TXD, NULL);
867 	gpio_request(GPIO_FN_SCIF0_RXD, NULL);
868 
869 	/* enable debug LED */
870 	gpio_request(GPIO_PTG0, NULL);
871 	gpio_request(GPIO_PTG1, NULL);
872 	gpio_request(GPIO_PTG2, NULL);
873 	gpio_request(GPIO_PTG3, NULL);
874 	gpio_direction_output(GPIO_PTG0, 0);
875 	gpio_direction_output(GPIO_PTG1, 0);
876 	gpio_direction_output(GPIO_PTG2, 0);
877 	gpio_direction_output(GPIO_PTG3, 0);
878 	__raw_writew((__raw_readw(PORT_HIZA) & ~(0x1 << 1)) , PORT_HIZA);
879 
880 	/* enable SH-Eth */
881 	gpio_request(GPIO_PTA1, NULL);
882 	gpio_direction_output(GPIO_PTA1, 1);
883 	mdelay(20);
884 
885 	gpio_request(GPIO_FN_RMII_RXD0,    NULL);
886 	gpio_request(GPIO_FN_RMII_RXD1,    NULL);
887 	gpio_request(GPIO_FN_RMII_TXD0,    NULL);
888 	gpio_request(GPIO_FN_RMII_TXD1,    NULL);
889 	gpio_request(GPIO_FN_RMII_REF_CLK, NULL);
890 	gpio_request(GPIO_FN_RMII_TX_EN,   NULL);
891 	gpio_request(GPIO_FN_RMII_RX_ER,   NULL);
892 	gpio_request(GPIO_FN_RMII_CRS_DV,  NULL);
893 	gpio_request(GPIO_FN_MDIO,         NULL);
894 	gpio_request(GPIO_FN_MDC,          NULL);
895 	gpio_request(GPIO_FN_LNKSTA,       NULL);
896 
897 	/* enable USB */
898 	__raw_writew(0x0000, 0xA4D80000);
899 	__raw_writew(0x0000, 0xA4D90000);
900 	gpio_request(GPIO_PTB3,  NULL);
901 	gpio_request(GPIO_PTB4,  NULL);
902 	gpio_request(GPIO_PTB5,  NULL);
903 	gpio_direction_input(GPIO_PTB3);
904 	gpio_direction_output(GPIO_PTB4, 0);
905 	gpio_direction_output(GPIO_PTB5, 0);
906 	__raw_writew(0x0600, 0xa40501d4);
907 	__raw_writew(0x0600, 0xa4050192);
908 
909 	if (gpio_get_value(GPIO_PTB3)) {
910 		printk(KERN_INFO "USB1 function is selected\n");
911 		usb1_common_device.name = "r8a66597_udc";
912 	} else {
913 		printk(KERN_INFO "USB1 host is selected\n");
914 		usb1_common_device.name = "r8a66597_hcd";
915 	}
916 
917 	/* enable LCDC */
918 	gpio_request(GPIO_FN_LCDD23,   NULL);
919 	gpio_request(GPIO_FN_LCDD22,   NULL);
920 	gpio_request(GPIO_FN_LCDD21,   NULL);
921 	gpio_request(GPIO_FN_LCDD20,   NULL);
922 	gpio_request(GPIO_FN_LCDD19,   NULL);
923 	gpio_request(GPIO_FN_LCDD18,   NULL);
924 	gpio_request(GPIO_FN_LCDD17,   NULL);
925 	gpio_request(GPIO_FN_LCDD16,   NULL);
926 	gpio_request(GPIO_FN_LCDD15,   NULL);
927 	gpio_request(GPIO_FN_LCDD14,   NULL);
928 	gpio_request(GPIO_FN_LCDD13,   NULL);
929 	gpio_request(GPIO_FN_LCDD12,   NULL);
930 	gpio_request(GPIO_FN_LCDD11,   NULL);
931 	gpio_request(GPIO_FN_LCDD10,   NULL);
932 	gpio_request(GPIO_FN_LCDD9,    NULL);
933 	gpio_request(GPIO_FN_LCDD8,    NULL);
934 	gpio_request(GPIO_FN_LCDD7,    NULL);
935 	gpio_request(GPIO_FN_LCDD6,    NULL);
936 	gpio_request(GPIO_FN_LCDD5,    NULL);
937 	gpio_request(GPIO_FN_LCDD4,    NULL);
938 	gpio_request(GPIO_FN_LCDD3,    NULL);
939 	gpio_request(GPIO_FN_LCDD2,    NULL);
940 	gpio_request(GPIO_FN_LCDD1,    NULL);
941 	gpio_request(GPIO_FN_LCDD0,    NULL);
942 	gpio_request(GPIO_FN_LCDDISP,  NULL);
943 	gpio_request(GPIO_FN_LCDHSYN,  NULL);
944 	gpio_request(GPIO_FN_LCDDCK,   NULL);
945 	gpio_request(GPIO_FN_LCDVSYN,  NULL);
946 	gpio_request(GPIO_FN_LCDDON,   NULL);
947 	gpio_request(GPIO_FN_LCDLCLK,  NULL);
948 	__raw_writew((__raw_readw(PORT_HIZA) & ~0x0001), PORT_HIZA);
949 
950 	gpio_request(GPIO_PTE6, NULL);
951 	gpio_request(GPIO_PTU1, NULL);
952 	gpio_request(GPIO_PTR1, NULL);
953 	gpio_request(GPIO_PTA2, NULL);
954 	gpio_direction_input(GPIO_PTE6);
955 	gpio_direction_output(GPIO_PTU1, 0);
956 	gpio_direction_output(GPIO_PTR1, 0);
957 	gpio_direction_output(GPIO_PTA2, 0);
958 
959 	/* I/O buffer drive ability is high */
960 	__raw_writew((__raw_readw(IODRIVEA) & ~0x00c0) | 0x0080 , IODRIVEA);
961 
962 	if (gpio_get_value(GPIO_PTE6)) {
963 		/* DVI */
964 		lcdc_info.clock_source			= LCDC_CLK_EXTERNAL;
965 		lcdc_info.ch[0].clock_divider		= 1,
966 		lcdc_info.ch[0].lcd_cfg.name		= "DVI";
967 		lcdc_info.ch[0].lcd_cfg.xres		= 1280;
968 		lcdc_info.ch[0].lcd_cfg.yres		= 720;
969 		lcdc_info.ch[0].lcd_cfg.left_margin	= 220;
970 		lcdc_info.ch[0].lcd_cfg.right_margin	= 110;
971 		lcdc_info.ch[0].lcd_cfg.hsync_len	= 40;
972 		lcdc_info.ch[0].lcd_cfg.upper_margin	= 20;
973 		lcdc_info.ch[0].lcd_cfg.lower_margin	= 5;
974 		lcdc_info.ch[0].lcd_cfg.vsync_len	= 5;
975 
976 		gpio_set_value(GPIO_PTA2, 1);
977 		gpio_set_value(GPIO_PTU1, 1);
978 	} else {
979 		/* Panel */
980 
981 		lcdc_info.clock_source			= LCDC_CLK_PERIPHERAL;
982 		lcdc_info.ch[0].clock_divider		= 2,
983 		lcdc_info.ch[0].lcd_cfg.name		= "Panel";
984 		lcdc_info.ch[0].lcd_cfg.xres		= 800;
985 		lcdc_info.ch[0].lcd_cfg.yres		= 480;
986 		lcdc_info.ch[0].lcd_cfg.left_margin	= 220;
987 		lcdc_info.ch[0].lcd_cfg.right_margin	= 110;
988 		lcdc_info.ch[0].lcd_cfg.hsync_len	= 70;
989 		lcdc_info.ch[0].lcd_cfg.upper_margin	= 20;
990 		lcdc_info.ch[0].lcd_cfg.lower_margin	= 5;
991 		lcdc_info.ch[0].lcd_cfg.vsync_len	= 5;
992 
993 		gpio_set_value(GPIO_PTR1, 1);
994 
995 		/* FIXME
996 		 *
997 		 * LCDDON control is needed for Panel,
998 		 * but current sh_mobile_lcdc driver doesn't control it.
999 		 * It is temporary correspondence
1000 		 */
1001 		gpio_request(GPIO_PTF4, NULL);
1002 		gpio_direction_output(GPIO_PTF4, 1);
1003 
1004 		/* enable TouchScreen */
1005 		i2c_register_board_info(0, &ts_i2c_clients, 1);
1006 		set_irq_type(IRQ0, IRQ_TYPE_LEVEL_LOW);
1007 	}
1008 
1009 	/* enable CEU0 */
1010 	gpio_request(GPIO_FN_VIO0_D15, NULL);
1011 	gpio_request(GPIO_FN_VIO0_D14, NULL);
1012 	gpio_request(GPIO_FN_VIO0_D13, NULL);
1013 	gpio_request(GPIO_FN_VIO0_D12, NULL);
1014 	gpio_request(GPIO_FN_VIO0_D11, NULL);
1015 	gpio_request(GPIO_FN_VIO0_D10, NULL);
1016 	gpio_request(GPIO_FN_VIO0_D9,  NULL);
1017 	gpio_request(GPIO_FN_VIO0_D8,  NULL);
1018 	gpio_request(GPIO_FN_VIO0_D7,  NULL);
1019 	gpio_request(GPIO_FN_VIO0_D6,  NULL);
1020 	gpio_request(GPIO_FN_VIO0_D5,  NULL);
1021 	gpio_request(GPIO_FN_VIO0_D4,  NULL);
1022 	gpio_request(GPIO_FN_VIO0_D3,  NULL);
1023 	gpio_request(GPIO_FN_VIO0_D2,  NULL);
1024 	gpio_request(GPIO_FN_VIO0_D1,  NULL);
1025 	gpio_request(GPIO_FN_VIO0_D0,  NULL);
1026 	gpio_request(GPIO_FN_VIO0_VD,  NULL);
1027 	gpio_request(GPIO_FN_VIO0_CLK, NULL);
1028 	gpio_request(GPIO_FN_VIO0_FLD, NULL);
1029 	gpio_request(GPIO_FN_VIO0_HD,  NULL);
1030 	platform_resource_setup_memory(&ceu0_device, "ceu0", 4 << 20);
1031 
1032 	/* enable CEU1 */
1033 	gpio_request(GPIO_FN_VIO1_D7,  NULL);
1034 	gpio_request(GPIO_FN_VIO1_D6,  NULL);
1035 	gpio_request(GPIO_FN_VIO1_D5,  NULL);
1036 	gpio_request(GPIO_FN_VIO1_D4,  NULL);
1037 	gpio_request(GPIO_FN_VIO1_D3,  NULL);
1038 	gpio_request(GPIO_FN_VIO1_D2,  NULL);
1039 	gpio_request(GPIO_FN_VIO1_D1,  NULL);
1040 	gpio_request(GPIO_FN_VIO1_D0,  NULL);
1041 	gpio_request(GPIO_FN_VIO1_FLD, NULL);
1042 	gpio_request(GPIO_FN_VIO1_HD,  NULL);
1043 	gpio_request(GPIO_FN_VIO1_VD,  NULL);
1044 	gpio_request(GPIO_FN_VIO1_CLK, NULL);
1045 	platform_resource_setup_memory(&ceu1_device, "ceu1", 4 << 20);
1046 
1047 	/* enable KEYSC */
1048 	gpio_request(GPIO_FN_KEYOUT5_IN5, NULL);
1049 	gpio_request(GPIO_FN_KEYOUT4_IN6, NULL);
1050 	gpio_request(GPIO_FN_KEYOUT3,     NULL);
1051 	gpio_request(GPIO_FN_KEYOUT2,     NULL);
1052 	gpio_request(GPIO_FN_KEYOUT1,     NULL);
1053 	gpio_request(GPIO_FN_KEYOUT0,     NULL);
1054 	gpio_request(GPIO_FN_KEYIN0,      NULL);
1055 
1056 	/* enable user debug switch */
1057 	gpio_request(GPIO_PTR0, NULL);
1058 	gpio_request(GPIO_PTR4, NULL);
1059 	gpio_request(GPIO_PTR5, NULL);
1060 	gpio_request(GPIO_PTR6, NULL);
1061 	gpio_direction_input(GPIO_PTR0);
1062 	gpio_direction_input(GPIO_PTR4);
1063 	gpio_direction_input(GPIO_PTR5);
1064 	gpio_direction_input(GPIO_PTR6);
1065 
1066 #ifdef CONFIG_MFD_SH_MOBILE_SDHI
1067 	/* enable SDHI0 on CN11 (needs DS2.4 set to ON) */
1068 	gpio_request(GPIO_FN_SDHI0CD,  NULL);
1069 	gpio_request(GPIO_FN_SDHI0WP,  NULL);
1070 	gpio_request(GPIO_FN_SDHI0CMD, NULL);
1071 	gpio_request(GPIO_FN_SDHI0CLK, NULL);
1072 	gpio_request(GPIO_FN_SDHI0D3,  NULL);
1073 	gpio_request(GPIO_FN_SDHI0D2,  NULL);
1074 	gpio_request(GPIO_FN_SDHI0D1,  NULL);
1075 	gpio_request(GPIO_FN_SDHI0D0,  NULL);
1076 	gpio_request(GPIO_PTB6, NULL);
1077 	gpio_direction_output(GPIO_PTB6, 0);
1078 
1079 	/* enable SDHI1 on CN12 (needs DS2.6,7 set to ON,OFF) */
1080 	gpio_request(GPIO_FN_SDHI1CD,  NULL);
1081 	gpio_request(GPIO_FN_SDHI1WP,  NULL);
1082 	gpio_request(GPIO_FN_SDHI1CMD, NULL);
1083 	gpio_request(GPIO_FN_SDHI1CLK, NULL);
1084 	gpio_request(GPIO_FN_SDHI1D3,  NULL);
1085 	gpio_request(GPIO_FN_SDHI1D2,  NULL);
1086 	gpio_request(GPIO_FN_SDHI1D1,  NULL);
1087 	gpio_request(GPIO_FN_SDHI1D0,  NULL);
1088 	gpio_request(GPIO_PTB7, NULL);
1089 	gpio_direction_output(GPIO_PTB7, 0);
1090 
1091 	/* I/O buffer drive ability is high for SDHI1 */
1092 	__raw_writew((__raw_readw(IODRIVEA) & ~0x3000) | 0x2000 , IODRIVEA);
1093 #else
1094 	/* enable MSIOF0 on CN11 (needs DS2.4 set to OFF) */
1095 	gpio_request(GPIO_FN_MSIOF0_TXD, NULL);
1096 	gpio_request(GPIO_FN_MSIOF0_RXD, NULL);
1097 	gpio_request(GPIO_FN_MSIOF0_TSCK, NULL);
1098 	gpio_request(GPIO_PTM4, NULL); /* software CS control of TSYNC pin */
1099 	gpio_direction_output(GPIO_PTM4, 1); /* active low CS */
1100 	gpio_request(GPIO_PTB6, NULL); /* 3.3V power control */
1101 	gpio_direction_output(GPIO_PTB6, 0); /* disable power by default */
1102 	gpio_request(GPIO_PTY6, NULL); /* write protect */
1103 	gpio_direction_input(GPIO_PTY6);
1104 	gpio_request(GPIO_PTY7, NULL); /* card detect */
1105 	gpio_direction_input(GPIO_PTY7);
1106 
1107 	spi_register_board_info(spi_bus, ARRAY_SIZE(spi_bus));
1108 #endif
1109 
1110 	/* enable Video */
1111 	gpio_request(GPIO_PTU2, NULL);
1112 	gpio_direction_output(GPIO_PTU2, 1);
1113 
1114 	/* enable Camera */
1115 	gpio_request(GPIO_PTA3, NULL);
1116 	gpio_request(GPIO_PTA4, NULL);
1117 	gpio_direction_output(GPIO_PTA3, 0);
1118 	gpio_direction_output(GPIO_PTA4, 0);
1119 
1120 	/* enable FSI */
1121 	gpio_request(GPIO_FN_FSIMCKB,    NULL);
1122 	gpio_request(GPIO_FN_FSIIBSD,    NULL);
1123 	gpio_request(GPIO_FN_FSIOBSD,    NULL);
1124 	gpio_request(GPIO_FN_FSIIBBCK,   NULL);
1125 	gpio_request(GPIO_FN_FSIIBLRCK,  NULL);
1126 	gpio_request(GPIO_FN_FSIOBBCK,   NULL);
1127 	gpio_request(GPIO_FN_FSIOBLRCK,  NULL);
1128 	gpio_request(GPIO_FN_CLKAUDIOBO, NULL);
1129 
1130 	/* set SPU2 clock to 83.4 MHz */
1131 	clk = clk_get(NULL, "spu_clk");
1132 	clk_set_rate(clk, clk_round_rate(clk, 83333333));
1133 	clk_put(clk);
1134 
1135 	/* change parent of FSI B */
1136 	clk = clk_get(NULL, "fsib_clk");
1137 	clk_register(&fsimckb_clk);
1138 	clk_set_parent(clk, &fsimckb_clk);
1139 	clk_set_rate(clk, 11000);
1140 	clk_set_rate(&fsimckb_clk, 11000);
1141 	clk_put(clk);
1142 
1143 	gpio_request(GPIO_PTU0, NULL);
1144 	gpio_direction_output(GPIO_PTU0, 0);
1145 	mdelay(20);
1146 
1147 	/* enable motion sensor */
1148 	gpio_request(GPIO_FN_INTC_IRQ1, NULL);
1149 	gpio_direction_input(GPIO_FN_INTC_IRQ1);
1150 
1151 	/* set VPU clock to 166 MHz */
1152 	clk = clk_get(NULL, "vpu_clk");
1153 	clk_set_rate(clk, clk_round_rate(clk, 166000000));
1154 	clk_put(clk);
1155 
1156 	/* enable IrDA */
1157 	gpio_request(GPIO_FN_IRDA_OUT, NULL);
1158 	gpio_request(GPIO_FN_IRDA_IN,  NULL);
1159 	gpio_request(GPIO_PTU5, NULL);
1160 	gpio_direction_output(GPIO_PTU5, 0);
1161 
1162 	/* enable I2C device */
1163 	i2c_register_board_info(0, i2c0_devices,
1164 				ARRAY_SIZE(i2c0_devices));
1165 
1166 	i2c_register_board_info(1, i2c1_devices,
1167 				ARRAY_SIZE(i2c1_devices));
1168 
1169 	return platform_add_devices(ecovec_devices,
1170 				    ARRAY_SIZE(ecovec_devices));
1171 }
1172 arch_initcall(arch_setup);
1173 
1174 static int __init devices_setup(void)
1175 {
1176 	sh_eth_init(&sh_eth_plat);
1177 	return 0;
1178 }
1179 device_initcall(devices_setup);
1180 
1181 static struct sh_machine_vector mv_ecovec __initmv = {
1182 	.mv_name	= "R0P7724 (EcoVec)",
1183 };
1184