xref: /linux/arch/s390/pci/pci_clp.c (revision f884ab15afdc5514e88105c92a4e2e1e6539869a)
1 /*
2  * Copyright IBM Corp. 2012
3  *
4  * Author(s):
5  *   Jan Glauber <jang@linux.vnet.ibm.com>
6  */
7 
8 #define COMPONENT "zPCI"
9 #define pr_fmt(fmt) COMPONENT ": " fmt
10 
11 #include <linux/kernel.h>
12 #include <linux/slab.h>
13 #include <linux/err.h>
14 #include <linux/delay.h>
15 #include <linux/pci.h>
16 #include <asm/pci_debug.h>
17 #include <asm/pci_clp.h>
18 
19 /*
20  * Call Logical Processor
21  * Retry logic is handled by the caller.
22  */
23 static inline u8 clp_instr(void *data)
24 {
25 	struct { u8 _[CLP_BLK_SIZE]; } *req = data;
26 	u64 ignored;
27 	u8 cc;
28 
29 	asm volatile (
30 		"	.insn	rrf,0xb9a00000,%[ign],%[req],0x0,0x2\n"
31 		"	ipm	%[cc]\n"
32 		"	srl	%[cc],28\n"
33 		: [cc] "=d" (cc), [ign] "=d" (ignored), "+m" (*req)
34 		: [req] "a" (req)
35 		: "cc");
36 	return cc;
37 }
38 
39 static void *clp_alloc_block(void)
40 {
41 	return (void *) __get_free_pages(GFP_KERNEL, get_order(CLP_BLK_SIZE));
42 }
43 
44 static void clp_free_block(void *ptr)
45 {
46 	free_pages((unsigned long) ptr, get_order(CLP_BLK_SIZE));
47 }
48 
49 static void clp_store_query_pci_fngrp(struct zpci_dev *zdev,
50 				      struct clp_rsp_query_pci_grp *response)
51 {
52 	zdev->tlb_refresh = response->refresh;
53 	zdev->dma_mask = response->dasm;
54 	zdev->msi_addr = response->msia;
55 	zdev->fmb_update = response->mui;
56 
57 	pr_debug("Supported number of MSI vectors: %u\n", response->noi);
58 	switch (response->version) {
59 	case 1:
60 		zdev->max_bus_speed = PCIE_SPEED_5_0GT;
61 		break;
62 	default:
63 		zdev->max_bus_speed = PCI_SPEED_UNKNOWN;
64 		break;
65 	}
66 }
67 
68 static int clp_query_pci_fngrp(struct zpci_dev *zdev, u8 pfgid)
69 {
70 	struct clp_req_rsp_query_pci_grp *rrb;
71 	int rc;
72 
73 	rrb = clp_alloc_block();
74 	if (!rrb)
75 		return -ENOMEM;
76 
77 	memset(rrb, 0, sizeof(*rrb));
78 	rrb->request.hdr.len = sizeof(rrb->request);
79 	rrb->request.hdr.cmd = CLP_QUERY_PCI_FNGRP;
80 	rrb->response.hdr.len = sizeof(rrb->response);
81 	rrb->request.pfgid = pfgid;
82 
83 	rc = clp_instr(rrb);
84 	if (!rc && rrb->response.hdr.rsp == CLP_RC_OK)
85 		clp_store_query_pci_fngrp(zdev, &rrb->response);
86 	else {
87 		pr_err("Query PCI FNGRP failed with response: %x  cc: %d\n",
88 			rrb->response.hdr.rsp, rc);
89 		rc = -EIO;
90 	}
91 	clp_free_block(rrb);
92 	return rc;
93 }
94 
95 static int clp_store_query_pci_fn(struct zpci_dev *zdev,
96 				  struct clp_rsp_query_pci *response)
97 {
98 	int i;
99 
100 	for (i = 0; i < PCI_BAR_COUNT; i++) {
101 		zdev->bars[i].val = le32_to_cpu(response->bar[i]);
102 		zdev->bars[i].size = response->bar_size[i];
103 	}
104 	zdev->start_dma = response->sdma;
105 	zdev->end_dma = response->edma;
106 	zdev->pchid = response->pchid;
107 	zdev->pfgid = response->pfgid;
108 	return 0;
109 }
110 
111 static int clp_query_pci_fn(struct zpci_dev *zdev, u32 fh)
112 {
113 	struct clp_req_rsp_query_pci *rrb;
114 	int rc;
115 
116 	rrb = clp_alloc_block();
117 	if (!rrb)
118 		return -ENOMEM;
119 
120 	memset(rrb, 0, sizeof(*rrb));
121 	rrb->request.hdr.len = sizeof(rrb->request);
122 	rrb->request.hdr.cmd = CLP_QUERY_PCI_FN;
123 	rrb->response.hdr.len = sizeof(rrb->response);
124 	rrb->request.fh = fh;
125 
126 	rc = clp_instr(rrb);
127 	if (!rc && rrb->response.hdr.rsp == CLP_RC_OK) {
128 		rc = clp_store_query_pci_fn(zdev, &rrb->response);
129 		if (rc)
130 			goto out;
131 		if (rrb->response.pfgid)
132 			rc = clp_query_pci_fngrp(zdev, rrb->response.pfgid);
133 	} else {
134 		pr_err("Query PCI failed with response: %x  cc: %d\n",
135 			 rrb->response.hdr.rsp, rc);
136 		rc = -EIO;
137 	}
138 out:
139 	clp_free_block(rrb);
140 	return rc;
141 }
142 
143 int clp_add_pci_device(u32 fid, u32 fh, int configured)
144 {
145 	struct zpci_dev *zdev;
146 	int rc;
147 
148 	zpci_dbg(3, "add fid:%x, fh:%x, c:%d\n", fid, fh, configured);
149 	zdev = zpci_alloc_device();
150 	if (IS_ERR(zdev))
151 		return PTR_ERR(zdev);
152 
153 	zdev->fh = fh;
154 	zdev->fid = fid;
155 
156 	/* Query function properties and update zdev */
157 	rc = clp_query_pci_fn(zdev, fh);
158 	if (rc)
159 		goto error;
160 
161 	if (configured)
162 		zdev->state = ZPCI_FN_STATE_CONFIGURED;
163 	else
164 		zdev->state = ZPCI_FN_STATE_STANDBY;
165 
166 	rc = zpci_create_device(zdev);
167 	if (rc)
168 		goto error;
169 	return 0;
170 
171 error:
172 	zpci_free_device(zdev);
173 	return rc;
174 }
175 
176 /*
177  * Enable/Disable a given PCI function defined by its function handle.
178  */
179 static int clp_set_pci_fn(u32 *fh, u8 nr_dma_as, u8 command)
180 {
181 	struct clp_req_rsp_set_pci *rrb;
182 	int rc, retries = 1000;
183 
184 	rrb = clp_alloc_block();
185 	if (!rrb)
186 		return -ENOMEM;
187 
188 	do {
189 		memset(rrb, 0, sizeof(*rrb));
190 		rrb->request.hdr.len = sizeof(rrb->request);
191 		rrb->request.hdr.cmd = CLP_SET_PCI_FN;
192 		rrb->response.hdr.len = sizeof(rrb->response);
193 		rrb->request.fh = *fh;
194 		rrb->request.oc = command;
195 		rrb->request.ndas = nr_dma_as;
196 
197 		rc = clp_instr(rrb);
198 		if (rrb->response.hdr.rsp == CLP_RC_SETPCIFN_BUSY) {
199 			retries--;
200 			if (retries < 0)
201 				break;
202 			msleep(1);
203 		}
204 	} while (rrb->response.hdr.rsp == CLP_RC_SETPCIFN_BUSY);
205 
206 	if (!rc && rrb->response.hdr.rsp == CLP_RC_OK)
207 		*fh = rrb->response.fh;
208 	else {
209 		zpci_dbg(0, "SPF fh:%x, cc:%d, resp:%x\n", *fh, rc,
210 			 rrb->response.hdr.rsp);
211 		rc = -EIO;
212 	}
213 	clp_free_block(rrb);
214 	return rc;
215 }
216 
217 int clp_enable_fh(struct zpci_dev *zdev, u8 nr_dma_as)
218 {
219 	u32 fh = zdev->fh;
220 	int rc;
221 
222 	rc = clp_set_pci_fn(&fh, nr_dma_as, CLP_SET_ENABLE_PCI_FN);
223 	if (!rc)
224 		/* Success -> store enabled handle in zdev */
225 		zdev->fh = fh;
226 
227 	zpci_dbg(3, "ena fid:%x, fh:%x, rc:%d\n", zdev->fid, zdev->fh, rc);
228 	return rc;
229 }
230 
231 int clp_disable_fh(struct zpci_dev *zdev)
232 {
233 	u32 fh = zdev->fh;
234 	int rc;
235 
236 	if (!zdev_enabled(zdev))
237 		return 0;
238 
239 	dev_info(&zdev->pdev->dev, "disabling fn handle: 0x%x\n", fh);
240 	rc = clp_set_pci_fn(&fh, 0, CLP_SET_DISABLE_PCI_FN);
241 	if (!rc)
242 		/* Success -> store disabled handle in zdev */
243 		zdev->fh = fh;
244 
245 	zpci_dbg(3, "dis fid:%x, fh:%x, rc:%d\n", zdev->fid, zdev->fh, rc);
246 	return rc;
247 }
248 
249 static void clp_check_pcifn_entry(struct clp_fh_list_entry *entry)
250 {
251 	int present, rc;
252 
253 	if (!entry->vendor_id)
254 		return;
255 
256 	/* TODO: be a little bit more scalable */
257 	present = zpci_fid_present(entry->fid);
258 
259 	if (present)
260 		pr_debug("%s: device %x already present\n", __func__, entry->fid);
261 
262 	/* skip already used functions */
263 	if (present && entry->config_state)
264 		return;
265 
266 	/* aev 306: function moved to stand-by state */
267 	if (present && !entry->config_state) {
268 		/*
269 		 * The handle is already disabled, that means no iota/irq freeing via
270 		 * the firmware interfaces anymore. Need to free resources manually
271 		 * (DMA memory, debug, sysfs)...
272 		 */
273 		zpci_stop_device(get_zdev_by_fid(entry->fid));
274 		return;
275 	}
276 
277 	rc = clp_add_pci_device(entry->fid, entry->fh, entry->config_state);
278 	if (rc)
279 		pr_err("Failed to add fid: 0x%x\n", entry->fid);
280 }
281 
282 int clp_find_pci_devices(void)
283 {
284 	struct clp_req_rsp_list_pci *rrb;
285 	u64 resume_token = 0;
286 	int entries, i, rc;
287 
288 	rrb = clp_alloc_block();
289 	if (!rrb)
290 		return -ENOMEM;
291 
292 	do {
293 		memset(rrb, 0, sizeof(*rrb));
294 		rrb->request.hdr.len = sizeof(rrb->request);
295 		rrb->request.hdr.cmd = CLP_LIST_PCI;
296 		/* store as many entries as possible */
297 		rrb->response.hdr.len = CLP_BLK_SIZE - LIST_PCI_HDR_LEN;
298 		rrb->request.resume_token = resume_token;
299 
300 		/* Get PCI function handle list */
301 		rc = clp_instr(rrb);
302 		if (rc || rrb->response.hdr.rsp != CLP_RC_OK) {
303 			pr_err("List PCI failed with response: 0x%x  cc: %d\n",
304 				rrb->response.hdr.rsp, rc);
305 			rc = -EIO;
306 			goto out;
307 		}
308 
309 		WARN_ON_ONCE(rrb->response.entry_size !=
310 			sizeof(struct clp_fh_list_entry));
311 
312 		entries = (rrb->response.hdr.len - LIST_PCI_HDR_LEN) /
313 			rrb->response.entry_size;
314 		pr_info("Detected number of PCI functions: %u\n", entries);
315 
316 		/* Store the returned resume token as input for the next call */
317 		resume_token = rrb->response.resume_token;
318 
319 		for (i = 0; i < entries; i++)
320 			clp_check_pcifn_entry(&rrb->response.fh_list[i]);
321 	} while (resume_token);
322 
323 	pr_debug("Maximum number of supported PCI functions: %u\n",
324 		rrb->response.max_fn);
325 out:
326 	clp_free_block(rrb);
327 	return rc;
328 }
329