1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright IBM Corp. 2012 4 * 5 * Author(s): 6 * Jan Glauber <jang@linux.vnet.ibm.com> 7 */ 8 9 #define KMSG_COMPONENT "zpci" 10 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt 11 12 #include <linux/compat.h> 13 #include <linux/kernel.h> 14 #include <linux/miscdevice.h> 15 #include <linux/slab.h> 16 #include <linux/err.h> 17 #include <linux/delay.h> 18 #include <linux/pci.h> 19 #include <linux/uaccess.h> 20 #include <asm/pci_debug.h> 21 #include <asm/pci_clp.h> 22 #include <asm/clp.h> 23 #include <uapi/asm/clp.h> 24 25 bool zpci_unique_uid; 26 27 void update_uid_checking(bool new) 28 { 29 if (zpci_unique_uid != new) 30 zpci_dbg(1, "uid checking:%d\n", new); 31 32 zpci_unique_uid = new; 33 } 34 35 static inline void zpci_err_clp(unsigned int rsp, int rc) 36 { 37 struct { 38 unsigned int rsp; 39 int rc; 40 } __packed data = {rsp, rc}; 41 42 zpci_err_hex(&data, sizeof(data)); 43 } 44 45 /* 46 * Call Logical Processor with c=1, lps=0 and command 1 47 * to get the bit mask of installed logical processors 48 */ 49 static inline int clp_get_ilp(unsigned long *ilp) 50 { 51 unsigned long mask; 52 int cc = 3; 53 54 asm volatile ( 55 " .insn rrf,0xb9a00000,%[mask],%[cmd],8,0\n" 56 "0: ipm %[cc]\n" 57 " srl %[cc],28\n" 58 "1:\n" 59 EX_TABLE(0b, 1b) 60 : [cc] "+d" (cc), [mask] "=d" (mask) : [cmd] "a" (1) 61 : "cc"); 62 *ilp = mask; 63 return cc; 64 } 65 66 /* 67 * Call Logical Processor with c=0, the give constant lps and an lpcb request. 68 */ 69 static __always_inline int clp_req(void *data, unsigned int lps) 70 { 71 struct { u8 _[CLP_BLK_SIZE]; } *req = data; 72 u64 ignored; 73 int cc = 3; 74 75 asm volatile ( 76 " .insn rrf,0xb9a00000,%[ign],%[req],0,%[lps]\n" 77 "0: ipm %[cc]\n" 78 " srl %[cc],28\n" 79 "1:\n" 80 EX_TABLE(0b, 1b) 81 : [cc] "+d" (cc), [ign] "=d" (ignored), "+m" (*req) 82 : [req] "a" (req), [lps] "i" (lps) 83 : "cc"); 84 return cc; 85 } 86 87 static void *clp_alloc_block(gfp_t gfp_mask) 88 { 89 return (void *) __get_free_pages(gfp_mask, get_order(CLP_BLK_SIZE)); 90 } 91 92 static void clp_free_block(void *ptr) 93 { 94 free_pages((unsigned long) ptr, get_order(CLP_BLK_SIZE)); 95 } 96 97 static void clp_store_query_pci_fngrp(struct zpci_dev *zdev, 98 struct clp_rsp_query_pci_grp *response) 99 { 100 zdev->tlb_refresh = response->refresh; 101 zdev->dma_mask = response->dasm; 102 zdev->msi_addr = response->msia; 103 zdev->max_msi = response->noi; 104 zdev->fmb_update = response->mui; 105 zdev->version = response->version; 106 107 switch (response->version) { 108 case 1: 109 zdev->max_bus_speed = PCIE_SPEED_5_0GT; 110 break; 111 default: 112 zdev->max_bus_speed = PCI_SPEED_UNKNOWN; 113 break; 114 } 115 } 116 117 static int clp_query_pci_fngrp(struct zpci_dev *zdev, u8 pfgid) 118 { 119 struct clp_req_rsp_query_pci_grp *rrb; 120 int rc; 121 122 rrb = clp_alloc_block(GFP_KERNEL); 123 if (!rrb) 124 return -ENOMEM; 125 126 memset(rrb, 0, sizeof(*rrb)); 127 rrb->request.hdr.len = sizeof(rrb->request); 128 rrb->request.hdr.cmd = CLP_QUERY_PCI_FNGRP; 129 rrb->response.hdr.len = sizeof(rrb->response); 130 rrb->request.pfgid = pfgid; 131 132 rc = clp_req(rrb, CLP_LPS_PCI); 133 if (!rc && rrb->response.hdr.rsp == CLP_RC_OK) 134 clp_store_query_pci_fngrp(zdev, &rrb->response); 135 else { 136 zpci_err("Q PCI FGRP:\n"); 137 zpci_err_clp(rrb->response.hdr.rsp, rc); 138 rc = -EIO; 139 } 140 clp_free_block(rrb); 141 return rc; 142 } 143 144 static int clp_store_query_pci_fn(struct zpci_dev *zdev, 145 struct clp_rsp_query_pci *response) 146 { 147 int i; 148 149 for (i = 0; i < PCI_STD_NUM_BARS; i++) { 150 zdev->bars[i].val = le32_to_cpu(response->bar[i]); 151 zdev->bars[i].size = response->bar_size[i]; 152 } 153 zdev->start_dma = response->sdma; 154 zdev->end_dma = response->edma; 155 zdev->pchid = response->pchid; 156 zdev->pfgid = response->pfgid; 157 zdev->pft = response->pft; 158 zdev->vfn = response->vfn; 159 zdev->port = response->port; 160 zdev->uid = response->uid; 161 zdev->fmb_length = sizeof(u32) * response->fmb_len; 162 zdev->rid_available = response->rid_avail; 163 zdev->is_physfn = response->is_physfn; 164 if (!s390_pci_no_rid && zdev->rid_available) 165 zdev->devfn = response->rid & ZPCI_RID_MASK_DEVFN; 166 167 memcpy(zdev->pfip, response->pfip, sizeof(zdev->pfip)); 168 if (response->util_str_avail) { 169 memcpy(zdev->util_str, response->util_str, 170 sizeof(zdev->util_str)); 171 zdev->util_str_avail = 1; 172 } 173 zdev->mio_capable = response->mio_addr_avail; 174 for (i = 0; i < PCI_STD_NUM_BARS; i++) { 175 if (!(response->mio.valid & (1 << (PCI_STD_NUM_BARS - i - 1)))) 176 continue; 177 178 zdev->bars[i].mio_wb = (void __iomem *) response->mio.addr[i].wb; 179 zdev->bars[i].mio_wt = (void __iomem *) response->mio.addr[i].wt; 180 } 181 return 0; 182 } 183 184 int clp_query_pci_fn(struct zpci_dev *zdev) 185 { 186 struct clp_req_rsp_query_pci *rrb; 187 int rc; 188 189 rrb = clp_alloc_block(GFP_KERNEL); 190 if (!rrb) 191 return -ENOMEM; 192 193 memset(rrb, 0, sizeof(*rrb)); 194 rrb->request.hdr.len = sizeof(rrb->request); 195 rrb->request.hdr.cmd = CLP_QUERY_PCI_FN; 196 rrb->response.hdr.len = sizeof(rrb->response); 197 rrb->request.fh = zdev->fh; 198 199 rc = clp_req(rrb, CLP_LPS_PCI); 200 if (!rc && rrb->response.hdr.rsp == CLP_RC_OK) { 201 rc = clp_store_query_pci_fn(zdev, &rrb->response); 202 if (rc) 203 goto out; 204 rc = clp_query_pci_fngrp(zdev, rrb->response.pfgid); 205 } else { 206 zpci_err("Q PCI FN:\n"); 207 zpci_err_clp(rrb->response.hdr.rsp, rc); 208 rc = -EIO; 209 } 210 out: 211 clp_free_block(rrb); 212 return rc; 213 } 214 215 /** 216 * clp_set_pci_fn() - Execute a command on a PCI function 217 * @zdev: Function that will be affected 218 * @fh: Out parameter for updated function handle 219 * @nr_dma_as: DMA address space number 220 * @command: The command code to execute 221 * 222 * Returns: 0 on success, < 0 for Linux errors (e.g. -ENOMEM), and 223 * > 0 for non-success platform responses 224 */ 225 static int clp_set_pci_fn(struct zpci_dev *zdev, u32 *fh, u8 nr_dma_as, u8 command) 226 { 227 struct clp_req_rsp_set_pci *rrb; 228 int rc, retries = 100; 229 230 *fh = 0; 231 rrb = clp_alloc_block(GFP_KERNEL); 232 if (!rrb) 233 return -ENOMEM; 234 235 do { 236 memset(rrb, 0, sizeof(*rrb)); 237 rrb->request.hdr.len = sizeof(rrb->request); 238 rrb->request.hdr.cmd = CLP_SET_PCI_FN; 239 rrb->response.hdr.len = sizeof(rrb->response); 240 rrb->request.fh = zdev->fh; 241 rrb->request.oc = command; 242 rrb->request.ndas = nr_dma_as; 243 244 rc = clp_req(rrb, CLP_LPS_PCI); 245 if (rrb->response.hdr.rsp == CLP_RC_SETPCIFN_BUSY) { 246 retries--; 247 if (retries < 0) 248 break; 249 msleep(20); 250 } 251 } while (rrb->response.hdr.rsp == CLP_RC_SETPCIFN_BUSY); 252 253 if (!rc && rrb->response.hdr.rsp == CLP_RC_OK) { 254 *fh = rrb->response.fh; 255 } else { 256 zpci_err("Set PCI FN:\n"); 257 zpci_err_clp(rrb->response.hdr.rsp, rc); 258 if (!rc) 259 rc = rrb->response.hdr.rsp; 260 } 261 clp_free_block(rrb); 262 return rc; 263 } 264 265 int clp_setup_writeback_mio(void) 266 { 267 struct clp_req_rsp_slpc_pci *rrb; 268 u8 wb_bit_pos; 269 int rc; 270 271 rrb = clp_alloc_block(GFP_KERNEL); 272 if (!rrb) 273 return -ENOMEM; 274 275 memset(rrb, 0, sizeof(*rrb)); 276 rrb->request.hdr.len = sizeof(rrb->request); 277 rrb->request.hdr.cmd = CLP_SLPC; 278 rrb->response.hdr.len = sizeof(rrb->response); 279 280 rc = clp_req(rrb, CLP_LPS_PCI); 281 if (!rc && rrb->response.hdr.rsp == CLP_RC_OK) { 282 if (rrb->response.vwb) { 283 wb_bit_pos = rrb->response.mio_wb; 284 set_bit_inv(wb_bit_pos, &mio_wb_bit_mask); 285 zpci_dbg(3, "wb bit: %d\n", wb_bit_pos); 286 } else { 287 zpci_dbg(3, "wb bit: n.a.\n"); 288 } 289 290 } else { 291 zpci_err("SLPC PCI:\n"); 292 zpci_err_clp(rrb->response.hdr.rsp, rc); 293 rc = -EIO; 294 } 295 clp_free_block(rrb); 296 return rc; 297 } 298 299 int clp_enable_fh(struct zpci_dev *zdev, u32 *fh, u8 nr_dma_as) 300 { 301 int rc; 302 303 rc = clp_set_pci_fn(zdev, fh, nr_dma_as, CLP_SET_ENABLE_PCI_FN); 304 zpci_dbg(3, "ena fid:%x, fh:%x, rc:%d\n", zdev->fid, *fh, rc); 305 if (!rc && zpci_use_mio(zdev)) { 306 rc = clp_set_pci_fn(zdev, fh, nr_dma_as, CLP_SET_ENABLE_MIO); 307 zpci_dbg(3, "ena mio fid:%x, fh:%x, rc:%d\n", 308 zdev->fid, *fh, rc); 309 if (rc) 310 clp_disable_fh(zdev, fh); 311 } 312 return rc; 313 } 314 315 int clp_disable_fh(struct zpci_dev *zdev, u32 *fh) 316 { 317 int rc; 318 319 if (!zdev_enabled(zdev)) 320 return 0; 321 322 rc = clp_set_pci_fn(zdev, fh, 0, CLP_SET_DISABLE_PCI_FN); 323 zpci_dbg(3, "dis fid:%x, fh:%x, rc:%d\n", zdev->fid, *fh, rc); 324 return rc; 325 } 326 327 static int clp_list_pci_req(struct clp_req_rsp_list_pci *rrb, 328 u64 *resume_token, int *nentries) 329 { 330 int rc; 331 332 memset(rrb, 0, sizeof(*rrb)); 333 rrb->request.hdr.len = sizeof(rrb->request); 334 rrb->request.hdr.cmd = CLP_LIST_PCI; 335 /* store as many entries as possible */ 336 rrb->response.hdr.len = CLP_BLK_SIZE - LIST_PCI_HDR_LEN; 337 rrb->request.resume_token = *resume_token; 338 339 /* Get PCI function handle list */ 340 rc = clp_req(rrb, CLP_LPS_PCI); 341 if (rc || rrb->response.hdr.rsp != CLP_RC_OK) { 342 zpci_err("List PCI FN:\n"); 343 zpci_err_clp(rrb->response.hdr.rsp, rc); 344 return -EIO; 345 } 346 347 update_uid_checking(rrb->response.uid_checking); 348 WARN_ON_ONCE(rrb->response.entry_size != 349 sizeof(struct clp_fh_list_entry)); 350 351 *nentries = (rrb->response.hdr.len - LIST_PCI_HDR_LEN) / 352 rrb->response.entry_size; 353 *resume_token = rrb->response.resume_token; 354 355 return rc; 356 } 357 358 static int clp_list_pci(struct clp_req_rsp_list_pci *rrb, void *data, 359 void (*cb)(struct clp_fh_list_entry *, void *)) 360 { 361 u64 resume_token = 0; 362 int nentries, i, rc; 363 364 do { 365 rc = clp_list_pci_req(rrb, &resume_token, &nentries); 366 if (rc) 367 return rc; 368 for (i = 0; i < nentries; i++) 369 cb(&rrb->response.fh_list[i], data); 370 } while (resume_token); 371 372 return rc; 373 } 374 375 static int clp_find_pci(struct clp_req_rsp_list_pci *rrb, u32 fid, 376 struct clp_fh_list_entry *entry) 377 { 378 struct clp_fh_list_entry *fh_list; 379 u64 resume_token = 0; 380 int nentries, i, rc; 381 382 do { 383 rc = clp_list_pci_req(rrb, &resume_token, &nentries); 384 if (rc) 385 return rc; 386 fh_list = rrb->response.fh_list; 387 for (i = 0; i < nentries; i++) { 388 if (fh_list[i].fid == fid) { 389 *entry = fh_list[i]; 390 return 0; 391 } 392 } 393 } while (resume_token); 394 395 return -ENODEV; 396 } 397 398 static void __clp_add(struct clp_fh_list_entry *entry, void *data) 399 { 400 struct zpci_dev *zdev; 401 402 if (!entry->vendor_id) 403 return; 404 405 zdev = get_zdev_by_fid(entry->fid); 406 if (!zdev) 407 zpci_create_device(entry->fid, entry->fh, entry->config_state); 408 } 409 410 int clp_scan_pci_devices(void) 411 { 412 struct clp_req_rsp_list_pci *rrb; 413 int rc; 414 415 rrb = clp_alloc_block(GFP_KERNEL); 416 if (!rrb) 417 return -ENOMEM; 418 419 rc = clp_list_pci(rrb, NULL, __clp_add); 420 421 clp_free_block(rrb); 422 return rc; 423 } 424 425 /* 426 * Get the current function handle of the function matching @fid 427 */ 428 int clp_refresh_fh(u32 fid, u32 *fh) 429 { 430 struct clp_req_rsp_list_pci *rrb; 431 struct clp_fh_list_entry entry; 432 int rc; 433 434 rrb = clp_alloc_block(GFP_NOWAIT); 435 if (!rrb) 436 return -ENOMEM; 437 438 rc = clp_find_pci(rrb, fid, &entry); 439 if (!rc) 440 *fh = entry.fh; 441 442 clp_free_block(rrb); 443 return rc; 444 } 445 446 int clp_get_state(u32 fid, enum zpci_state *state) 447 { 448 struct clp_req_rsp_list_pci *rrb; 449 struct clp_fh_list_entry entry; 450 int rc; 451 452 rrb = clp_alloc_block(GFP_ATOMIC); 453 if (!rrb) 454 return -ENOMEM; 455 456 rc = clp_find_pci(rrb, fid, &entry); 457 if (!rc) { 458 *state = entry.config_state; 459 } else if (rc == -ENODEV) { 460 *state = ZPCI_FN_STATE_RESERVED; 461 rc = 0; 462 } 463 464 clp_free_block(rrb); 465 return rc; 466 } 467 468 static int clp_base_slpc(struct clp_req *req, struct clp_req_rsp_slpc *lpcb) 469 { 470 unsigned long limit = PAGE_SIZE - sizeof(lpcb->request); 471 472 if (lpcb->request.hdr.len != sizeof(lpcb->request) || 473 lpcb->response.hdr.len > limit) 474 return -EINVAL; 475 return clp_req(lpcb, CLP_LPS_BASE) ? -EOPNOTSUPP : 0; 476 } 477 478 static int clp_base_command(struct clp_req *req, struct clp_req_hdr *lpcb) 479 { 480 switch (lpcb->cmd) { 481 case 0x0001: /* store logical-processor characteristics */ 482 return clp_base_slpc(req, (void *) lpcb); 483 default: 484 return -EINVAL; 485 } 486 } 487 488 static int clp_pci_slpc(struct clp_req *req, struct clp_req_rsp_slpc_pci *lpcb) 489 { 490 unsigned long limit = PAGE_SIZE - sizeof(lpcb->request); 491 492 if (lpcb->request.hdr.len != sizeof(lpcb->request) || 493 lpcb->response.hdr.len > limit) 494 return -EINVAL; 495 return clp_req(lpcb, CLP_LPS_PCI) ? -EOPNOTSUPP : 0; 496 } 497 498 static int clp_pci_list(struct clp_req *req, struct clp_req_rsp_list_pci *lpcb) 499 { 500 unsigned long limit = PAGE_SIZE - sizeof(lpcb->request); 501 502 if (lpcb->request.hdr.len != sizeof(lpcb->request) || 503 lpcb->response.hdr.len > limit) 504 return -EINVAL; 505 if (lpcb->request.reserved2 != 0) 506 return -EINVAL; 507 return clp_req(lpcb, CLP_LPS_PCI) ? -EOPNOTSUPP : 0; 508 } 509 510 static int clp_pci_query(struct clp_req *req, 511 struct clp_req_rsp_query_pci *lpcb) 512 { 513 unsigned long limit = PAGE_SIZE - sizeof(lpcb->request); 514 515 if (lpcb->request.hdr.len != sizeof(lpcb->request) || 516 lpcb->response.hdr.len > limit) 517 return -EINVAL; 518 if (lpcb->request.reserved2 != 0 || lpcb->request.reserved3 != 0) 519 return -EINVAL; 520 return clp_req(lpcb, CLP_LPS_PCI) ? -EOPNOTSUPP : 0; 521 } 522 523 static int clp_pci_query_grp(struct clp_req *req, 524 struct clp_req_rsp_query_pci_grp *lpcb) 525 { 526 unsigned long limit = PAGE_SIZE - sizeof(lpcb->request); 527 528 if (lpcb->request.hdr.len != sizeof(lpcb->request) || 529 lpcb->response.hdr.len > limit) 530 return -EINVAL; 531 if (lpcb->request.reserved2 != 0 || lpcb->request.reserved3 != 0 || 532 lpcb->request.reserved4 != 0) 533 return -EINVAL; 534 return clp_req(lpcb, CLP_LPS_PCI) ? -EOPNOTSUPP : 0; 535 } 536 537 static int clp_pci_command(struct clp_req *req, struct clp_req_hdr *lpcb) 538 { 539 switch (lpcb->cmd) { 540 case 0x0001: /* store logical-processor characteristics */ 541 return clp_pci_slpc(req, (void *) lpcb); 542 case 0x0002: /* list PCI functions */ 543 return clp_pci_list(req, (void *) lpcb); 544 case 0x0003: /* query PCI function */ 545 return clp_pci_query(req, (void *) lpcb); 546 case 0x0004: /* query PCI function group */ 547 return clp_pci_query_grp(req, (void *) lpcb); 548 default: 549 return -EINVAL; 550 } 551 } 552 553 static int clp_normal_command(struct clp_req *req) 554 { 555 struct clp_req_hdr *lpcb; 556 void __user *uptr; 557 int rc; 558 559 rc = -EINVAL; 560 if (req->lps != 0 && req->lps != 2) 561 goto out; 562 563 rc = -ENOMEM; 564 lpcb = clp_alloc_block(GFP_KERNEL); 565 if (!lpcb) 566 goto out; 567 568 rc = -EFAULT; 569 uptr = (void __force __user *)(unsigned long) req->data_p; 570 if (copy_from_user(lpcb, uptr, PAGE_SIZE) != 0) 571 goto out_free; 572 573 rc = -EINVAL; 574 if (lpcb->fmt != 0 || lpcb->reserved1 != 0 || lpcb->reserved2 != 0) 575 goto out_free; 576 577 switch (req->lps) { 578 case 0: 579 rc = clp_base_command(req, lpcb); 580 break; 581 case 2: 582 rc = clp_pci_command(req, lpcb); 583 break; 584 } 585 if (rc) 586 goto out_free; 587 588 rc = -EFAULT; 589 if (copy_to_user(uptr, lpcb, PAGE_SIZE) != 0) 590 goto out_free; 591 592 rc = 0; 593 594 out_free: 595 clp_free_block(lpcb); 596 out: 597 return rc; 598 } 599 600 static int clp_immediate_command(struct clp_req *req) 601 { 602 void __user *uptr; 603 unsigned long ilp; 604 int exists; 605 606 if (req->cmd > 1 || clp_get_ilp(&ilp) != 0) 607 return -EINVAL; 608 609 uptr = (void __force __user *)(unsigned long) req->data_p; 610 if (req->cmd == 0) { 611 /* Command code 0: test for a specific processor */ 612 exists = test_bit_inv(req->lps, &ilp); 613 return put_user(exists, (int __user *) uptr); 614 } 615 /* Command code 1: return bit mask of installed processors */ 616 return put_user(ilp, (unsigned long __user *) uptr); 617 } 618 619 static long clp_misc_ioctl(struct file *filp, unsigned int cmd, 620 unsigned long arg) 621 { 622 struct clp_req req; 623 void __user *argp; 624 625 if (cmd != CLP_SYNC) 626 return -EINVAL; 627 628 argp = is_compat_task() ? compat_ptr(arg) : (void __user *) arg; 629 if (copy_from_user(&req, argp, sizeof(req))) 630 return -EFAULT; 631 if (req.r != 0) 632 return -EINVAL; 633 return req.c ? clp_immediate_command(&req) : clp_normal_command(&req); 634 } 635 636 static int clp_misc_release(struct inode *inode, struct file *filp) 637 { 638 return 0; 639 } 640 641 static const struct file_operations clp_misc_fops = { 642 .owner = THIS_MODULE, 643 .open = nonseekable_open, 644 .release = clp_misc_release, 645 .unlocked_ioctl = clp_misc_ioctl, 646 .compat_ioctl = clp_misc_ioctl, 647 .llseek = no_llseek, 648 }; 649 650 static struct miscdevice clp_misc_device = { 651 .minor = MISC_DYNAMIC_MINOR, 652 .name = "clp", 653 .fops = &clp_misc_fops, 654 }; 655 656 static int __init clp_misc_init(void) 657 { 658 return misc_register(&clp_misc_device); 659 } 660 661 device_initcall(clp_misc_init); 662