1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * handling privileged instructions 4 * 5 * Copyright IBM Corp. 2008, 2020 6 * 7 * Author(s): Carsten Otte <cotte@de.ibm.com> 8 * Christian Borntraeger <borntraeger@de.ibm.com> 9 */ 10 11 #include <linux/kvm.h> 12 #include <linux/gfp.h> 13 #include <linux/errno.h> 14 #include <linux/mm_types.h> 15 #include <linux/pgtable.h> 16 #include <linux/io.h> 17 #include <asm/asm-offsets.h> 18 #include <asm/facility.h> 19 #include <asm/current.h> 20 #include <asm/debug.h> 21 #include <asm/ebcdic.h> 22 #include <asm/sysinfo.h> 23 #include <asm/page-states.h> 24 #include <asm/ptrace.h> 25 #include <asm/sclp.h> 26 #include <asm/ap.h> 27 #include <asm/gmap_helpers.h> 28 #include "gaccess.h" 29 #include "kvm-s390.h" 30 #include "trace.h" 31 #include "gmap.h" 32 33 static int handle_ri(struct kvm_vcpu *vcpu) 34 { 35 vcpu->stat.instruction_ri++; 36 37 if (test_kvm_facility(vcpu->kvm, 64)) { 38 VCPU_EVENT(vcpu, 3, "%s", "ENABLE: RI (lazy)"); 39 vcpu->arch.sie_block->ecb3 |= ECB3_RI; 40 kvm_s390_retry_instr(vcpu); 41 return 0; 42 } else 43 return kvm_s390_inject_program_int(vcpu, PGM_OPERATION); 44 } 45 46 int kvm_s390_handle_aa(struct kvm_vcpu *vcpu) 47 { 48 if ((vcpu->arch.sie_block->ipa & 0xf) <= 4) 49 return handle_ri(vcpu); 50 else 51 return -EOPNOTSUPP; 52 } 53 54 static int handle_gs(struct kvm_vcpu *vcpu) 55 { 56 vcpu->stat.instruction_gs++; 57 58 if (test_kvm_facility(vcpu->kvm, 133)) { 59 VCPU_EVENT(vcpu, 3, "%s", "ENABLE: GS (lazy)"); 60 preempt_disable(); 61 local_ctl_set_bit(2, CR2_GUARDED_STORAGE_BIT); 62 current->thread.gs_cb = (struct gs_cb *)&vcpu->run->s.regs.gscb; 63 restore_gs_cb(current->thread.gs_cb); 64 preempt_enable(); 65 vcpu->arch.sie_block->ecb |= ECB_GS; 66 vcpu->arch.sie_block->ecd |= ECD_HOSTREGMGMT; 67 vcpu->arch.gs_enabled = 1; 68 kvm_s390_retry_instr(vcpu); 69 return 0; 70 } else 71 return kvm_s390_inject_program_int(vcpu, PGM_OPERATION); 72 } 73 74 int kvm_s390_handle_e3(struct kvm_vcpu *vcpu) 75 { 76 int code = vcpu->arch.sie_block->ipb & 0xff; 77 78 if (code == 0x49 || code == 0x4d) 79 return handle_gs(vcpu); 80 else 81 return -EOPNOTSUPP; 82 } 83 /* Handle SCK (SET CLOCK) interception */ 84 static int handle_set_clock(struct kvm_vcpu *vcpu) 85 { 86 struct kvm_s390_vm_tod_clock gtod = { 0 }; 87 int rc; 88 u8 ar; 89 u64 op2; 90 91 vcpu->stat.instruction_sck++; 92 93 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE) 94 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); 95 96 op2 = kvm_s390_get_base_disp_s(vcpu, &ar); 97 if (op2 & 7) /* Operand must be on a doubleword boundary */ 98 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); 99 rc = read_guest(vcpu, op2, ar, >od.tod, sizeof(gtod.tod)); 100 if (rc) 101 return kvm_s390_inject_prog_cond(vcpu, rc); 102 103 VCPU_EVENT(vcpu, 3, "SCK: setting guest TOD to 0x%llx", gtod.tod); 104 /* 105 * To set the TOD clock the kvm lock must be taken, but the vcpu lock 106 * is already held in handle_set_clock. The usual lock order is the 107 * opposite. As SCK is deprecated and should not be used in several 108 * cases, for example when the multiple epoch facility or TOD clock 109 * steering facility is installed (see Principles of Operation), a 110 * slow path can be used. If the lock can not be taken via try_lock, 111 * the instruction will be retried via -EAGAIN at a later point in 112 * time. 113 */ 114 if (!kvm_s390_try_set_tod_clock(vcpu->kvm, >od)) { 115 kvm_s390_retry_instr(vcpu); 116 return -EAGAIN; 117 } 118 119 kvm_s390_set_psw_cc(vcpu, 0); 120 return 0; 121 } 122 123 static int handle_set_prefix(struct kvm_vcpu *vcpu) 124 { 125 u64 operand2; 126 u32 address; 127 int rc; 128 u8 ar; 129 130 vcpu->stat.instruction_spx++; 131 132 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE) 133 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); 134 135 operand2 = kvm_s390_get_base_disp_s(vcpu, &ar); 136 137 /* must be word boundary */ 138 if (operand2 & 3) 139 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); 140 141 /* get the value */ 142 rc = read_guest(vcpu, operand2, ar, &address, sizeof(address)); 143 if (rc) 144 return kvm_s390_inject_prog_cond(vcpu, rc); 145 146 address &= 0x7fffe000u; 147 148 /* 149 * Make sure the new value is valid memory. We only need to check the 150 * first page, since address is 8k aligned and memory pieces are always 151 * at least 1MB aligned and have at least a size of 1MB. 152 */ 153 if (!kvm_is_gpa_in_memslot(vcpu->kvm, address)) 154 return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING); 155 156 kvm_s390_set_prefix(vcpu, address); 157 trace_kvm_s390_handle_prefix(vcpu, 1, address); 158 return 0; 159 } 160 161 static int handle_store_prefix(struct kvm_vcpu *vcpu) 162 { 163 u64 operand2; 164 u32 address; 165 int rc; 166 u8 ar; 167 168 vcpu->stat.instruction_stpx++; 169 170 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE) 171 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); 172 173 operand2 = kvm_s390_get_base_disp_s(vcpu, &ar); 174 175 /* must be word boundary */ 176 if (operand2 & 3) 177 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); 178 179 address = kvm_s390_get_prefix(vcpu); 180 181 /* get the value */ 182 rc = write_guest(vcpu, operand2, ar, &address, sizeof(address)); 183 if (rc) 184 return kvm_s390_inject_prog_cond(vcpu, rc); 185 186 VCPU_EVENT(vcpu, 3, "STPX: storing prefix 0x%x into 0x%llx", address, operand2); 187 trace_kvm_s390_handle_prefix(vcpu, 0, address); 188 return 0; 189 } 190 191 static int handle_store_cpu_address(struct kvm_vcpu *vcpu) 192 { 193 u16 vcpu_id = vcpu->vcpu_id; 194 u64 ga; 195 int rc; 196 u8 ar; 197 198 vcpu->stat.instruction_stap++; 199 200 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE) 201 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); 202 203 ga = kvm_s390_get_base_disp_s(vcpu, &ar); 204 205 if (ga & 1) 206 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); 207 208 rc = write_guest(vcpu, ga, ar, &vcpu_id, sizeof(vcpu_id)); 209 if (rc) 210 return kvm_s390_inject_prog_cond(vcpu, rc); 211 212 VCPU_EVENT(vcpu, 3, "STAP: storing cpu address (%u) to 0x%llx", vcpu_id, ga); 213 trace_kvm_s390_handle_stap(vcpu, ga); 214 return 0; 215 } 216 217 int kvm_s390_skey_check_enable(struct kvm_vcpu *vcpu) 218 { 219 int rc; 220 221 trace_kvm_s390_skey_related_inst(vcpu); 222 /* Already enabled? */ 223 if (vcpu->arch.skey_enabled) 224 return 0; 225 226 rc = gmap_enable_skeys(vcpu->arch.gmap); 227 VCPU_EVENT(vcpu, 3, "enabling storage keys for guest: %d", rc); 228 if (rc) 229 return rc; 230 231 if (kvm_s390_test_cpuflags(vcpu, CPUSTAT_KSS)) 232 kvm_s390_clear_cpuflags(vcpu, CPUSTAT_KSS); 233 if (!vcpu->kvm->arch.use_skf) 234 vcpu->arch.sie_block->ictl |= ICTL_ISKE | ICTL_SSKE | ICTL_RRBE; 235 else 236 vcpu->arch.sie_block->ictl &= ~(ICTL_ISKE | ICTL_SSKE | ICTL_RRBE); 237 vcpu->arch.skey_enabled = true; 238 return 0; 239 } 240 241 static int try_handle_skey(struct kvm_vcpu *vcpu) 242 { 243 int rc; 244 245 rc = kvm_s390_skey_check_enable(vcpu); 246 if (rc) 247 return rc; 248 if (vcpu->kvm->arch.use_skf) { 249 /* with storage-key facility, SIE interprets it for us */ 250 kvm_s390_retry_instr(vcpu); 251 VCPU_EVENT(vcpu, 4, "%s", "retrying storage key operation"); 252 return -EAGAIN; 253 } 254 return 0; 255 } 256 257 static int handle_iske(struct kvm_vcpu *vcpu) 258 { 259 unsigned long gaddr; 260 int reg1, reg2; 261 union skey key; 262 int rc; 263 264 vcpu->stat.instruction_iske++; 265 266 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE) 267 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); 268 269 rc = try_handle_skey(vcpu); 270 if (rc) 271 return rc != -EAGAIN ? rc : 0; 272 273 kvm_s390_get_regs_rre(vcpu, ®1, ®2); 274 275 gaddr = vcpu->run->s.regs.gprs[reg2] & PAGE_MASK; 276 gaddr = kvm_s390_logical_to_effective(vcpu, gaddr); 277 gaddr = kvm_s390_real_to_abs(vcpu, gaddr); 278 scoped_guard(read_lock, &vcpu->kvm->mmu_lock) 279 rc = dat_get_storage_key(vcpu->arch.gmap->asce, gpa_to_gfn(gaddr), &key); 280 if (rc > 0) 281 return kvm_s390_inject_program_int(vcpu, rc); 282 if (rc < 0) 283 return rc; 284 vcpu->run->s.regs.gprs[reg1] &= ~0xff; 285 vcpu->run->s.regs.gprs[reg1] |= key.skey; 286 return 0; 287 } 288 289 static int handle_rrbe(struct kvm_vcpu *vcpu) 290 { 291 unsigned long gaddr; 292 int reg1, reg2; 293 int rc; 294 295 vcpu->stat.instruction_rrbe++; 296 297 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE) 298 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); 299 300 rc = try_handle_skey(vcpu); 301 if (rc) 302 return rc != -EAGAIN ? rc : 0; 303 304 kvm_s390_get_regs_rre(vcpu, ®1, ®2); 305 306 gaddr = vcpu->run->s.regs.gprs[reg2] & PAGE_MASK; 307 gaddr = kvm_s390_logical_to_effective(vcpu, gaddr); 308 gaddr = kvm_s390_real_to_abs(vcpu, gaddr); 309 scoped_guard(read_lock, &vcpu->kvm->mmu_lock) 310 rc = dat_reset_reference_bit(vcpu->arch.gmap->asce, gpa_to_gfn(gaddr)); 311 if (rc > 0) 312 return kvm_s390_inject_program_int(vcpu, rc); 313 if (rc < 0) 314 return rc; 315 kvm_s390_set_psw_cc(vcpu, rc); 316 return 0; 317 } 318 319 #define SSKE_NQ 0x8 320 #define SSKE_MR 0x4 321 #define SSKE_MC 0x2 322 #define SSKE_MB 0x1 323 static int handle_sske(struct kvm_vcpu *vcpu) 324 { 325 unsigned char m3 = vcpu->arch.sie_block->ipb >> 28; 326 unsigned long start, end; 327 union skey key, oldkey; 328 int reg1, reg2; 329 int rc; 330 331 vcpu->stat.instruction_sske++; 332 333 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE) 334 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); 335 336 rc = try_handle_skey(vcpu); 337 if (rc) 338 return rc != -EAGAIN ? rc : 0; 339 340 if (!test_kvm_facility(vcpu->kvm, 8)) 341 m3 &= ~SSKE_MB; 342 if (!test_kvm_facility(vcpu->kvm, 10)) 343 m3 &= ~(SSKE_MC | SSKE_MR); 344 if (!test_kvm_facility(vcpu->kvm, 14)) 345 m3 &= ~SSKE_NQ; 346 347 kvm_s390_get_regs_rre(vcpu, ®1, ®2); 348 349 key.skey = vcpu->run->s.regs.gprs[reg1] & 0xfe; 350 start = vcpu->run->s.regs.gprs[reg2] & PAGE_MASK; 351 start = kvm_s390_logical_to_effective(vcpu, start); 352 if (m3 & SSKE_MB) { 353 /* start already designates an absolute address */ 354 end = (start + _SEGMENT_SIZE) & ~(_SEGMENT_SIZE - 1); 355 } else { 356 start = kvm_s390_real_to_abs(vcpu, start); 357 end = start + PAGE_SIZE; 358 } 359 360 while (start != end) { 361 scoped_guard(read_lock, &vcpu->kvm->mmu_lock) { 362 rc = dat_cond_set_storage_key(vcpu->arch.mc, vcpu->arch.gmap->asce, 363 gpa_to_gfn(start), key, &oldkey, 364 m3 & SSKE_NQ, m3 & SSKE_MR, m3 & SSKE_MC); 365 } 366 if (rc > 1) 367 return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING); 368 if (rc == -ENOMEM) { 369 kvm_s390_mmu_cache_topup(vcpu->arch.mc); 370 continue; 371 } 372 if (rc < 0) 373 return rc; 374 start += PAGE_SIZE; 375 } 376 377 if (m3 & (SSKE_MC | SSKE_MR)) { 378 if (m3 & SSKE_MB) { 379 /* skey in reg1 is unpredictable */ 380 kvm_s390_set_psw_cc(vcpu, 3); 381 } else { 382 kvm_s390_set_psw_cc(vcpu, rc); 383 vcpu->run->s.regs.gprs[reg1] &= ~0xff00UL; 384 vcpu->run->s.regs.gprs[reg1] |= (u64)oldkey.skey << 8; 385 } 386 } 387 if (m3 & SSKE_MB) { 388 if (psw_bits(vcpu->arch.sie_block->gpsw).eaba == PSW_BITS_AMODE_64BIT) 389 vcpu->run->s.regs.gprs[reg2] &= ~PAGE_MASK; 390 else 391 vcpu->run->s.regs.gprs[reg2] &= ~0xfffff000UL; 392 end = kvm_s390_logical_to_effective(vcpu, end); 393 vcpu->run->s.regs.gprs[reg2] |= end; 394 } 395 return 0; 396 } 397 398 static int handle_ipte_interlock(struct kvm_vcpu *vcpu) 399 { 400 vcpu->stat.instruction_ipte_interlock++; 401 if (psw_bits(vcpu->arch.sie_block->gpsw).pstate) 402 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); 403 wait_event(vcpu->kvm->arch.ipte_wq, !ipte_lock_held(vcpu->kvm)); 404 kvm_s390_retry_instr(vcpu); 405 VCPU_EVENT(vcpu, 4, "%s", "retrying ipte interlock operation"); 406 return 0; 407 } 408 409 static int handle_test_block(struct kvm_vcpu *vcpu) 410 { 411 gpa_t addr; 412 int reg2; 413 414 vcpu->stat.instruction_tb++; 415 416 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE) 417 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); 418 419 kvm_s390_get_regs_rre(vcpu, NULL, ®2); 420 addr = vcpu->run->s.regs.gprs[reg2] & PAGE_MASK; 421 addr = kvm_s390_logical_to_effective(vcpu, addr); 422 if (kvm_s390_check_low_addr_prot_real(vcpu, addr)) 423 return kvm_s390_inject_prog_irq(vcpu, &vcpu->arch.pgm); 424 addr = kvm_s390_real_to_abs(vcpu, addr); 425 426 if (!kvm_is_gpa_in_memslot(vcpu->kvm, addr)) 427 return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING); 428 /* 429 * We don't expect errors on modern systems, and do not care 430 * about storage keys (yet), so let's just clear the page. 431 */ 432 if (kvm_clear_guest(vcpu->kvm, addr, PAGE_SIZE)) 433 return -EFAULT; 434 kvm_s390_set_psw_cc(vcpu, 0); 435 vcpu->run->s.regs.gprs[0] = 0; 436 return 0; 437 } 438 439 static int handle_tpi(struct kvm_vcpu *vcpu) 440 { 441 struct kvm_s390_interrupt_info *inti; 442 unsigned long len; 443 u32 tpi_data[3]; 444 int rc; 445 u64 addr; 446 u8 ar; 447 448 vcpu->stat.instruction_tpi++; 449 450 addr = kvm_s390_get_base_disp_s(vcpu, &ar); 451 if (addr & 3) 452 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); 453 454 inti = kvm_s390_get_io_int(vcpu->kvm, vcpu->arch.sie_block->gcr[6], 0); 455 if (!inti) { 456 kvm_s390_set_psw_cc(vcpu, 0); 457 return 0; 458 } 459 460 tpi_data[0] = inti->io.subchannel_id << 16 | inti->io.subchannel_nr; 461 tpi_data[1] = inti->io.io_int_parm; 462 tpi_data[2] = inti->io.io_int_word; 463 if (addr) { 464 /* 465 * Store the two-word I/O interruption code into the 466 * provided area. 467 */ 468 len = sizeof(tpi_data) - 4; 469 rc = write_guest(vcpu, addr, ar, &tpi_data, len); 470 if (rc) { 471 rc = kvm_s390_inject_prog_cond(vcpu, rc); 472 goto reinject_interrupt; 473 } 474 } else { 475 /* 476 * Store the three-word I/O interruption code into 477 * the appropriate lowcore area. 478 */ 479 len = sizeof(tpi_data); 480 if (write_guest_lc(vcpu, __LC_SUBCHANNEL_ID, &tpi_data, len)) { 481 /* failed writes to the low core are not recoverable */ 482 rc = -EFAULT; 483 goto reinject_interrupt; 484 } 485 } 486 487 /* irq was successfully handed to the guest */ 488 kfree(inti); 489 kvm_s390_set_psw_cc(vcpu, 1); 490 return 0; 491 reinject_interrupt: 492 /* 493 * If we encounter a problem storing the interruption code, the 494 * instruction is suppressed from the guest's view: reinject the 495 * interrupt. 496 */ 497 if (kvm_s390_reinject_io_int(vcpu->kvm, inti)) { 498 kfree(inti); 499 rc = -EFAULT; 500 } 501 /* don't set the cc, a pgm irq was injected or we drop to user space */ 502 return rc ? -EFAULT : 0; 503 } 504 505 static int handle_tsch(struct kvm_vcpu *vcpu) 506 { 507 struct kvm_s390_interrupt_info *inti = NULL; 508 const u64 isc_mask = 0xffUL << 24; /* all iscs set */ 509 510 vcpu->stat.instruction_tsch++; 511 512 /* a valid schid has at least one bit set */ 513 if (vcpu->run->s.regs.gprs[1]) 514 inti = kvm_s390_get_io_int(vcpu->kvm, isc_mask, 515 vcpu->run->s.regs.gprs[1]); 516 517 /* 518 * Prepare exit to userspace. 519 * We indicate whether we dequeued a pending I/O interrupt 520 * so that userspace can re-inject it if the instruction gets 521 * a program check. While this may re-order the pending I/O 522 * interrupts, this is no problem since the priority is kept 523 * intact. 524 */ 525 vcpu->run->exit_reason = KVM_EXIT_S390_TSCH; 526 vcpu->run->s390_tsch.dequeued = !!inti; 527 if (inti) { 528 vcpu->run->s390_tsch.subchannel_id = inti->io.subchannel_id; 529 vcpu->run->s390_tsch.subchannel_nr = inti->io.subchannel_nr; 530 vcpu->run->s390_tsch.io_int_parm = inti->io.io_int_parm; 531 vcpu->run->s390_tsch.io_int_word = inti->io.io_int_word; 532 } 533 vcpu->run->s390_tsch.ipb = vcpu->arch.sie_block->ipb; 534 kfree(inti); 535 return -EREMOTE; 536 } 537 538 static int handle_io_inst(struct kvm_vcpu *vcpu) 539 { 540 VCPU_EVENT(vcpu, 4, "%s", "I/O instruction"); 541 542 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE) 543 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); 544 545 if (vcpu->kvm->arch.css_support) { 546 /* 547 * Most I/O instructions will be handled by userspace. 548 * Exceptions are tpi and the interrupt portion of tsch. 549 */ 550 if (vcpu->arch.sie_block->ipa == 0xb236) 551 return handle_tpi(vcpu); 552 if (vcpu->arch.sie_block->ipa == 0xb235) 553 return handle_tsch(vcpu); 554 /* Handle in userspace. */ 555 vcpu->stat.instruction_io_other++; 556 return -EOPNOTSUPP; 557 } else { 558 /* 559 * Set condition code 3 to stop the guest from issuing channel 560 * I/O instructions. 561 */ 562 kvm_s390_set_psw_cc(vcpu, 3); 563 return 0; 564 } 565 } 566 567 #if IS_ENABLED(CONFIG_VFIO_AP) 568 bool kvm_s390_is_gpa_in_memslot(struct kvm *kvm, gpa_t gpa) 569 { 570 return kvm_is_gpa_in_memslot(kvm, gpa); 571 } 572 EXPORT_SYMBOL_FOR_MODULES(kvm_s390_is_gpa_in_memslot, "vfio_ap"); 573 #endif 574 575 /* 576 * handle_pqap: Handling pqap interception 577 * @vcpu: the vcpu having issue the pqap instruction 578 * 579 * We now support PQAP/AQIC instructions and we need to correctly 580 * answer the guest even if no dedicated driver's hook is available. 581 * 582 * The intercepting code calls a dedicated callback for this instruction 583 * if a driver did register one in the CRYPTO satellite of the 584 * SIE block. 585 * 586 * If no callback is available, the queues are not available, return this 587 * response code to the caller and set CC to 3. 588 * Else return the response code returned by the callback. 589 */ 590 static int handle_pqap(struct kvm_vcpu *vcpu) 591 { 592 struct ap_queue_status status = {}; 593 crypto_hook pqap_hook; 594 unsigned long reg0; 595 int ret; 596 uint8_t fc; 597 598 /* Verify that the AP instruction are available */ 599 if (!ap_instructions_available()) 600 return -EOPNOTSUPP; 601 /* Verify that the guest is allowed to use AP instructions */ 602 if (!(vcpu->arch.sie_block->eca & ECA_APIE)) 603 return -EOPNOTSUPP; 604 /* 605 * The only possibly intercepted functions when AP instructions are 606 * available for the guest are AQIC and TAPQ with the t bit set 607 * since we do not set IC.3 (FIII) we currently will only intercept 608 * the AQIC function code. 609 * Note: running nested under z/VM can result in intercepts for other 610 * function codes, e.g. PQAP(QCI). We do not support this and bail out. 611 */ 612 reg0 = vcpu->run->s.regs.gprs[0]; 613 fc = (reg0 >> 24) & 0xff; 614 if (fc != 0x03) 615 return -EOPNOTSUPP; 616 617 /* PQAP instruction is allowed for guest kernel only */ 618 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE) 619 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); 620 621 /* Common PQAP instruction specification exceptions */ 622 /* bits 41-47 must all be zeros */ 623 if (reg0 & 0x007f0000UL) 624 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); 625 /* APFT not install and T bit set */ 626 if (!test_kvm_facility(vcpu->kvm, 15) && (reg0 & 0x00800000UL)) 627 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); 628 /* APXA not installed and APID greater 64 or APQI greater 16 */ 629 if (!(vcpu->kvm->arch.crypto.crycbd & 0x02) && (reg0 & 0x0000c0f0UL)) 630 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); 631 632 /* AQIC function code specific exception */ 633 /* facility 65 not present for AQIC function code */ 634 if (!test_kvm_facility(vcpu->kvm, 65)) 635 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); 636 637 /* 638 * If the hook callback is registered, there will be a pointer to the 639 * hook function pointer in the kvm_s390_crypto structure. Lock the 640 * owner, retrieve the hook function pointer and call the hook. 641 */ 642 down_read(&vcpu->kvm->arch.crypto.pqap_hook_rwsem); 643 if (vcpu->kvm->arch.crypto.pqap_hook) { 644 pqap_hook = *vcpu->kvm->arch.crypto.pqap_hook; 645 ret = pqap_hook(vcpu); 646 if (!ret) { 647 if (vcpu->run->s.regs.gprs[1] & 0x00ff0000) 648 kvm_s390_set_psw_cc(vcpu, 3); 649 else 650 kvm_s390_set_psw_cc(vcpu, 0); 651 } 652 up_read(&vcpu->kvm->arch.crypto.pqap_hook_rwsem); 653 return ret; 654 } 655 up_read(&vcpu->kvm->arch.crypto.pqap_hook_rwsem); 656 /* 657 * A vfio_driver must register a hook. 658 * No hook means no driver to enable the SIE CRYCB and no queues. 659 * We send this response to the guest. 660 */ 661 status.response_code = 0x01; 662 memcpy(&vcpu->run->s.regs.gprs[1], &status, sizeof(status)); 663 kvm_s390_set_psw_cc(vcpu, 3); 664 return 0; 665 } 666 667 static int handle_stfl(struct kvm_vcpu *vcpu) 668 { 669 int rc; 670 unsigned int fac; 671 672 vcpu->stat.instruction_stfl++; 673 674 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE) 675 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); 676 677 /* 678 * We need to shift the lower 32 facility bits (bit 0-31) from a u64 679 * into a u32 memory representation. They will remain bits 0-31. 680 */ 681 fac = *vcpu->kvm->arch.model.fac_list >> 32; 682 rc = write_guest_lc(vcpu, offsetof(struct lowcore, stfl_fac_list), 683 &fac, sizeof(fac)); 684 if (rc) 685 return rc; 686 VCPU_EVENT(vcpu, 3, "STFL: store facility list 0x%x", fac); 687 trace_kvm_s390_handle_stfl(vcpu, fac); 688 return 0; 689 } 690 691 #define PSW_MASK_ADDR_MODE (PSW_MASK_EA | PSW_MASK_BA) 692 #define PSW_MASK_UNASSIGNED 0xb80800fe7fffffffUL 693 #define PSW_ADDR_24 0x0000000000ffffffUL 694 #define PSW_ADDR_31 0x000000007fffffffUL 695 696 int is_valid_psw(psw_t *psw) 697 { 698 if (psw->mask & PSW_MASK_UNASSIGNED) 699 return 0; 700 if ((psw->mask & PSW_MASK_ADDR_MODE) == PSW_MASK_BA) { 701 if (psw->addr & ~PSW_ADDR_31) 702 return 0; 703 } 704 if (!(psw->mask & PSW_MASK_ADDR_MODE) && (psw->addr & ~PSW_ADDR_24)) 705 return 0; 706 if ((psw->mask & PSW_MASK_ADDR_MODE) == PSW_MASK_EA) 707 return 0; 708 if (psw->addr & 1) 709 return 0; 710 return 1; 711 } 712 713 int kvm_s390_handle_lpsw(struct kvm_vcpu *vcpu) 714 { 715 psw_t *gpsw = &vcpu->arch.sie_block->gpsw; 716 psw32_t new_psw; 717 u64 addr, iaddr; 718 int rc; 719 u8 ar; 720 721 vcpu->stat.instruction_lpsw++; 722 723 iaddr = gpsw->addr - kvm_s390_get_ilen(vcpu); 724 if (gpsw->mask & PSW_MASK_PSTATE) 725 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); 726 727 addr = kvm_s390_get_base_disp_s(vcpu, &ar); 728 if (addr & 7) 729 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); 730 731 rc = read_guest(vcpu, addr, ar, &new_psw, sizeof(new_psw)); 732 if (rc) 733 return kvm_s390_inject_prog_cond(vcpu, rc); 734 if (!(new_psw.mask & PSW32_MASK_BASE)) 735 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); 736 gpsw->mask = (new_psw.mask & ~PSW32_MASK_BASE) << 32; 737 gpsw->mask |= new_psw.addr & PSW32_ADDR_AMODE; 738 gpsw->addr = new_psw.addr & ~PSW32_ADDR_AMODE; 739 if (!is_valid_psw(gpsw)) 740 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); 741 vcpu->arch.sie_block->gbea = iaddr; 742 return 0; 743 } 744 745 static int handle_lpswe(struct kvm_vcpu *vcpu) 746 { 747 psw_t new_psw; 748 u64 addr, iaddr; 749 int rc; 750 u8 ar; 751 752 vcpu->stat.instruction_lpswe++; 753 754 iaddr = vcpu->arch.sie_block->gpsw.addr - kvm_s390_get_ilen(vcpu); 755 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE) 756 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); 757 758 addr = kvm_s390_get_base_disp_s(vcpu, &ar); 759 if (addr & 7) 760 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); 761 rc = read_guest(vcpu, addr, ar, &new_psw, sizeof(new_psw)); 762 if (rc) 763 return kvm_s390_inject_prog_cond(vcpu, rc); 764 vcpu->arch.sie_block->gpsw = new_psw; 765 if (!is_valid_psw(&vcpu->arch.sie_block->gpsw)) 766 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); 767 vcpu->arch.sie_block->gbea = iaddr; 768 return 0; 769 } 770 771 static int handle_lpswey(struct kvm_vcpu *vcpu) 772 { 773 psw_t new_psw; 774 u64 addr; 775 int rc; 776 u8 ar; 777 778 vcpu->stat.instruction_lpswey++; 779 780 if (!test_kvm_facility(vcpu->kvm, 193)) 781 return kvm_s390_inject_program_int(vcpu, PGM_OPERATION); 782 783 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE) 784 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); 785 786 addr = kvm_s390_get_base_disp_siy(vcpu, &ar); 787 if (addr & 7) 788 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); 789 790 rc = read_guest(vcpu, addr, ar, &new_psw, sizeof(new_psw)); 791 if (rc) 792 return kvm_s390_inject_prog_cond(vcpu, rc); 793 794 vcpu->arch.sie_block->gpsw = new_psw; 795 if (!is_valid_psw(&vcpu->arch.sie_block->gpsw)) 796 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); 797 798 return 0; 799 } 800 801 static int handle_stidp(struct kvm_vcpu *vcpu) 802 { 803 u64 stidp_data = vcpu->kvm->arch.model.cpuid; 804 u64 operand2; 805 int rc; 806 u8 ar; 807 808 vcpu->stat.instruction_stidp++; 809 810 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE) 811 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); 812 813 operand2 = kvm_s390_get_base_disp_s(vcpu, &ar); 814 815 if (operand2 & 7) 816 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); 817 818 rc = write_guest(vcpu, operand2, ar, &stidp_data, sizeof(stidp_data)); 819 if (rc) 820 return kvm_s390_inject_prog_cond(vcpu, rc); 821 822 VCPU_EVENT(vcpu, 3, "STIDP: store cpu id 0x%llx", stidp_data); 823 return 0; 824 } 825 826 static void handle_stsi_3_2_2(struct kvm_vcpu *vcpu, struct sysinfo_3_2_2 *mem) 827 { 828 int cpus = 0; 829 int n; 830 831 cpus = atomic_read(&vcpu->kvm->online_vcpus); 832 833 /* deal with other level 3 hypervisors */ 834 if (stsi(mem, 3, 2, 2)) 835 mem->count = 0; 836 if (mem->count < 8) 837 mem->count++; 838 for (n = mem->count - 1; n > 0 ; n--) 839 memcpy(&mem->vm[n], &mem->vm[n - 1], sizeof(mem->vm[0])); 840 841 memset(&mem->vm[0], 0, sizeof(mem->vm[0])); 842 mem->vm[0].cpus_total = cpus; 843 mem->vm[0].cpus_configured = cpus; 844 mem->vm[0].cpus_standby = 0; 845 mem->vm[0].cpus_reserved = 0; 846 mem->vm[0].caf = 1000; 847 memcpy(mem->vm[0].name, "KVMguest", 8); 848 ASCEBC(mem->vm[0].name, 8); 849 memcpy(mem->vm[0].cpi, "KVM/Linux ", 16); 850 ASCEBC(mem->vm[0].cpi, 16); 851 } 852 853 static void insert_stsi_usr_data(struct kvm_vcpu *vcpu, u64 addr, u8 ar, 854 u8 fc, u8 sel1, u16 sel2) 855 { 856 vcpu->run->exit_reason = KVM_EXIT_S390_STSI; 857 vcpu->run->s390_stsi.addr = addr; 858 vcpu->run->s390_stsi.ar = ar; 859 vcpu->run->s390_stsi.fc = fc; 860 vcpu->run->s390_stsi.sel1 = sel1; 861 vcpu->run->s390_stsi.sel2 = sel2; 862 } 863 864 static int handle_stsi(struct kvm_vcpu *vcpu) 865 { 866 int fc = (vcpu->run->s.regs.gprs[0] & 0xf0000000) >> 28; 867 int sel1 = vcpu->run->s.regs.gprs[0] & 0xff; 868 int sel2 = vcpu->run->s.regs.gprs[1] & 0xffff; 869 unsigned long mem = 0; 870 u64 operand2; 871 int rc = 0; 872 u8 ar; 873 874 vcpu->stat.instruction_stsi++; 875 VCPU_EVENT(vcpu, 3, "STSI: fc: %u sel1: %u sel2: %u", fc, sel1, sel2); 876 877 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE) 878 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); 879 880 /* Bailout forbidden function codes */ 881 if (fc > 3 && fc != 15) 882 goto out_no_data; 883 884 /* 885 * fc 15 is provided only with 886 * - PTF/CPU topology support through facility 15 887 * - KVM_CAP_S390_USER_STSI 888 */ 889 if (fc == 15 && (!test_kvm_facility(vcpu->kvm, 11) || 890 !vcpu->kvm->arch.user_stsi)) 891 goto out_no_data; 892 893 if (vcpu->run->s.regs.gprs[0] & 0x0fffff00 894 || vcpu->run->s.regs.gprs[1] & 0xffff0000) 895 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); 896 897 if (fc == 0) { 898 vcpu->run->s.regs.gprs[0] = 3 << 28; 899 kvm_s390_set_psw_cc(vcpu, 0); 900 return 0; 901 } 902 903 operand2 = kvm_s390_get_base_disp_s(vcpu, &ar); 904 905 if (!kvm_s390_pv_cpu_is_protected(vcpu) && (operand2 & 0xfff)) 906 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); 907 908 switch (fc) { 909 case 1: /* same handling for 1 and 2 */ 910 case 2: 911 mem = get_zeroed_page(GFP_KERNEL_ACCOUNT); 912 if (!mem) 913 goto out_no_data; 914 if (stsi((void *) mem, fc, sel1, sel2)) 915 goto out_no_data; 916 break; 917 case 3: 918 if (sel1 != 2 || sel2 != 2) 919 goto out_no_data; 920 mem = get_zeroed_page(GFP_KERNEL_ACCOUNT); 921 if (!mem) 922 goto out_no_data; 923 handle_stsi_3_2_2(vcpu, (void *) mem); 924 break; 925 case 15: /* fc 15 is fully handled in userspace */ 926 insert_stsi_usr_data(vcpu, operand2, ar, fc, sel1, sel2); 927 trace_kvm_s390_handle_stsi(vcpu, fc, sel1, sel2, operand2); 928 return -EREMOTE; 929 } 930 if (kvm_s390_pv_cpu_is_protected(vcpu)) { 931 memcpy(sida_addr(vcpu->arch.sie_block), (void *)mem, PAGE_SIZE); 932 rc = 0; 933 } else { 934 rc = write_guest(vcpu, operand2, ar, (void *)mem, PAGE_SIZE); 935 } 936 if (rc) { 937 rc = kvm_s390_inject_prog_cond(vcpu, rc); 938 goto out; 939 } 940 if (vcpu->kvm->arch.user_stsi) { 941 insert_stsi_usr_data(vcpu, operand2, ar, fc, sel1, sel2); 942 rc = -EREMOTE; 943 } 944 trace_kvm_s390_handle_stsi(vcpu, fc, sel1, sel2, operand2); 945 free_page(mem); 946 kvm_s390_set_psw_cc(vcpu, 0); 947 vcpu->run->s.regs.gprs[0] = 0; 948 return rc; 949 out_no_data: 950 kvm_s390_set_psw_cc(vcpu, 3); 951 out: 952 free_page(mem); 953 return rc; 954 } 955 956 int kvm_s390_handle_b2(struct kvm_vcpu *vcpu) 957 { 958 switch (vcpu->arch.sie_block->ipa & 0x00ff) { 959 case 0x02: 960 return handle_stidp(vcpu); 961 case 0x04: 962 return handle_set_clock(vcpu); 963 case 0x10: 964 return handle_set_prefix(vcpu); 965 case 0x11: 966 return handle_store_prefix(vcpu); 967 case 0x12: 968 return handle_store_cpu_address(vcpu); 969 case 0x14: 970 return kvm_s390_handle_vsie(vcpu); 971 case 0x21: 972 case 0x50: 973 return handle_ipte_interlock(vcpu); 974 case 0x29: 975 return handle_iske(vcpu); 976 case 0x2a: 977 return handle_rrbe(vcpu); 978 case 0x2b: 979 return handle_sske(vcpu); 980 case 0x2c: 981 return handle_test_block(vcpu); 982 case 0x30: 983 case 0x31: 984 case 0x32: 985 case 0x33: 986 case 0x34: 987 case 0x35: 988 case 0x36: 989 case 0x37: 990 case 0x38: 991 case 0x39: 992 case 0x3a: 993 case 0x3b: 994 case 0x3c: 995 case 0x5f: 996 case 0x74: 997 case 0x76: 998 return handle_io_inst(vcpu); 999 case 0x56: 1000 return handle_sthyi(vcpu); 1001 case 0x7d: 1002 return handle_stsi(vcpu); 1003 case 0xaf: 1004 return handle_pqap(vcpu); 1005 case 0xb1: 1006 return handle_stfl(vcpu); 1007 case 0xb2: 1008 return handle_lpswe(vcpu); 1009 default: 1010 return -EOPNOTSUPP; 1011 } 1012 } 1013 1014 static int handle_epsw(struct kvm_vcpu *vcpu) 1015 { 1016 int reg1, reg2; 1017 1018 vcpu->stat.instruction_epsw++; 1019 1020 kvm_s390_get_regs_rre(vcpu, ®1, ®2); 1021 1022 /* This basically extracts the mask half of the psw. */ 1023 vcpu->run->s.regs.gprs[reg1] &= 0xffffffff00000000UL; 1024 vcpu->run->s.regs.gprs[reg1] |= vcpu->arch.sie_block->gpsw.mask >> 32; 1025 if (reg2) { 1026 vcpu->run->s.regs.gprs[reg2] &= 0xffffffff00000000UL; 1027 vcpu->run->s.regs.gprs[reg2] |= 1028 vcpu->arch.sie_block->gpsw.mask & 0x00000000ffffffffUL; 1029 } 1030 return 0; 1031 } 1032 1033 #define PFMF_RESERVED 0xfffc0101UL 1034 #define PFMF_SK 0x00020000UL 1035 #define PFMF_CF 0x00010000UL 1036 #define PFMF_UI 0x00008000UL 1037 #define PFMF_FSC 0x00007000UL 1038 #define PFMF_NQ 0x00000800UL 1039 #define PFMF_MR 0x00000400UL 1040 #define PFMF_MC 0x00000200UL 1041 #define PFMF_KEY 0x000000feUL 1042 1043 static int handle_pfmf(struct kvm_vcpu *vcpu) 1044 { 1045 bool mr = false, mc = false, nq; 1046 int reg1, reg2; 1047 unsigned long start, end; 1048 union skey key; 1049 1050 vcpu->stat.instruction_pfmf++; 1051 1052 kvm_s390_get_regs_rre(vcpu, ®1, ®2); 1053 1054 if (!test_kvm_facility(vcpu->kvm, 8)) 1055 return kvm_s390_inject_program_int(vcpu, PGM_OPERATION); 1056 1057 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE) 1058 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); 1059 1060 if (vcpu->run->s.regs.gprs[reg1] & PFMF_RESERVED) 1061 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); 1062 1063 /* Only provide non-quiescing support if enabled for the guest */ 1064 if (vcpu->run->s.regs.gprs[reg1] & PFMF_NQ && 1065 !test_kvm_facility(vcpu->kvm, 14)) 1066 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); 1067 1068 /* Only provide conditional-SSKE support if enabled for the guest */ 1069 if (vcpu->run->s.regs.gprs[reg1] & PFMF_SK && 1070 test_kvm_facility(vcpu->kvm, 10)) { 1071 mr = vcpu->run->s.regs.gprs[reg1] & PFMF_MR; 1072 mc = vcpu->run->s.regs.gprs[reg1] & PFMF_MC; 1073 } 1074 1075 nq = vcpu->run->s.regs.gprs[reg1] & PFMF_NQ; 1076 key.skey = vcpu->run->s.regs.gprs[reg1] & PFMF_KEY; 1077 start = vcpu->run->s.regs.gprs[reg2] & PAGE_MASK; 1078 start = kvm_s390_logical_to_effective(vcpu, start); 1079 1080 if (vcpu->run->s.regs.gprs[reg1] & PFMF_CF) { 1081 if (kvm_s390_check_low_addr_prot_real(vcpu, start)) 1082 return kvm_s390_inject_prog_irq(vcpu, &vcpu->arch.pgm); 1083 } 1084 1085 switch (vcpu->run->s.regs.gprs[reg1] & PFMF_FSC) { 1086 case 0x00000000: 1087 /* only 4k frames specify a real address */ 1088 start = kvm_s390_real_to_abs(vcpu, start); 1089 end = (start + PAGE_SIZE) & ~(PAGE_SIZE - 1); 1090 break; 1091 case 0x00001000: 1092 end = (start + _SEGMENT_SIZE) & ~(_SEGMENT_SIZE - 1); 1093 break; 1094 case 0x00002000: 1095 /* only support 2G frame size if EDAT2 is available and we are 1096 not in 24-bit addressing mode */ 1097 if (!test_kvm_facility(vcpu->kvm, 78) || 1098 psw_bits(vcpu->arch.sie_block->gpsw).eaba == PSW_BITS_AMODE_24BIT) 1099 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); 1100 end = (start + _REGION3_SIZE) & ~(_REGION3_SIZE - 1); 1101 break; 1102 default: 1103 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); 1104 } 1105 1106 while (start != end) { 1107 if (vcpu->run->s.regs.gprs[reg1] & PFMF_CF) { 1108 if (kvm_clear_guest(vcpu->kvm, start, PAGE_SIZE)) 1109 return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING); 1110 } 1111 1112 if (vcpu->run->s.regs.gprs[reg1] & PFMF_SK) { 1113 int rc = kvm_s390_skey_check_enable(vcpu); 1114 1115 if (rc) 1116 return rc; 1117 scoped_guard(read_lock, &vcpu->kvm->mmu_lock) { 1118 rc = dat_cond_set_storage_key(vcpu->arch.mc, vcpu->arch.gmap->asce, 1119 gpa_to_gfn(start), key, 1120 NULL, nq, mr, mc); 1121 } 1122 if (rc > 1) 1123 return kvm_s390_inject_program_int(vcpu, rc); 1124 if (rc == -ENOMEM) { 1125 kvm_s390_mmu_cache_topup(vcpu->arch.mc); 1126 continue; 1127 } 1128 if (rc < 0) 1129 return rc; 1130 } 1131 start += PAGE_SIZE; 1132 } 1133 if (vcpu->run->s.regs.gprs[reg1] & PFMF_FSC) { 1134 if (psw_bits(vcpu->arch.sie_block->gpsw).eaba == PSW_BITS_AMODE_64BIT) { 1135 vcpu->run->s.regs.gprs[reg2] = end; 1136 } else { 1137 vcpu->run->s.regs.gprs[reg2] &= ~0xffffffffUL; 1138 end = kvm_s390_logical_to_effective(vcpu, end); 1139 vcpu->run->s.regs.gprs[reg2] |= end; 1140 } 1141 } 1142 return 0; 1143 } 1144 1145 /* 1146 * Must be called with relevant read locks held (kvm->mm->mmap_lock, kvm->srcu) 1147 */ 1148 static inline int __do_essa(struct kvm_vcpu *vcpu, const int orc) 1149 { 1150 int r1, r2, nappended, entries; 1151 union essa_state state; 1152 unsigned long *cbrlo; 1153 unsigned long gfn; 1154 bool dirtied; 1155 1156 /* 1157 * We don't need to set SD.FPF.SK to 1 here, because if we have a 1158 * machine check here we either handle it or crash 1159 */ 1160 1161 kvm_s390_get_regs_rre(vcpu, &r1, &r2); 1162 gfn = vcpu->run->s.regs.gprs[r2] >> PAGE_SHIFT; 1163 entries = (vcpu->arch.sie_block->cbrlo & ~PAGE_MASK) >> 3; 1164 1165 nappended = dat_perform_essa(vcpu->arch.gmap->asce, gfn, orc, &state, &dirtied); 1166 vcpu->run->s.regs.gprs[r1] = state.val; 1167 if (nappended < 0) 1168 return 0; 1169 /* 1170 * It is possible that all the normal 511 slots were full, in which case 1171 * we will now write in the 512th slot, which is reserved for host use. 1172 * In both cases we let the normal essa handling code process all the 1173 * slots, including the reserved one, if needed. 1174 */ 1175 if (nappended > 0) { 1176 cbrlo = phys_to_virt(vcpu->arch.sie_block->cbrlo & PAGE_MASK); 1177 cbrlo[entries] = gfn << PAGE_SHIFT; 1178 } 1179 1180 if (dirtied) 1181 atomic64_inc(&vcpu->kvm->arch.cmma_dirty_pages); 1182 1183 return nappended; 1184 } 1185 1186 static void _essa_clear_cbrl(struct kvm_vcpu *vcpu, unsigned long *cbrl, int len) 1187 { 1188 union crste *crstep; 1189 union pgste pgste; 1190 union pte *ptep; 1191 int i; 1192 1193 lockdep_assert_held(&vcpu->kvm->mmu_lock); 1194 1195 for (i = 0; i < len; i++) { 1196 if (dat_entry_walk(NULL, gpa_to_gfn(cbrl[i]), vcpu->arch.gmap->asce, 1197 0, TABLE_TYPE_PAGE_TABLE, &crstep, &ptep)) 1198 continue; 1199 if (!ptep || ptep->s.pr) 1200 continue; 1201 pgste = pgste_get_lock(ptep); 1202 if (pgste.usage == PGSTE_GPS_USAGE_UNUSED || pgste.zero) 1203 gmap_helper_zap_one_page(vcpu->kvm->mm, cbrl[i]); 1204 pgste_set_unlock(ptep, pgste); 1205 } 1206 } 1207 1208 static int handle_essa(struct kvm_vcpu *vcpu) 1209 { 1210 lockdep_assert_held(&vcpu->kvm->srcu); 1211 1212 /* entries expected to be 1FF */ 1213 int entries = (vcpu->arch.sie_block->cbrlo & ~PAGE_MASK) >> 3; 1214 unsigned long *cbrlo; 1215 int i, orc; 1216 1217 VCPU_EVENT(vcpu, 4, "ESSA: release %d pages", entries); 1218 vcpu->stat.instruction_essa++; 1219 if (!vcpu->kvm->arch.use_cmma) 1220 return kvm_s390_inject_program_int(vcpu, PGM_OPERATION); 1221 1222 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE) 1223 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); 1224 /* Check for invalid operation request code */ 1225 orc = (vcpu->arch.sie_block->ipb & 0xf0000000) >> 28; 1226 /* ORCs 0-6 are always valid */ 1227 if (orc > (test_kvm_facility(vcpu->kvm, 147) ? ESSA_SET_STABLE_NODAT 1228 : ESSA_SET_STABLE_IF_RESIDENT)) 1229 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); 1230 1231 if (!vcpu->kvm->arch.migration_mode) { 1232 /* 1233 * CMMA is enabled in the KVM settings, but is disabled in 1234 * the SIE block and in the mm_context, and we are not doing 1235 * a migration. Enable CMMA in the mm_context. 1236 * Since we need to take a write lock to write to the context 1237 * to avoid races with storage keys handling, we check if the 1238 * value really needs to be written to; if the value is 1239 * already correct, we do nothing and avoid the lock. 1240 */ 1241 set_bit(GMAP_FLAG_USES_CMM, &vcpu->arch.gmap->flags); 1242 /* 1243 * If we are here, we are supposed to have CMMA enabled in 1244 * the SIE block. Enabling CMMA works on a per-CPU basis, 1245 * while the context use_cmma flag is per process. 1246 * It's possible that the context flag is enabled and the 1247 * SIE flag is not, so we set the flag always; if it was 1248 * already set, nothing changes, otherwise we enable it 1249 * on this CPU too. 1250 */ 1251 vcpu->arch.sie_block->ecb2 |= ECB2_CMMA; 1252 /* Retry the ESSA instruction */ 1253 kvm_s390_retry_instr(vcpu); 1254 } else { 1255 scoped_guard(read_lock, &vcpu->kvm->mmu_lock) 1256 i = __do_essa(vcpu, orc); 1257 if (i < 0) 1258 return i; 1259 /* Account for the possible extra cbrl entry */ 1260 entries += i; 1261 } 1262 /* reset nceo */ 1263 vcpu->arch.sie_block->cbrlo &= PAGE_MASK; 1264 cbrlo = phys_to_virt(vcpu->arch.sie_block->cbrlo); 1265 1266 mmap_read_lock(vcpu->kvm->mm); 1267 scoped_guard(read_lock, &vcpu->kvm->mmu_lock) 1268 _essa_clear_cbrl(vcpu, cbrlo, entries); 1269 mmap_read_unlock(vcpu->kvm->mm); 1270 1271 return 0; 1272 } 1273 1274 int kvm_s390_handle_b9(struct kvm_vcpu *vcpu) 1275 { 1276 switch (vcpu->arch.sie_block->ipa & 0x00ff) { 1277 case 0x8a: 1278 case 0x8e: 1279 case 0x8f: 1280 return handle_ipte_interlock(vcpu); 1281 case 0x8d: 1282 return handle_epsw(vcpu); 1283 case 0xab: 1284 return handle_essa(vcpu); 1285 case 0xaf: 1286 return handle_pfmf(vcpu); 1287 default: 1288 return -EOPNOTSUPP; 1289 } 1290 } 1291 1292 int kvm_s390_handle_lctl(struct kvm_vcpu *vcpu) 1293 { 1294 int reg1 = (vcpu->arch.sie_block->ipa & 0x00f0) >> 4; 1295 int reg3 = vcpu->arch.sie_block->ipa & 0x000f; 1296 int reg, rc, nr_regs; 1297 u32 ctl_array[16]; 1298 u64 ga; 1299 u8 ar; 1300 1301 vcpu->stat.instruction_lctl++; 1302 1303 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE) 1304 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); 1305 1306 ga = kvm_s390_get_base_disp_rs(vcpu, &ar); 1307 1308 if (ga & 3) 1309 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); 1310 1311 VCPU_EVENT(vcpu, 4, "LCTL: r1:%d, r3:%d, addr: 0x%llx", reg1, reg3, ga); 1312 trace_kvm_s390_handle_lctl(vcpu, 0, reg1, reg3, ga); 1313 1314 nr_regs = ((reg3 - reg1) & 0xf) + 1; 1315 rc = read_guest(vcpu, ga, ar, ctl_array, nr_regs * sizeof(u32)); 1316 if (rc) 1317 return kvm_s390_inject_prog_cond(vcpu, rc); 1318 reg = reg1; 1319 nr_regs = 0; 1320 do { 1321 vcpu->arch.sie_block->gcr[reg] &= 0xffffffff00000000ul; 1322 vcpu->arch.sie_block->gcr[reg] |= ctl_array[nr_regs++]; 1323 if (reg == reg3) 1324 break; 1325 reg = (reg + 1) % 16; 1326 } while (1); 1327 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu); 1328 return 0; 1329 } 1330 1331 int kvm_s390_handle_stctl(struct kvm_vcpu *vcpu) 1332 { 1333 int reg1 = (vcpu->arch.sie_block->ipa & 0x00f0) >> 4; 1334 int reg3 = vcpu->arch.sie_block->ipa & 0x000f; 1335 int reg, rc, nr_regs; 1336 u32 ctl_array[16]; 1337 u64 ga; 1338 u8 ar; 1339 1340 vcpu->stat.instruction_stctl++; 1341 1342 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE) 1343 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); 1344 1345 ga = kvm_s390_get_base_disp_rs(vcpu, &ar); 1346 1347 if (ga & 3) 1348 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); 1349 1350 VCPU_EVENT(vcpu, 4, "STCTL r1:%d, r3:%d, addr: 0x%llx", reg1, reg3, ga); 1351 trace_kvm_s390_handle_stctl(vcpu, 0, reg1, reg3, ga); 1352 1353 reg = reg1; 1354 nr_regs = 0; 1355 do { 1356 ctl_array[nr_regs++] = vcpu->arch.sie_block->gcr[reg]; 1357 if (reg == reg3) 1358 break; 1359 reg = (reg + 1) % 16; 1360 } while (1); 1361 rc = write_guest(vcpu, ga, ar, ctl_array, nr_regs * sizeof(u32)); 1362 return rc ? kvm_s390_inject_prog_cond(vcpu, rc) : 0; 1363 } 1364 1365 static int handle_lctlg(struct kvm_vcpu *vcpu) 1366 { 1367 int reg1 = (vcpu->arch.sie_block->ipa & 0x00f0) >> 4; 1368 int reg3 = vcpu->arch.sie_block->ipa & 0x000f; 1369 int reg, rc, nr_regs; 1370 u64 ctl_array[16]; 1371 u64 ga; 1372 u8 ar; 1373 1374 vcpu->stat.instruction_lctlg++; 1375 1376 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE) 1377 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); 1378 1379 ga = kvm_s390_get_base_disp_rsy(vcpu, &ar); 1380 1381 if (ga & 7) 1382 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); 1383 1384 VCPU_EVENT(vcpu, 4, "LCTLG: r1:%d, r3:%d, addr: 0x%llx", reg1, reg3, ga); 1385 trace_kvm_s390_handle_lctl(vcpu, 1, reg1, reg3, ga); 1386 1387 nr_regs = ((reg3 - reg1) & 0xf) + 1; 1388 rc = read_guest(vcpu, ga, ar, ctl_array, nr_regs * sizeof(u64)); 1389 if (rc) 1390 return kvm_s390_inject_prog_cond(vcpu, rc); 1391 reg = reg1; 1392 nr_regs = 0; 1393 do { 1394 vcpu->arch.sie_block->gcr[reg] = ctl_array[nr_regs++]; 1395 if (reg == reg3) 1396 break; 1397 reg = (reg + 1) % 16; 1398 } while (1); 1399 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu); 1400 return 0; 1401 } 1402 1403 static int handle_stctg(struct kvm_vcpu *vcpu) 1404 { 1405 int reg1 = (vcpu->arch.sie_block->ipa & 0x00f0) >> 4; 1406 int reg3 = vcpu->arch.sie_block->ipa & 0x000f; 1407 int reg, rc, nr_regs; 1408 u64 ctl_array[16]; 1409 u64 ga; 1410 u8 ar; 1411 1412 vcpu->stat.instruction_stctg++; 1413 1414 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE) 1415 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); 1416 1417 ga = kvm_s390_get_base_disp_rsy(vcpu, &ar); 1418 1419 if (ga & 7) 1420 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); 1421 1422 VCPU_EVENT(vcpu, 4, "STCTG r1:%d, r3:%d, addr: 0x%llx", reg1, reg3, ga); 1423 trace_kvm_s390_handle_stctl(vcpu, 1, reg1, reg3, ga); 1424 1425 reg = reg1; 1426 nr_regs = 0; 1427 do { 1428 ctl_array[nr_regs++] = vcpu->arch.sie_block->gcr[reg]; 1429 if (reg == reg3) 1430 break; 1431 reg = (reg + 1) % 16; 1432 } while (1); 1433 rc = write_guest(vcpu, ga, ar, ctl_array, nr_regs * sizeof(u64)); 1434 return rc ? kvm_s390_inject_prog_cond(vcpu, rc) : 0; 1435 } 1436 1437 int kvm_s390_handle_eb(struct kvm_vcpu *vcpu) 1438 { 1439 switch (vcpu->arch.sie_block->ipb & 0x000000ff) { 1440 case 0x25: 1441 return handle_stctg(vcpu); 1442 case 0x2f: 1443 return handle_lctlg(vcpu); 1444 case 0x60: 1445 case 0x61: 1446 case 0x62: 1447 return handle_ri(vcpu); 1448 case 0x71: 1449 return handle_lpswey(vcpu); 1450 default: 1451 return -EOPNOTSUPP; 1452 } 1453 } 1454 1455 static int handle_tprot(struct kvm_vcpu *vcpu) 1456 { 1457 u64 address, operand2; 1458 unsigned long gpa; 1459 u8 access_key; 1460 bool writable; 1461 int ret, cc; 1462 u8 ar; 1463 1464 vcpu->stat.instruction_tprot++; 1465 1466 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE) 1467 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); 1468 1469 kvm_s390_get_base_disp_sse(vcpu, &address, &operand2, &ar, NULL); 1470 access_key = (operand2 & 0xf0) >> 4; 1471 1472 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_DAT) 1473 ipte_lock(vcpu->kvm); 1474 1475 ret = guest_translate_address_with_key(vcpu, address, ar, &gpa, 1476 GACC_STORE, access_key); 1477 if (ret == 0) { 1478 gfn_to_hva_prot(vcpu->kvm, gpa_to_gfn(gpa), &writable); 1479 } else if (ret == PGM_PROTECTION) { 1480 writable = false; 1481 /* Write protected? Try again with read-only... */ 1482 ret = guest_translate_address_with_key(vcpu, address, ar, &gpa, 1483 GACC_FETCH, access_key); 1484 } 1485 if (ret >= 0) { 1486 cc = -1; 1487 1488 /* Fetching permitted; storing permitted */ 1489 if (ret == 0 && writable) 1490 cc = 0; 1491 /* Fetching permitted; storing not permitted */ 1492 else if (ret == 0 && !writable) 1493 cc = 1; 1494 /* Fetching not permitted; storing not permitted */ 1495 else if (ret == PGM_PROTECTION) 1496 cc = 2; 1497 /* Translation not available */ 1498 else if (ret != PGM_ADDRESSING && ret != PGM_TRANSLATION_SPEC) 1499 cc = 3; 1500 1501 if (cc != -1) { 1502 kvm_s390_set_psw_cc(vcpu, cc); 1503 ret = 0; 1504 } else { 1505 ret = kvm_s390_inject_program_int(vcpu, ret); 1506 } 1507 } 1508 1509 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_DAT) 1510 ipte_unlock(vcpu->kvm); 1511 return ret; 1512 } 1513 1514 int kvm_s390_handle_e5(struct kvm_vcpu *vcpu) 1515 { 1516 switch (vcpu->arch.sie_block->ipa & 0x00ff) { 1517 case 0x01: 1518 return handle_tprot(vcpu); 1519 default: 1520 return -EOPNOTSUPP; 1521 } 1522 } 1523 1524 static int handle_sckpf(struct kvm_vcpu *vcpu) 1525 { 1526 u32 value; 1527 1528 vcpu->stat.instruction_sckpf++; 1529 1530 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE) 1531 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); 1532 1533 if (vcpu->run->s.regs.gprs[0] & 0x00000000ffff0000) 1534 return kvm_s390_inject_program_int(vcpu, 1535 PGM_SPECIFICATION); 1536 1537 value = vcpu->run->s.regs.gprs[0] & 0x000000000000ffff; 1538 vcpu->arch.sie_block->todpr = value; 1539 1540 return 0; 1541 } 1542 1543 static int handle_ptff(struct kvm_vcpu *vcpu) 1544 { 1545 vcpu->stat.instruction_ptff++; 1546 1547 /* we don't emulate any control instructions yet */ 1548 kvm_s390_set_psw_cc(vcpu, 3); 1549 return 0; 1550 } 1551 1552 int kvm_s390_handle_01(struct kvm_vcpu *vcpu) 1553 { 1554 switch (vcpu->arch.sie_block->ipa & 0x00ff) { 1555 case 0x04: 1556 return handle_ptff(vcpu); 1557 case 0x07: 1558 return handle_sckpf(vcpu); 1559 default: 1560 return -EOPNOTSUPP; 1561 } 1562 } 1563