1 /* 2 * arch/s390/kernel/time.c 3 * Time of day based timer functions. 4 * 5 * S390 version 6 * Copyright IBM Corp. 1999, 2008 7 * Author(s): Hartmut Penner (hp@de.ibm.com), 8 * Martin Schwidefsky (schwidefsky@de.ibm.com), 9 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com) 10 * 11 * Derived from "arch/i386/kernel/time.c" 12 * Copyright (C) 1991, 1992, 1995 Linus Torvalds 13 */ 14 15 #define KMSG_COMPONENT "time" 16 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt 17 18 #include <linux/errno.h> 19 #include <linux/module.h> 20 #include <linux/sched.h> 21 #include <linux/kernel.h> 22 #include <linux/param.h> 23 #include <linux/string.h> 24 #include <linux/mm.h> 25 #include <linux/interrupt.h> 26 #include <linux/cpu.h> 27 #include <linux/stop_machine.h> 28 #include <linux/time.h> 29 #include <linux/sysdev.h> 30 #include <linux/delay.h> 31 #include <linux/init.h> 32 #include <linux/smp.h> 33 #include <linux/types.h> 34 #include <linux/profile.h> 35 #include <linux/timex.h> 36 #include <linux/notifier.h> 37 #include <linux/clocksource.h> 38 #include <linux/clockchips.h> 39 #include <linux/bootmem.h> 40 #include <asm/uaccess.h> 41 #include <asm/delay.h> 42 #include <asm/s390_ext.h> 43 #include <asm/div64.h> 44 #include <asm/vdso.h> 45 #include <asm/irq.h> 46 #include <asm/irq_regs.h> 47 #include <asm/timer.h> 48 #include <asm/etr.h> 49 #include <asm/cio.h> 50 51 /* change this if you have some constant time drift */ 52 #define USECS_PER_JIFFY ((unsigned long) 1000000/HZ) 53 #define CLK_TICKS_PER_JIFFY ((unsigned long) USECS_PER_JIFFY << 12) 54 55 /* 56 * Create a small time difference between the timer interrupts 57 * on the different cpus to avoid lock contention. 58 */ 59 #define CPU_DEVIATION (smp_processor_id() << 12) 60 61 #define TICK_SIZE tick 62 63 u64 sched_clock_base_cc = -1; /* Force to data section. */ 64 65 static ext_int_info_t ext_int_info_cc; 66 static ext_int_info_t ext_int_etr_cc; 67 68 static DEFINE_PER_CPU(struct clock_event_device, comparators); 69 70 /* 71 * Scheduler clock - returns current time in nanosec units. 72 */ 73 unsigned long long notrace sched_clock(void) 74 { 75 return ((get_clock_xt() - sched_clock_base_cc) * 125) >> 9; 76 } 77 78 /* 79 * Monotonic_clock - returns # of nanoseconds passed since time_init() 80 */ 81 unsigned long long monotonic_clock(void) 82 { 83 return sched_clock(); 84 } 85 EXPORT_SYMBOL(monotonic_clock); 86 87 void tod_to_timeval(__u64 todval, struct timespec *xtime) 88 { 89 unsigned long long sec; 90 91 sec = todval >> 12; 92 do_div(sec, 1000000); 93 xtime->tv_sec = sec; 94 todval -= (sec * 1000000) << 12; 95 xtime->tv_nsec = ((todval * 1000) >> 12); 96 } 97 98 void clock_comparator_work(void) 99 { 100 struct clock_event_device *cd; 101 102 S390_lowcore.clock_comparator = -1ULL; 103 set_clock_comparator(S390_lowcore.clock_comparator); 104 cd = &__get_cpu_var(comparators); 105 cd->event_handler(cd); 106 } 107 108 /* 109 * Fixup the clock comparator. 110 */ 111 static void fixup_clock_comparator(unsigned long long delta) 112 { 113 /* If nobody is waiting there's nothing to fix. */ 114 if (S390_lowcore.clock_comparator == -1ULL) 115 return; 116 S390_lowcore.clock_comparator += delta; 117 set_clock_comparator(S390_lowcore.clock_comparator); 118 } 119 120 static int s390_next_event(unsigned long delta, 121 struct clock_event_device *evt) 122 { 123 S390_lowcore.clock_comparator = get_clock() + delta; 124 set_clock_comparator(S390_lowcore.clock_comparator); 125 return 0; 126 } 127 128 static void s390_set_mode(enum clock_event_mode mode, 129 struct clock_event_device *evt) 130 { 131 } 132 133 /* 134 * Set up lowcore and control register of the current cpu to 135 * enable TOD clock and clock comparator interrupts. 136 */ 137 void init_cpu_timer(void) 138 { 139 struct clock_event_device *cd; 140 int cpu; 141 142 S390_lowcore.clock_comparator = -1ULL; 143 set_clock_comparator(S390_lowcore.clock_comparator); 144 145 cpu = smp_processor_id(); 146 cd = &per_cpu(comparators, cpu); 147 cd->name = "comparator"; 148 cd->features = CLOCK_EVT_FEAT_ONESHOT; 149 cd->mult = 16777; 150 cd->shift = 12; 151 cd->min_delta_ns = 1; 152 cd->max_delta_ns = LONG_MAX; 153 cd->rating = 400; 154 cd->cpumask = cpumask_of(cpu); 155 cd->set_next_event = s390_next_event; 156 cd->set_mode = s390_set_mode; 157 158 clockevents_register_device(cd); 159 160 /* Enable clock comparator timer interrupt. */ 161 __ctl_set_bit(0,11); 162 163 /* Always allow the timing alert external interrupt. */ 164 __ctl_set_bit(0, 4); 165 } 166 167 static void clock_comparator_interrupt(__u16 code) 168 { 169 if (S390_lowcore.clock_comparator == -1ULL) 170 set_clock_comparator(S390_lowcore.clock_comparator); 171 } 172 173 static void etr_timing_alert(struct etr_irq_parm *); 174 static void stp_timing_alert(struct stp_irq_parm *); 175 176 static void timing_alert_interrupt(__u16 code) 177 { 178 if (S390_lowcore.ext_params & 0x00c40000) 179 etr_timing_alert((struct etr_irq_parm *) 180 &S390_lowcore.ext_params); 181 if (S390_lowcore.ext_params & 0x00038000) 182 stp_timing_alert((struct stp_irq_parm *) 183 &S390_lowcore.ext_params); 184 } 185 186 static void etr_reset(void); 187 static void stp_reset(void); 188 189 unsigned long read_persistent_clock(void) 190 { 191 struct timespec ts; 192 193 tod_to_timeval(get_clock() - TOD_UNIX_EPOCH, &ts); 194 return ts.tv_sec; 195 } 196 197 static cycle_t read_tod_clock(struct clocksource *cs) 198 { 199 return get_clock(); 200 } 201 202 static struct clocksource clocksource_tod = { 203 .name = "tod", 204 .rating = 400, 205 .read = read_tod_clock, 206 .mask = -1ULL, 207 .mult = 1000, 208 .shift = 12, 209 .flags = CLOCK_SOURCE_IS_CONTINUOUS, 210 }; 211 212 213 void update_vsyscall(struct timespec *wall_time, struct clocksource *clock) 214 { 215 if (clock != &clocksource_tod) 216 return; 217 218 /* Make userspace gettimeofday spin until we're done. */ 219 ++vdso_data->tb_update_count; 220 smp_wmb(); 221 vdso_data->xtime_tod_stamp = clock->cycle_last; 222 vdso_data->xtime_clock_sec = xtime.tv_sec; 223 vdso_data->xtime_clock_nsec = xtime.tv_nsec; 224 vdso_data->wtom_clock_sec = wall_to_monotonic.tv_sec; 225 vdso_data->wtom_clock_nsec = wall_to_monotonic.tv_nsec; 226 smp_wmb(); 227 ++vdso_data->tb_update_count; 228 } 229 230 extern struct timezone sys_tz; 231 232 void update_vsyscall_tz(void) 233 { 234 /* Make userspace gettimeofday spin until we're done. */ 235 ++vdso_data->tb_update_count; 236 smp_wmb(); 237 vdso_data->tz_minuteswest = sys_tz.tz_minuteswest; 238 vdso_data->tz_dsttime = sys_tz.tz_dsttime; 239 smp_wmb(); 240 ++vdso_data->tb_update_count; 241 } 242 243 /* 244 * Initialize the TOD clock and the CPU timer of 245 * the boot cpu. 246 */ 247 void __init time_init(void) 248 { 249 struct timespec ts; 250 unsigned long flags; 251 cycle_t now; 252 253 /* Reset time synchronization interfaces. */ 254 etr_reset(); 255 stp_reset(); 256 257 /* request the clock comparator external interrupt */ 258 if (register_early_external_interrupt(0x1004, 259 clock_comparator_interrupt, 260 &ext_int_info_cc) != 0) 261 panic("Couldn't request external interrupt 0x1004"); 262 263 /* request the timing alert external interrupt */ 264 if (register_early_external_interrupt(0x1406, 265 timing_alert_interrupt, 266 &ext_int_etr_cc) != 0) 267 panic("Couldn't request external interrupt 0x1406"); 268 269 if (clocksource_register(&clocksource_tod) != 0) 270 panic("Could not register TOD clock source"); 271 272 /* 273 * The TOD clock is an accurate clock. The xtime should be 274 * initialized in a way that the difference between TOD and 275 * xtime is reasonably small. Too bad that timekeeping_init 276 * sets xtime.tv_nsec to zero. In addition the clock source 277 * change from the jiffies clock source to the TOD clock 278 * source add another error of up to 1/HZ second. The same 279 * function sets wall_to_monotonic to a value that is too 280 * small for /proc/uptime to be accurate. 281 * Reset xtime and wall_to_monotonic to sane values. 282 */ 283 write_seqlock_irqsave(&xtime_lock, flags); 284 now = get_clock(); 285 tod_to_timeval(now - TOD_UNIX_EPOCH, &xtime); 286 clocksource_tod.cycle_last = now; 287 clocksource_tod.raw_time = xtime; 288 tod_to_timeval(sched_clock_base_cc - TOD_UNIX_EPOCH, &ts); 289 set_normalized_timespec(&wall_to_monotonic, -ts.tv_sec, -ts.tv_nsec); 290 write_sequnlock_irqrestore(&xtime_lock, flags); 291 292 /* Enable TOD clock interrupts on the boot cpu. */ 293 init_cpu_timer(); 294 295 /* Enable cpu timer interrupts on the boot cpu. */ 296 vtime_init(); 297 } 298 299 /* 300 * The time is "clock". old is what we think the time is. 301 * Adjust the value by a multiple of jiffies and add the delta to ntp. 302 * "delay" is an approximation how long the synchronization took. If 303 * the time correction is positive, then "delay" is subtracted from 304 * the time difference and only the remaining part is passed to ntp. 305 */ 306 static unsigned long long adjust_time(unsigned long long old, 307 unsigned long long clock, 308 unsigned long long delay) 309 { 310 unsigned long long delta, ticks; 311 struct timex adjust; 312 313 if (clock > old) { 314 /* It is later than we thought. */ 315 delta = ticks = clock - old; 316 delta = ticks = (delta < delay) ? 0 : delta - delay; 317 delta -= do_div(ticks, CLK_TICKS_PER_JIFFY); 318 adjust.offset = ticks * (1000000 / HZ); 319 } else { 320 /* It is earlier than we thought. */ 321 delta = ticks = old - clock; 322 delta -= do_div(ticks, CLK_TICKS_PER_JIFFY); 323 delta = -delta; 324 adjust.offset = -ticks * (1000000 / HZ); 325 } 326 sched_clock_base_cc += delta; 327 if (adjust.offset != 0) { 328 pr_notice("The ETR interface has adjusted the clock " 329 "by %li microseconds\n", adjust.offset); 330 adjust.modes = ADJ_OFFSET_SINGLESHOT; 331 do_adjtimex(&adjust); 332 } 333 return delta; 334 } 335 336 static DEFINE_PER_CPU(atomic_t, clock_sync_word); 337 static DEFINE_MUTEX(clock_sync_mutex); 338 static unsigned long clock_sync_flags; 339 340 #define CLOCK_SYNC_HAS_ETR 0 341 #define CLOCK_SYNC_HAS_STP 1 342 #define CLOCK_SYNC_ETR 2 343 #define CLOCK_SYNC_STP 3 344 345 /* 346 * The synchronous get_clock function. It will write the current clock 347 * value to the clock pointer and return 0 if the clock is in sync with 348 * the external time source. If the clock mode is local it will return 349 * -ENOSYS and -EAGAIN if the clock is not in sync with the external 350 * reference. 351 */ 352 int get_sync_clock(unsigned long long *clock) 353 { 354 atomic_t *sw_ptr; 355 unsigned int sw0, sw1; 356 357 sw_ptr = &get_cpu_var(clock_sync_word); 358 sw0 = atomic_read(sw_ptr); 359 *clock = get_clock(); 360 sw1 = atomic_read(sw_ptr); 361 put_cpu_var(clock_sync_sync); 362 if (sw0 == sw1 && (sw0 & 0x80000000U)) 363 /* Success: time is in sync. */ 364 return 0; 365 if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags) && 366 !test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags)) 367 return -ENOSYS; 368 if (!test_bit(CLOCK_SYNC_ETR, &clock_sync_flags) && 369 !test_bit(CLOCK_SYNC_STP, &clock_sync_flags)) 370 return -EACCES; 371 return -EAGAIN; 372 } 373 EXPORT_SYMBOL(get_sync_clock); 374 375 /* 376 * Make get_sync_clock return -EAGAIN. 377 */ 378 static void disable_sync_clock(void *dummy) 379 { 380 atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word); 381 /* 382 * Clear the in-sync bit 2^31. All get_sync_clock calls will 383 * fail until the sync bit is turned back on. In addition 384 * increase the "sequence" counter to avoid the race of an 385 * etr event and the complete recovery against get_sync_clock. 386 */ 387 atomic_clear_mask(0x80000000, sw_ptr); 388 atomic_inc(sw_ptr); 389 } 390 391 /* 392 * Make get_sync_clock return 0 again. 393 * Needs to be called from a context disabled for preemption. 394 */ 395 static void enable_sync_clock(void) 396 { 397 atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word); 398 atomic_set_mask(0x80000000, sw_ptr); 399 } 400 401 /* 402 * Function to check if the clock is in sync. 403 */ 404 static inline int check_sync_clock(void) 405 { 406 atomic_t *sw_ptr; 407 int rc; 408 409 sw_ptr = &get_cpu_var(clock_sync_word); 410 rc = (atomic_read(sw_ptr) & 0x80000000U) != 0; 411 put_cpu_var(clock_sync_sync); 412 return rc; 413 } 414 415 /* Single threaded workqueue used for etr and stp sync events */ 416 static struct workqueue_struct *time_sync_wq; 417 418 static void __init time_init_wq(void) 419 { 420 if (time_sync_wq) 421 return; 422 time_sync_wq = create_singlethread_workqueue("timesync"); 423 stop_machine_create(); 424 } 425 426 /* 427 * External Time Reference (ETR) code. 428 */ 429 static int etr_port0_online; 430 static int etr_port1_online; 431 static int etr_steai_available; 432 433 static int __init early_parse_etr(char *p) 434 { 435 if (strncmp(p, "off", 3) == 0) 436 etr_port0_online = etr_port1_online = 0; 437 else if (strncmp(p, "port0", 5) == 0) 438 etr_port0_online = 1; 439 else if (strncmp(p, "port1", 5) == 0) 440 etr_port1_online = 1; 441 else if (strncmp(p, "on", 2) == 0) 442 etr_port0_online = etr_port1_online = 1; 443 return 0; 444 } 445 early_param("etr", early_parse_etr); 446 447 enum etr_event { 448 ETR_EVENT_PORT0_CHANGE, 449 ETR_EVENT_PORT1_CHANGE, 450 ETR_EVENT_PORT_ALERT, 451 ETR_EVENT_SYNC_CHECK, 452 ETR_EVENT_SWITCH_LOCAL, 453 ETR_EVENT_UPDATE, 454 }; 455 456 /* 457 * Valid bit combinations of the eacr register are (x = don't care): 458 * e0 e1 dp p0 p1 ea es sl 459 * 0 0 x 0 0 0 0 0 initial, disabled state 460 * 0 0 x 0 1 1 0 0 port 1 online 461 * 0 0 x 1 0 1 0 0 port 0 online 462 * 0 0 x 1 1 1 0 0 both ports online 463 * 0 1 x 0 1 1 0 0 port 1 online and usable, ETR or PPS mode 464 * 0 1 x 0 1 1 0 1 port 1 online, usable and ETR mode 465 * 0 1 x 0 1 1 1 0 port 1 online, usable, PPS mode, in-sync 466 * 0 1 x 0 1 1 1 1 port 1 online, usable, ETR mode, in-sync 467 * 0 1 x 1 1 1 0 0 both ports online, port 1 usable 468 * 0 1 x 1 1 1 1 0 both ports online, port 1 usable, PPS mode, in-sync 469 * 0 1 x 1 1 1 1 1 both ports online, port 1 usable, ETR mode, in-sync 470 * 1 0 x 1 0 1 0 0 port 0 online and usable, ETR or PPS mode 471 * 1 0 x 1 0 1 0 1 port 0 online, usable and ETR mode 472 * 1 0 x 1 0 1 1 0 port 0 online, usable, PPS mode, in-sync 473 * 1 0 x 1 0 1 1 1 port 0 online, usable, ETR mode, in-sync 474 * 1 0 x 1 1 1 0 0 both ports online, port 0 usable 475 * 1 0 x 1 1 1 1 0 both ports online, port 0 usable, PPS mode, in-sync 476 * 1 0 x 1 1 1 1 1 both ports online, port 0 usable, ETR mode, in-sync 477 * 1 1 x 1 1 1 1 0 both ports online & usable, ETR, in-sync 478 * 1 1 x 1 1 1 1 1 both ports online & usable, ETR, in-sync 479 */ 480 static struct etr_eacr etr_eacr; 481 static u64 etr_tolec; /* time of last eacr update */ 482 static struct etr_aib etr_port0; 483 static int etr_port0_uptodate; 484 static struct etr_aib etr_port1; 485 static int etr_port1_uptodate; 486 static unsigned long etr_events; 487 static struct timer_list etr_timer; 488 489 static void etr_timeout(unsigned long dummy); 490 static void etr_work_fn(struct work_struct *work); 491 static DEFINE_MUTEX(etr_work_mutex); 492 static DECLARE_WORK(etr_work, etr_work_fn); 493 494 /* 495 * Reset ETR attachment. 496 */ 497 static void etr_reset(void) 498 { 499 etr_eacr = (struct etr_eacr) { 500 .e0 = 0, .e1 = 0, ._pad0 = 4, .dp = 0, 501 .p0 = 0, .p1 = 0, ._pad1 = 0, .ea = 0, 502 .es = 0, .sl = 0 }; 503 if (etr_setr(&etr_eacr) == 0) { 504 etr_tolec = get_clock(); 505 set_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags); 506 if (etr_port0_online && etr_port1_online) 507 set_bit(CLOCK_SYNC_ETR, &clock_sync_flags); 508 } else if (etr_port0_online || etr_port1_online) { 509 pr_warning("The real or virtual hardware system does " 510 "not provide an ETR interface\n"); 511 etr_port0_online = etr_port1_online = 0; 512 } 513 } 514 515 static int __init etr_init(void) 516 { 517 struct etr_aib aib; 518 519 if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags)) 520 return 0; 521 time_init_wq(); 522 /* Check if this machine has the steai instruction. */ 523 if (etr_steai(&aib, ETR_STEAI_STEPPING_PORT) == 0) 524 etr_steai_available = 1; 525 setup_timer(&etr_timer, etr_timeout, 0UL); 526 if (etr_port0_online) { 527 set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events); 528 queue_work(time_sync_wq, &etr_work); 529 } 530 if (etr_port1_online) { 531 set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events); 532 queue_work(time_sync_wq, &etr_work); 533 } 534 return 0; 535 } 536 537 arch_initcall(etr_init); 538 539 /* 540 * Two sorts of ETR machine checks. The architecture reads: 541 * "When a machine-check niterruption occurs and if a switch-to-local or 542 * ETR-sync-check interrupt request is pending but disabled, this pending 543 * disabled interruption request is indicated and is cleared". 544 * Which means that we can get etr_switch_to_local events from the machine 545 * check handler although the interruption condition is disabled. Lovely.. 546 */ 547 548 /* 549 * Switch to local machine check. This is called when the last usable 550 * ETR port goes inactive. After switch to local the clock is not in sync. 551 */ 552 void etr_switch_to_local(void) 553 { 554 if (!etr_eacr.sl) 555 return; 556 disable_sync_clock(NULL); 557 set_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events); 558 queue_work(time_sync_wq, &etr_work); 559 } 560 561 /* 562 * ETR sync check machine check. This is called when the ETR OTE and the 563 * local clock OTE are farther apart than the ETR sync check tolerance. 564 * After a ETR sync check the clock is not in sync. The machine check 565 * is broadcasted to all cpus at the same time. 566 */ 567 void etr_sync_check(void) 568 { 569 if (!etr_eacr.es) 570 return; 571 disable_sync_clock(NULL); 572 set_bit(ETR_EVENT_SYNC_CHECK, &etr_events); 573 queue_work(time_sync_wq, &etr_work); 574 } 575 576 /* 577 * ETR timing alert. There are two causes: 578 * 1) port state change, check the usability of the port 579 * 2) port alert, one of the ETR-data-validity bits (v1-v2 bits of the 580 * sldr-status word) or ETR-data word 1 (edf1) or ETR-data word 3 (edf3) 581 * or ETR-data word 4 (edf4) has changed. 582 */ 583 static void etr_timing_alert(struct etr_irq_parm *intparm) 584 { 585 if (intparm->pc0) 586 /* ETR port 0 state change. */ 587 set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events); 588 if (intparm->pc1) 589 /* ETR port 1 state change. */ 590 set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events); 591 if (intparm->eai) 592 /* 593 * ETR port alert on either port 0, 1 or both. 594 * Both ports are not up-to-date now. 595 */ 596 set_bit(ETR_EVENT_PORT_ALERT, &etr_events); 597 queue_work(time_sync_wq, &etr_work); 598 } 599 600 static void etr_timeout(unsigned long dummy) 601 { 602 set_bit(ETR_EVENT_UPDATE, &etr_events); 603 queue_work(time_sync_wq, &etr_work); 604 } 605 606 /* 607 * Check if the etr mode is pss. 608 */ 609 static inline int etr_mode_is_pps(struct etr_eacr eacr) 610 { 611 return eacr.es && !eacr.sl; 612 } 613 614 /* 615 * Check if the etr mode is etr. 616 */ 617 static inline int etr_mode_is_etr(struct etr_eacr eacr) 618 { 619 return eacr.es && eacr.sl; 620 } 621 622 /* 623 * Check if the port can be used for TOD synchronization. 624 * For PPS mode the port has to receive OTEs. For ETR mode 625 * the port has to receive OTEs, the ETR stepping bit has to 626 * be zero and the validity bits for data frame 1, 2, and 3 627 * have to be 1. 628 */ 629 static int etr_port_valid(struct etr_aib *aib, int port) 630 { 631 unsigned int psc; 632 633 /* Check that this port is receiving OTEs. */ 634 if (aib->tsp == 0) 635 return 0; 636 637 psc = port ? aib->esw.psc1 : aib->esw.psc0; 638 if (psc == etr_lpsc_pps_mode) 639 return 1; 640 if (psc == etr_lpsc_operational_step) 641 return !aib->esw.y && aib->slsw.v1 && 642 aib->slsw.v2 && aib->slsw.v3; 643 return 0; 644 } 645 646 /* 647 * Check if two ports are on the same network. 648 */ 649 static int etr_compare_network(struct etr_aib *aib1, struct etr_aib *aib2) 650 { 651 // FIXME: any other fields we have to compare? 652 return aib1->edf1.net_id == aib2->edf1.net_id; 653 } 654 655 /* 656 * Wrapper for etr_stei that converts physical port states 657 * to logical port states to be consistent with the output 658 * of stetr (see etr_psc vs. etr_lpsc). 659 */ 660 static void etr_steai_cv(struct etr_aib *aib, unsigned int func) 661 { 662 BUG_ON(etr_steai(aib, func) != 0); 663 /* Convert port state to logical port state. */ 664 if (aib->esw.psc0 == 1) 665 aib->esw.psc0 = 2; 666 else if (aib->esw.psc0 == 0 && aib->esw.p == 0) 667 aib->esw.psc0 = 1; 668 if (aib->esw.psc1 == 1) 669 aib->esw.psc1 = 2; 670 else if (aib->esw.psc1 == 0 && aib->esw.p == 1) 671 aib->esw.psc1 = 1; 672 } 673 674 /* 675 * Check if the aib a2 is still connected to the same attachment as 676 * aib a1, the etv values differ by one and a2 is valid. 677 */ 678 static int etr_aib_follows(struct etr_aib *a1, struct etr_aib *a2, int p) 679 { 680 int state_a1, state_a2; 681 682 /* Paranoia check: e0/e1 should better be the same. */ 683 if (a1->esw.eacr.e0 != a2->esw.eacr.e0 || 684 a1->esw.eacr.e1 != a2->esw.eacr.e1) 685 return 0; 686 687 /* Still connected to the same etr ? */ 688 state_a1 = p ? a1->esw.psc1 : a1->esw.psc0; 689 state_a2 = p ? a2->esw.psc1 : a2->esw.psc0; 690 if (state_a1 == etr_lpsc_operational_step) { 691 if (state_a2 != etr_lpsc_operational_step || 692 a1->edf1.net_id != a2->edf1.net_id || 693 a1->edf1.etr_id != a2->edf1.etr_id || 694 a1->edf1.etr_pn != a2->edf1.etr_pn) 695 return 0; 696 } else if (state_a2 != etr_lpsc_pps_mode) 697 return 0; 698 699 /* The ETV value of a2 needs to be ETV of a1 + 1. */ 700 if (a1->edf2.etv + 1 != a2->edf2.etv) 701 return 0; 702 703 if (!etr_port_valid(a2, p)) 704 return 0; 705 706 return 1; 707 } 708 709 struct clock_sync_data { 710 atomic_t cpus; 711 int in_sync; 712 unsigned long long fixup_cc; 713 int etr_port; 714 struct etr_aib *etr_aib; 715 }; 716 717 static void clock_sync_cpu(struct clock_sync_data *sync) 718 { 719 atomic_dec(&sync->cpus); 720 enable_sync_clock(); 721 /* 722 * This looks like a busy wait loop but it isn't. etr_sync_cpus 723 * is called on all other cpus while the TOD clocks is stopped. 724 * __udelay will stop the cpu on an enabled wait psw until the 725 * TOD is running again. 726 */ 727 while (sync->in_sync == 0) { 728 __udelay(1); 729 /* 730 * A different cpu changes *in_sync. Therefore use 731 * barrier() to force memory access. 732 */ 733 barrier(); 734 } 735 if (sync->in_sync != 1) 736 /* Didn't work. Clear per-cpu in sync bit again. */ 737 disable_sync_clock(NULL); 738 /* 739 * This round of TOD syncing is done. Set the clock comparator 740 * to the next tick and let the processor continue. 741 */ 742 fixup_clock_comparator(sync->fixup_cc); 743 } 744 745 /* 746 * Sync the TOD clock using the port refered to by aibp. This port 747 * has to be enabled and the other port has to be disabled. The 748 * last eacr update has to be more than 1.6 seconds in the past. 749 */ 750 static int etr_sync_clock(void *data) 751 { 752 static int first; 753 unsigned long long clock, old_clock, delay, delta; 754 struct clock_sync_data *etr_sync; 755 struct etr_aib *sync_port, *aib; 756 int port; 757 int rc; 758 759 etr_sync = data; 760 761 if (xchg(&first, 1) == 1) { 762 /* Slave */ 763 clock_sync_cpu(etr_sync); 764 return 0; 765 } 766 767 /* Wait until all other cpus entered the sync function. */ 768 while (atomic_read(&etr_sync->cpus) != 0) 769 cpu_relax(); 770 771 port = etr_sync->etr_port; 772 aib = etr_sync->etr_aib; 773 sync_port = (port == 0) ? &etr_port0 : &etr_port1; 774 enable_sync_clock(); 775 776 /* Set clock to next OTE. */ 777 __ctl_set_bit(14, 21); 778 __ctl_set_bit(0, 29); 779 clock = ((unsigned long long) (aib->edf2.etv + 1)) << 32; 780 old_clock = get_clock(); 781 if (set_clock(clock) == 0) { 782 __udelay(1); /* Wait for the clock to start. */ 783 __ctl_clear_bit(0, 29); 784 __ctl_clear_bit(14, 21); 785 etr_stetr(aib); 786 /* Adjust Linux timing variables. */ 787 delay = (unsigned long long) 788 (aib->edf2.etv - sync_port->edf2.etv) << 32; 789 delta = adjust_time(old_clock, clock, delay); 790 etr_sync->fixup_cc = delta; 791 fixup_clock_comparator(delta); 792 /* Verify that the clock is properly set. */ 793 if (!etr_aib_follows(sync_port, aib, port)) { 794 /* Didn't work. */ 795 disable_sync_clock(NULL); 796 etr_sync->in_sync = -EAGAIN; 797 rc = -EAGAIN; 798 } else { 799 etr_sync->in_sync = 1; 800 rc = 0; 801 } 802 } else { 803 /* Could not set the clock ?!? */ 804 __ctl_clear_bit(0, 29); 805 __ctl_clear_bit(14, 21); 806 disable_sync_clock(NULL); 807 etr_sync->in_sync = -EAGAIN; 808 rc = -EAGAIN; 809 } 810 xchg(&first, 0); 811 return rc; 812 } 813 814 static int etr_sync_clock_stop(struct etr_aib *aib, int port) 815 { 816 struct clock_sync_data etr_sync; 817 struct etr_aib *sync_port; 818 int follows; 819 int rc; 820 821 /* Check if the current aib is adjacent to the sync port aib. */ 822 sync_port = (port == 0) ? &etr_port0 : &etr_port1; 823 follows = etr_aib_follows(sync_port, aib, port); 824 memcpy(sync_port, aib, sizeof(*aib)); 825 if (!follows) 826 return -EAGAIN; 827 memset(&etr_sync, 0, sizeof(etr_sync)); 828 etr_sync.etr_aib = aib; 829 etr_sync.etr_port = port; 830 get_online_cpus(); 831 atomic_set(&etr_sync.cpus, num_online_cpus() - 1); 832 rc = stop_machine(etr_sync_clock, &etr_sync, &cpu_online_map); 833 put_online_cpus(); 834 return rc; 835 } 836 837 /* 838 * Handle the immediate effects of the different events. 839 * The port change event is used for online/offline changes. 840 */ 841 static struct etr_eacr etr_handle_events(struct etr_eacr eacr) 842 { 843 if (test_and_clear_bit(ETR_EVENT_SYNC_CHECK, &etr_events)) 844 eacr.es = 0; 845 if (test_and_clear_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events)) 846 eacr.es = eacr.sl = 0; 847 if (test_and_clear_bit(ETR_EVENT_PORT_ALERT, &etr_events)) 848 etr_port0_uptodate = etr_port1_uptodate = 0; 849 850 if (test_and_clear_bit(ETR_EVENT_PORT0_CHANGE, &etr_events)) { 851 if (eacr.e0) 852 /* 853 * Port change of an enabled port. We have to 854 * assume that this can have caused an stepping 855 * port switch. 856 */ 857 etr_tolec = get_clock(); 858 eacr.p0 = etr_port0_online; 859 if (!eacr.p0) 860 eacr.e0 = 0; 861 etr_port0_uptodate = 0; 862 } 863 if (test_and_clear_bit(ETR_EVENT_PORT1_CHANGE, &etr_events)) { 864 if (eacr.e1) 865 /* 866 * Port change of an enabled port. We have to 867 * assume that this can have caused an stepping 868 * port switch. 869 */ 870 etr_tolec = get_clock(); 871 eacr.p1 = etr_port1_online; 872 if (!eacr.p1) 873 eacr.e1 = 0; 874 etr_port1_uptodate = 0; 875 } 876 clear_bit(ETR_EVENT_UPDATE, &etr_events); 877 return eacr; 878 } 879 880 /* 881 * Set up a timer that expires after the etr_tolec + 1.6 seconds if 882 * one of the ports needs an update. 883 */ 884 static void etr_set_tolec_timeout(unsigned long long now) 885 { 886 unsigned long micros; 887 888 if ((!etr_eacr.p0 || etr_port0_uptodate) && 889 (!etr_eacr.p1 || etr_port1_uptodate)) 890 return; 891 micros = (now > etr_tolec) ? ((now - etr_tolec) >> 12) : 0; 892 micros = (micros > 1600000) ? 0 : 1600000 - micros; 893 mod_timer(&etr_timer, jiffies + (micros * HZ) / 1000000 + 1); 894 } 895 896 /* 897 * Set up a time that expires after 1/2 second. 898 */ 899 static void etr_set_sync_timeout(void) 900 { 901 mod_timer(&etr_timer, jiffies + HZ/2); 902 } 903 904 /* 905 * Update the aib information for one or both ports. 906 */ 907 static struct etr_eacr etr_handle_update(struct etr_aib *aib, 908 struct etr_eacr eacr) 909 { 910 /* With both ports disabled the aib information is useless. */ 911 if (!eacr.e0 && !eacr.e1) 912 return eacr; 913 914 /* Update port0 or port1 with aib stored in etr_work_fn. */ 915 if (aib->esw.q == 0) { 916 /* Information for port 0 stored. */ 917 if (eacr.p0 && !etr_port0_uptodate) { 918 etr_port0 = *aib; 919 if (etr_port0_online) 920 etr_port0_uptodate = 1; 921 } 922 } else { 923 /* Information for port 1 stored. */ 924 if (eacr.p1 && !etr_port1_uptodate) { 925 etr_port1 = *aib; 926 if (etr_port0_online) 927 etr_port1_uptodate = 1; 928 } 929 } 930 931 /* 932 * Do not try to get the alternate port aib if the clock 933 * is not in sync yet. 934 */ 935 if (!check_sync_clock()) 936 return eacr; 937 938 /* 939 * If steai is available we can get the information about 940 * the other port immediately. If only stetr is available the 941 * data-port bit toggle has to be used. 942 */ 943 if (etr_steai_available) { 944 if (eacr.p0 && !etr_port0_uptodate) { 945 etr_steai_cv(&etr_port0, ETR_STEAI_PORT_0); 946 etr_port0_uptodate = 1; 947 } 948 if (eacr.p1 && !etr_port1_uptodate) { 949 etr_steai_cv(&etr_port1, ETR_STEAI_PORT_1); 950 etr_port1_uptodate = 1; 951 } 952 } else { 953 /* 954 * One port was updated above, if the other 955 * port is not uptodate toggle dp bit. 956 */ 957 if ((eacr.p0 && !etr_port0_uptodate) || 958 (eacr.p1 && !etr_port1_uptodate)) 959 eacr.dp ^= 1; 960 else 961 eacr.dp = 0; 962 } 963 return eacr; 964 } 965 966 /* 967 * Write new etr control register if it differs from the current one. 968 * Return 1 if etr_tolec has been updated as well. 969 */ 970 static void etr_update_eacr(struct etr_eacr eacr) 971 { 972 int dp_changed; 973 974 if (memcmp(&etr_eacr, &eacr, sizeof(eacr)) == 0) 975 /* No change, return. */ 976 return; 977 /* 978 * The disable of an active port of the change of the data port 979 * bit can/will cause a change in the data port. 980 */ 981 dp_changed = etr_eacr.e0 > eacr.e0 || etr_eacr.e1 > eacr.e1 || 982 (etr_eacr.dp ^ eacr.dp) != 0; 983 etr_eacr = eacr; 984 etr_setr(&etr_eacr); 985 if (dp_changed) 986 etr_tolec = get_clock(); 987 } 988 989 /* 990 * ETR work. In this function you'll find the main logic. In 991 * particular this is the only function that calls etr_update_eacr(), 992 * it "controls" the etr control register. 993 */ 994 static void etr_work_fn(struct work_struct *work) 995 { 996 unsigned long long now; 997 struct etr_eacr eacr; 998 struct etr_aib aib; 999 int sync_port; 1000 1001 /* prevent multiple execution. */ 1002 mutex_lock(&etr_work_mutex); 1003 1004 /* Create working copy of etr_eacr. */ 1005 eacr = etr_eacr; 1006 1007 /* Check for the different events and their immediate effects. */ 1008 eacr = etr_handle_events(eacr); 1009 1010 /* Check if ETR is supposed to be active. */ 1011 eacr.ea = eacr.p0 || eacr.p1; 1012 if (!eacr.ea) { 1013 /* Both ports offline. Reset everything. */ 1014 eacr.dp = eacr.es = eacr.sl = 0; 1015 on_each_cpu(disable_sync_clock, NULL, 1); 1016 del_timer_sync(&etr_timer); 1017 etr_update_eacr(eacr); 1018 goto out_unlock; 1019 } 1020 1021 /* Store aib to get the current ETR status word. */ 1022 BUG_ON(etr_stetr(&aib) != 0); 1023 etr_port0.esw = etr_port1.esw = aib.esw; /* Copy status word. */ 1024 now = get_clock(); 1025 1026 /* 1027 * Update the port information if the last stepping port change 1028 * or data port change is older than 1.6 seconds. 1029 */ 1030 if (now >= etr_tolec + (1600000 << 12)) 1031 eacr = etr_handle_update(&aib, eacr); 1032 1033 /* 1034 * Select ports to enable. The prefered synchronization mode is PPS. 1035 * If a port can be enabled depends on a number of things: 1036 * 1) The port needs to be online and uptodate. A port is not 1037 * disabled just because it is not uptodate, but it is only 1038 * enabled if it is uptodate. 1039 * 2) The port needs to have the same mode (pps / etr). 1040 * 3) The port needs to be usable -> etr_port_valid() == 1 1041 * 4) To enable the second port the clock needs to be in sync. 1042 * 5) If both ports are useable and are ETR ports, the network id 1043 * has to be the same. 1044 * The eacr.sl bit is used to indicate etr mode vs. pps mode. 1045 */ 1046 if (eacr.p0 && aib.esw.psc0 == etr_lpsc_pps_mode) { 1047 eacr.sl = 0; 1048 eacr.e0 = 1; 1049 if (!etr_mode_is_pps(etr_eacr)) 1050 eacr.es = 0; 1051 if (!eacr.es || !eacr.p1 || aib.esw.psc1 != etr_lpsc_pps_mode) 1052 eacr.e1 = 0; 1053 // FIXME: uptodate checks ? 1054 else if (etr_port0_uptodate && etr_port1_uptodate) 1055 eacr.e1 = 1; 1056 sync_port = (etr_port0_uptodate && 1057 etr_port_valid(&etr_port0, 0)) ? 0 : -1; 1058 } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_pps_mode) { 1059 eacr.sl = 0; 1060 eacr.e0 = 0; 1061 eacr.e1 = 1; 1062 if (!etr_mode_is_pps(etr_eacr)) 1063 eacr.es = 0; 1064 sync_port = (etr_port1_uptodate && 1065 etr_port_valid(&etr_port1, 1)) ? 1 : -1; 1066 } else if (eacr.p0 && aib.esw.psc0 == etr_lpsc_operational_step) { 1067 eacr.sl = 1; 1068 eacr.e0 = 1; 1069 if (!etr_mode_is_etr(etr_eacr)) 1070 eacr.es = 0; 1071 if (!eacr.es || !eacr.p1 || 1072 aib.esw.psc1 != etr_lpsc_operational_alt) 1073 eacr.e1 = 0; 1074 else if (etr_port0_uptodate && etr_port1_uptodate && 1075 etr_compare_network(&etr_port0, &etr_port1)) 1076 eacr.e1 = 1; 1077 sync_port = (etr_port0_uptodate && 1078 etr_port_valid(&etr_port0, 0)) ? 0 : -1; 1079 } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_operational_step) { 1080 eacr.sl = 1; 1081 eacr.e0 = 0; 1082 eacr.e1 = 1; 1083 if (!etr_mode_is_etr(etr_eacr)) 1084 eacr.es = 0; 1085 sync_port = (etr_port1_uptodate && 1086 etr_port_valid(&etr_port1, 1)) ? 1 : -1; 1087 } else { 1088 /* Both ports not usable. */ 1089 eacr.es = eacr.sl = 0; 1090 sync_port = -1; 1091 } 1092 1093 /* 1094 * If the clock is in sync just update the eacr and return. 1095 * If there is no valid sync port wait for a port update. 1096 */ 1097 if (check_sync_clock() || sync_port < 0) { 1098 etr_update_eacr(eacr); 1099 etr_set_tolec_timeout(now); 1100 goto out_unlock; 1101 } 1102 1103 /* 1104 * Prepare control register for clock syncing 1105 * (reset data port bit, set sync check control. 1106 */ 1107 eacr.dp = 0; 1108 eacr.es = 1; 1109 1110 /* 1111 * Update eacr and try to synchronize the clock. If the update 1112 * of eacr caused a stepping port switch (or if we have to 1113 * assume that a stepping port switch has occured) or the 1114 * clock syncing failed, reset the sync check control bit 1115 * and set up a timer to try again after 0.5 seconds 1116 */ 1117 etr_update_eacr(eacr); 1118 if (now < etr_tolec + (1600000 << 12) || 1119 etr_sync_clock_stop(&aib, sync_port) != 0) { 1120 /* Sync failed. Try again in 1/2 second. */ 1121 eacr.es = 0; 1122 etr_update_eacr(eacr); 1123 etr_set_sync_timeout(); 1124 } else 1125 etr_set_tolec_timeout(now); 1126 out_unlock: 1127 mutex_unlock(&etr_work_mutex); 1128 } 1129 1130 /* 1131 * Sysfs interface functions 1132 */ 1133 static struct sysdev_class etr_sysclass = { 1134 .name = "etr", 1135 }; 1136 1137 static struct sys_device etr_port0_dev = { 1138 .id = 0, 1139 .cls = &etr_sysclass, 1140 }; 1141 1142 static struct sys_device etr_port1_dev = { 1143 .id = 1, 1144 .cls = &etr_sysclass, 1145 }; 1146 1147 /* 1148 * ETR class attributes 1149 */ 1150 static ssize_t etr_stepping_port_show(struct sysdev_class *class, char *buf) 1151 { 1152 return sprintf(buf, "%i\n", etr_port0.esw.p); 1153 } 1154 1155 static SYSDEV_CLASS_ATTR(stepping_port, 0400, etr_stepping_port_show, NULL); 1156 1157 static ssize_t etr_stepping_mode_show(struct sysdev_class *class, char *buf) 1158 { 1159 char *mode_str; 1160 1161 if (etr_mode_is_pps(etr_eacr)) 1162 mode_str = "pps"; 1163 else if (etr_mode_is_etr(etr_eacr)) 1164 mode_str = "etr"; 1165 else 1166 mode_str = "local"; 1167 return sprintf(buf, "%s\n", mode_str); 1168 } 1169 1170 static SYSDEV_CLASS_ATTR(stepping_mode, 0400, etr_stepping_mode_show, NULL); 1171 1172 /* 1173 * ETR port attributes 1174 */ 1175 static inline struct etr_aib *etr_aib_from_dev(struct sys_device *dev) 1176 { 1177 if (dev == &etr_port0_dev) 1178 return etr_port0_online ? &etr_port0 : NULL; 1179 else 1180 return etr_port1_online ? &etr_port1 : NULL; 1181 } 1182 1183 static ssize_t etr_online_show(struct sys_device *dev, 1184 struct sysdev_attribute *attr, 1185 char *buf) 1186 { 1187 unsigned int online; 1188 1189 online = (dev == &etr_port0_dev) ? etr_port0_online : etr_port1_online; 1190 return sprintf(buf, "%i\n", online); 1191 } 1192 1193 static ssize_t etr_online_store(struct sys_device *dev, 1194 struct sysdev_attribute *attr, 1195 const char *buf, size_t count) 1196 { 1197 unsigned int value; 1198 1199 value = simple_strtoul(buf, NULL, 0); 1200 if (value != 0 && value != 1) 1201 return -EINVAL; 1202 if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags)) 1203 return -EOPNOTSUPP; 1204 mutex_lock(&clock_sync_mutex); 1205 if (dev == &etr_port0_dev) { 1206 if (etr_port0_online == value) 1207 goto out; /* Nothing to do. */ 1208 etr_port0_online = value; 1209 if (etr_port0_online && etr_port1_online) 1210 set_bit(CLOCK_SYNC_ETR, &clock_sync_flags); 1211 else 1212 clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags); 1213 set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events); 1214 queue_work(time_sync_wq, &etr_work); 1215 } else { 1216 if (etr_port1_online == value) 1217 goto out; /* Nothing to do. */ 1218 etr_port1_online = value; 1219 if (etr_port0_online && etr_port1_online) 1220 set_bit(CLOCK_SYNC_ETR, &clock_sync_flags); 1221 else 1222 clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags); 1223 set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events); 1224 queue_work(time_sync_wq, &etr_work); 1225 } 1226 out: 1227 mutex_unlock(&clock_sync_mutex); 1228 return count; 1229 } 1230 1231 static SYSDEV_ATTR(online, 0600, etr_online_show, etr_online_store); 1232 1233 static ssize_t etr_stepping_control_show(struct sys_device *dev, 1234 struct sysdev_attribute *attr, 1235 char *buf) 1236 { 1237 return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ? 1238 etr_eacr.e0 : etr_eacr.e1); 1239 } 1240 1241 static SYSDEV_ATTR(stepping_control, 0400, etr_stepping_control_show, NULL); 1242 1243 static ssize_t etr_mode_code_show(struct sys_device *dev, 1244 struct sysdev_attribute *attr, char *buf) 1245 { 1246 if (!etr_port0_online && !etr_port1_online) 1247 /* Status word is not uptodate if both ports are offline. */ 1248 return -ENODATA; 1249 return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ? 1250 etr_port0.esw.psc0 : etr_port0.esw.psc1); 1251 } 1252 1253 static SYSDEV_ATTR(state_code, 0400, etr_mode_code_show, NULL); 1254 1255 static ssize_t etr_untuned_show(struct sys_device *dev, 1256 struct sysdev_attribute *attr, char *buf) 1257 { 1258 struct etr_aib *aib = etr_aib_from_dev(dev); 1259 1260 if (!aib || !aib->slsw.v1) 1261 return -ENODATA; 1262 return sprintf(buf, "%i\n", aib->edf1.u); 1263 } 1264 1265 static SYSDEV_ATTR(untuned, 0400, etr_untuned_show, NULL); 1266 1267 static ssize_t etr_network_id_show(struct sys_device *dev, 1268 struct sysdev_attribute *attr, char *buf) 1269 { 1270 struct etr_aib *aib = etr_aib_from_dev(dev); 1271 1272 if (!aib || !aib->slsw.v1) 1273 return -ENODATA; 1274 return sprintf(buf, "%i\n", aib->edf1.net_id); 1275 } 1276 1277 static SYSDEV_ATTR(network, 0400, etr_network_id_show, NULL); 1278 1279 static ssize_t etr_id_show(struct sys_device *dev, 1280 struct sysdev_attribute *attr, char *buf) 1281 { 1282 struct etr_aib *aib = etr_aib_from_dev(dev); 1283 1284 if (!aib || !aib->slsw.v1) 1285 return -ENODATA; 1286 return sprintf(buf, "%i\n", aib->edf1.etr_id); 1287 } 1288 1289 static SYSDEV_ATTR(id, 0400, etr_id_show, NULL); 1290 1291 static ssize_t etr_port_number_show(struct sys_device *dev, 1292 struct sysdev_attribute *attr, char *buf) 1293 { 1294 struct etr_aib *aib = etr_aib_from_dev(dev); 1295 1296 if (!aib || !aib->slsw.v1) 1297 return -ENODATA; 1298 return sprintf(buf, "%i\n", aib->edf1.etr_pn); 1299 } 1300 1301 static SYSDEV_ATTR(port, 0400, etr_port_number_show, NULL); 1302 1303 static ssize_t etr_coupled_show(struct sys_device *dev, 1304 struct sysdev_attribute *attr, char *buf) 1305 { 1306 struct etr_aib *aib = etr_aib_from_dev(dev); 1307 1308 if (!aib || !aib->slsw.v3) 1309 return -ENODATA; 1310 return sprintf(buf, "%i\n", aib->edf3.c); 1311 } 1312 1313 static SYSDEV_ATTR(coupled, 0400, etr_coupled_show, NULL); 1314 1315 static ssize_t etr_local_time_show(struct sys_device *dev, 1316 struct sysdev_attribute *attr, char *buf) 1317 { 1318 struct etr_aib *aib = etr_aib_from_dev(dev); 1319 1320 if (!aib || !aib->slsw.v3) 1321 return -ENODATA; 1322 return sprintf(buf, "%i\n", aib->edf3.blto); 1323 } 1324 1325 static SYSDEV_ATTR(local_time, 0400, etr_local_time_show, NULL); 1326 1327 static ssize_t etr_utc_offset_show(struct sys_device *dev, 1328 struct sysdev_attribute *attr, char *buf) 1329 { 1330 struct etr_aib *aib = etr_aib_from_dev(dev); 1331 1332 if (!aib || !aib->slsw.v3) 1333 return -ENODATA; 1334 return sprintf(buf, "%i\n", aib->edf3.buo); 1335 } 1336 1337 static SYSDEV_ATTR(utc_offset, 0400, etr_utc_offset_show, NULL); 1338 1339 static struct sysdev_attribute *etr_port_attributes[] = { 1340 &attr_online, 1341 &attr_stepping_control, 1342 &attr_state_code, 1343 &attr_untuned, 1344 &attr_network, 1345 &attr_id, 1346 &attr_port, 1347 &attr_coupled, 1348 &attr_local_time, 1349 &attr_utc_offset, 1350 NULL 1351 }; 1352 1353 static int __init etr_register_port(struct sys_device *dev) 1354 { 1355 struct sysdev_attribute **attr; 1356 int rc; 1357 1358 rc = sysdev_register(dev); 1359 if (rc) 1360 goto out; 1361 for (attr = etr_port_attributes; *attr; attr++) { 1362 rc = sysdev_create_file(dev, *attr); 1363 if (rc) 1364 goto out_unreg; 1365 } 1366 return 0; 1367 out_unreg: 1368 for (; attr >= etr_port_attributes; attr--) 1369 sysdev_remove_file(dev, *attr); 1370 sysdev_unregister(dev); 1371 out: 1372 return rc; 1373 } 1374 1375 static void __init etr_unregister_port(struct sys_device *dev) 1376 { 1377 struct sysdev_attribute **attr; 1378 1379 for (attr = etr_port_attributes; *attr; attr++) 1380 sysdev_remove_file(dev, *attr); 1381 sysdev_unregister(dev); 1382 } 1383 1384 static int __init etr_init_sysfs(void) 1385 { 1386 int rc; 1387 1388 rc = sysdev_class_register(&etr_sysclass); 1389 if (rc) 1390 goto out; 1391 rc = sysdev_class_create_file(&etr_sysclass, &attr_stepping_port); 1392 if (rc) 1393 goto out_unreg_class; 1394 rc = sysdev_class_create_file(&etr_sysclass, &attr_stepping_mode); 1395 if (rc) 1396 goto out_remove_stepping_port; 1397 rc = etr_register_port(&etr_port0_dev); 1398 if (rc) 1399 goto out_remove_stepping_mode; 1400 rc = etr_register_port(&etr_port1_dev); 1401 if (rc) 1402 goto out_remove_port0; 1403 return 0; 1404 1405 out_remove_port0: 1406 etr_unregister_port(&etr_port0_dev); 1407 out_remove_stepping_mode: 1408 sysdev_class_remove_file(&etr_sysclass, &attr_stepping_mode); 1409 out_remove_stepping_port: 1410 sysdev_class_remove_file(&etr_sysclass, &attr_stepping_port); 1411 out_unreg_class: 1412 sysdev_class_unregister(&etr_sysclass); 1413 out: 1414 return rc; 1415 } 1416 1417 device_initcall(etr_init_sysfs); 1418 1419 /* 1420 * Server Time Protocol (STP) code. 1421 */ 1422 static int stp_online; 1423 static struct stp_sstpi stp_info; 1424 static void *stp_page; 1425 1426 static void stp_work_fn(struct work_struct *work); 1427 static DEFINE_MUTEX(stp_work_mutex); 1428 static DECLARE_WORK(stp_work, stp_work_fn); 1429 static struct timer_list stp_timer; 1430 1431 static int __init early_parse_stp(char *p) 1432 { 1433 if (strncmp(p, "off", 3) == 0) 1434 stp_online = 0; 1435 else if (strncmp(p, "on", 2) == 0) 1436 stp_online = 1; 1437 return 0; 1438 } 1439 early_param("stp", early_parse_stp); 1440 1441 /* 1442 * Reset STP attachment. 1443 */ 1444 static void __init stp_reset(void) 1445 { 1446 int rc; 1447 1448 stp_page = alloc_bootmem_pages(PAGE_SIZE); 1449 rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000); 1450 if (rc == 0) 1451 set_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags); 1452 else if (stp_online) { 1453 pr_warning("The real or virtual hardware system does " 1454 "not provide an STP interface\n"); 1455 free_bootmem((unsigned long) stp_page, PAGE_SIZE); 1456 stp_page = NULL; 1457 stp_online = 0; 1458 } 1459 } 1460 1461 static void stp_timeout(unsigned long dummy) 1462 { 1463 queue_work(time_sync_wq, &stp_work); 1464 } 1465 1466 static int __init stp_init(void) 1467 { 1468 if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags)) 1469 return 0; 1470 setup_timer(&stp_timer, stp_timeout, 0UL); 1471 time_init_wq(); 1472 if (!stp_online) 1473 return 0; 1474 queue_work(time_sync_wq, &stp_work); 1475 return 0; 1476 } 1477 1478 arch_initcall(stp_init); 1479 1480 /* 1481 * STP timing alert. There are three causes: 1482 * 1) timing status change 1483 * 2) link availability change 1484 * 3) time control parameter change 1485 * In all three cases we are only interested in the clock source state. 1486 * If a STP clock source is now available use it. 1487 */ 1488 static void stp_timing_alert(struct stp_irq_parm *intparm) 1489 { 1490 if (intparm->tsc || intparm->lac || intparm->tcpc) 1491 queue_work(time_sync_wq, &stp_work); 1492 } 1493 1494 /* 1495 * STP sync check machine check. This is called when the timing state 1496 * changes from the synchronized state to the unsynchronized state. 1497 * After a STP sync check the clock is not in sync. The machine check 1498 * is broadcasted to all cpus at the same time. 1499 */ 1500 void stp_sync_check(void) 1501 { 1502 disable_sync_clock(NULL); 1503 queue_work(time_sync_wq, &stp_work); 1504 } 1505 1506 /* 1507 * STP island condition machine check. This is called when an attached 1508 * server attempts to communicate over an STP link and the servers 1509 * have matching CTN ids and have a valid stratum-1 configuration 1510 * but the configurations do not match. 1511 */ 1512 void stp_island_check(void) 1513 { 1514 disable_sync_clock(NULL); 1515 queue_work(time_sync_wq, &stp_work); 1516 } 1517 1518 1519 static int stp_sync_clock(void *data) 1520 { 1521 static int first; 1522 unsigned long long old_clock, delta; 1523 struct clock_sync_data *stp_sync; 1524 int rc; 1525 1526 stp_sync = data; 1527 1528 if (xchg(&first, 1) == 1) { 1529 /* Slave */ 1530 clock_sync_cpu(stp_sync); 1531 return 0; 1532 } 1533 1534 /* Wait until all other cpus entered the sync function. */ 1535 while (atomic_read(&stp_sync->cpus) != 0) 1536 cpu_relax(); 1537 1538 enable_sync_clock(); 1539 1540 rc = 0; 1541 if (stp_info.todoff[0] || stp_info.todoff[1] || 1542 stp_info.todoff[2] || stp_info.todoff[3] || 1543 stp_info.tmd != 2) { 1544 old_clock = get_clock(); 1545 rc = chsc_sstpc(stp_page, STP_OP_SYNC, 0); 1546 if (rc == 0) { 1547 delta = adjust_time(old_clock, get_clock(), 0); 1548 fixup_clock_comparator(delta); 1549 rc = chsc_sstpi(stp_page, &stp_info, 1550 sizeof(struct stp_sstpi)); 1551 if (rc == 0 && stp_info.tmd != 2) 1552 rc = -EAGAIN; 1553 } 1554 } 1555 if (rc) { 1556 disable_sync_clock(NULL); 1557 stp_sync->in_sync = -EAGAIN; 1558 } else 1559 stp_sync->in_sync = 1; 1560 xchg(&first, 0); 1561 return 0; 1562 } 1563 1564 /* 1565 * STP work. Check for the STP state and take over the clock 1566 * synchronization if the STP clock source is usable. 1567 */ 1568 static void stp_work_fn(struct work_struct *work) 1569 { 1570 struct clock_sync_data stp_sync; 1571 int rc; 1572 1573 /* prevent multiple execution. */ 1574 mutex_lock(&stp_work_mutex); 1575 1576 if (!stp_online) { 1577 chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000); 1578 del_timer_sync(&stp_timer); 1579 goto out_unlock; 1580 } 1581 1582 rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0xb0e0); 1583 if (rc) 1584 goto out_unlock; 1585 1586 rc = chsc_sstpi(stp_page, &stp_info, sizeof(struct stp_sstpi)); 1587 if (rc || stp_info.c == 0) 1588 goto out_unlock; 1589 1590 /* Skip synchronization if the clock is already in sync. */ 1591 if (check_sync_clock()) 1592 goto out_unlock; 1593 1594 memset(&stp_sync, 0, sizeof(stp_sync)); 1595 get_online_cpus(); 1596 atomic_set(&stp_sync.cpus, num_online_cpus() - 1); 1597 stop_machine(stp_sync_clock, &stp_sync, &cpu_online_map); 1598 put_online_cpus(); 1599 1600 if (!check_sync_clock()) 1601 /* 1602 * There is a usable clock but the synchonization failed. 1603 * Retry after a second. 1604 */ 1605 mod_timer(&stp_timer, jiffies + HZ); 1606 1607 out_unlock: 1608 mutex_unlock(&stp_work_mutex); 1609 } 1610 1611 /* 1612 * STP class sysfs interface functions 1613 */ 1614 static struct sysdev_class stp_sysclass = { 1615 .name = "stp", 1616 }; 1617 1618 static ssize_t stp_ctn_id_show(struct sysdev_class *class, char *buf) 1619 { 1620 if (!stp_online) 1621 return -ENODATA; 1622 return sprintf(buf, "%016llx\n", 1623 *(unsigned long long *) stp_info.ctnid); 1624 } 1625 1626 static SYSDEV_CLASS_ATTR(ctn_id, 0400, stp_ctn_id_show, NULL); 1627 1628 static ssize_t stp_ctn_type_show(struct sysdev_class *class, char *buf) 1629 { 1630 if (!stp_online) 1631 return -ENODATA; 1632 return sprintf(buf, "%i\n", stp_info.ctn); 1633 } 1634 1635 static SYSDEV_CLASS_ATTR(ctn_type, 0400, stp_ctn_type_show, NULL); 1636 1637 static ssize_t stp_dst_offset_show(struct sysdev_class *class, char *buf) 1638 { 1639 if (!stp_online || !(stp_info.vbits & 0x2000)) 1640 return -ENODATA; 1641 return sprintf(buf, "%i\n", (int)(s16) stp_info.dsto); 1642 } 1643 1644 static SYSDEV_CLASS_ATTR(dst_offset, 0400, stp_dst_offset_show, NULL); 1645 1646 static ssize_t stp_leap_seconds_show(struct sysdev_class *class, char *buf) 1647 { 1648 if (!stp_online || !(stp_info.vbits & 0x8000)) 1649 return -ENODATA; 1650 return sprintf(buf, "%i\n", (int)(s16) stp_info.leaps); 1651 } 1652 1653 static SYSDEV_CLASS_ATTR(leap_seconds, 0400, stp_leap_seconds_show, NULL); 1654 1655 static ssize_t stp_stratum_show(struct sysdev_class *class, char *buf) 1656 { 1657 if (!stp_online) 1658 return -ENODATA; 1659 return sprintf(buf, "%i\n", (int)(s16) stp_info.stratum); 1660 } 1661 1662 static SYSDEV_CLASS_ATTR(stratum, 0400, stp_stratum_show, NULL); 1663 1664 static ssize_t stp_time_offset_show(struct sysdev_class *class, char *buf) 1665 { 1666 if (!stp_online || !(stp_info.vbits & 0x0800)) 1667 return -ENODATA; 1668 return sprintf(buf, "%i\n", (int) stp_info.tto); 1669 } 1670 1671 static SYSDEV_CLASS_ATTR(time_offset, 0400, stp_time_offset_show, NULL); 1672 1673 static ssize_t stp_time_zone_offset_show(struct sysdev_class *class, char *buf) 1674 { 1675 if (!stp_online || !(stp_info.vbits & 0x4000)) 1676 return -ENODATA; 1677 return sprintf(buf, "%i\n", (int)(s16) stp_info.tzo); 1678 } 1679 1680 static SYSDEV_CLASS_ATTR(time_zone_offset, 0400, 1681 stp_time_zone_offset_show, NULL); 1682 1683 static ssize_t stp_timing_mode_show(struct sysdev_class *class, char *buf) 1684 { 1685 if (!stp_online) 1686 return -ENODATA; 1687 return sprintf(buf, "%i\n", stp_info.tmd); 1688 } 1689 1690 static SYSDEV_CLASS_ATTR(timing_mode, 0400, stp_timing_mode_show, NULL); 1691 1692 static ssize_t stp_timing_state_show(struct sysdev_class *class, char *buf) 1693 { 1694 if (!stp_online) 1695 return -ENODATA; 1696 return sprintf(buf, "%i\n", stp_info.tst); 1697 } 1698 1699 static SYSDEV_CLASS_ATTR(timing_state, 0400, stp_timing_state_show, NULL); 1700 1701 static ssize_t stp_online_show(struct sysdev_class *class, char *buf) 1702 { 1703 return sprintf(buf, "%i\n", stp_online); 1704 } 1705 1706 static ssize_t stp_online_store(struct sysdev_class *class, 1707 const char *buf, size_t count) 1708 { 1709 unsigned int value; 1710 1711 value = simple_strtoul(buf, NULL, 0); 1712 if (value != 0 && value != 1) 1713 return -EINVAL; 1714 if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags)) 1715 return -EOPNOTSUPP; 1716 mutex_lock(&clock_sync_mutex); 1717 stp_online = value; 1718 if (stp_online) 1719 set_bit(CLOCK_SYNC_STP, &clock_sync_flags); 1720 else 1721 clear_bit(CLOCK_SYNC_STP, &clock_sync_flags); 1722 queue_work(time_sync_wq, &stp_work); 1723 mutex_unlock(&clock_sync_mutex); 1724 return count; 1725 } 1726 1727 /* 1728 * Can't use SYSDEV_CLASS_ATTR because the attribute should be named 1729 * stp/online but attr_online already exists in this file .. 1730 */ 1731 static struct sysdev_class_attribute attr_stp_online = { 1732 .attr = { .name = "online", .mode = 0600 }, 1733 .show = stp_online_show, 1734 .store = stp_online_store, 1735 }; 1736 1737 static struct sysdev_class_attribute *stp_attributes[] = { 1738 &attr_ctn_id, 1739 &attr_ctn_type, 1740 &attr_dst_offset, 1741 &attr_leap_seconds, 1742 &attr_stp_online, 1743 &attr_stratum, 1744 &attr_time_offset, 1745 &attr_time_zone_offset, 1746 &attr_timing_mode, 1747 &attr_timing_state, 1748 NULL 1749 }; 1750 1751 static int __init stp_init_sysfs(void) 1752 { 1753 struct sysdev_class_attribute **attr; 1754 int rc; 1755 1756 rc = sysdev_class_register(&stp_sysclass); 1757 if (rc) 1758 goto out; 1759 for (attr = stp_attributes; *attr; attr++) { 1760 rc = sysdev_class_create_file(&stp_sysclass, *attr); 1761 if (rc) 1762 goto out_unreg; 1763 } 1764 return 0; 1765 out_unreg: 1766 for (; attr >= stp_attributes; attr--) 1767 sysdev_class_remove_file(&stp_sysclass, *attr); 1768 sysdev_class_unregister(&stp_sysclass); 1769 out: 1770 return rc; 1771 } 1772 1773 device_initcall(stp_init_sysfs); 1774