1 /* 2 * arch/s390/kernel/time.c 3 * Time of day based timer functions. 4 * 5 * S390 version 6 * Copyright IBM Corp. 1999, 2008 7 * Author(s): Hartmut Penner (hp@de.ibm.com), 8 * Martin Schwidefsky (schwidefsky@de.ibm.com), 9 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com) 10 * 11 * Derived from "arch/i386/kernel/time.c" 12 * Copyright (C) 1991, 1992, 1995 Linus Torvalds 13 */ 14 15 #define KMSG_COMPONENT "time" 16 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt 17 18 #include <linux/errno.h> 19 #include <linux/module.h> 20 #include <linux/sched.h> 21 #include <linux/kernel.h> 22 #include <linux/param.h> 23 #include <linux/string.h> 24 #include <linux/mm.h> 25 #include <linux/interrupt.h> 26 #include <linux/cpu.h> 27 #include <linux/stop_machine.h> 28 #include <linux/time.h> 29 #include <linux/sysdev.h> 30 #include <linux/delay.h> 31 #include <linux/init.h> 32 #include <linux/smp.h> 33 #include <linux/types.h> 34 #include <linux/profile.h> 35 #include <linux/timex.h> 36 #include <linux/notifier.h> 37 #include <linux/clocksource.h> 38 #include <linux/clockchips.h> 39 #include <asm/uaccess.h> 40 #include <asm/delay.h> 41 #include <asm/s390_ext.h> 42 #include <asm/div64.h> 43 #include <asm/vdso.h> 44 #include <asm/irq.h> 45 #include <asm/irq_regs.h> 46 #include <asm/timer.h> 47 #include <asm/etr.h> 48 #include <asm/cio.h> 49 50 /* change this if you have some constant time drift */ 51 #define USECS_PER_JIFFY ((unsigned long) 1000000/HZ) 52 #define CLK_TICKS_PER_JIFFY ((unsigned long) USECS_PER_JIFFY << 12) 53 54 /* 55 * Create a small time difference between the timer interrupts 56 * on the different cpus to avoid lock contention. 57 */ 58 #define CPU_DEVIATION (smp_processor_id() << 12) 59 60 #define TICK_SIZE tick 61 62 u64 sched_clock_base_cc = -1; /* Force to data section. */ 63 EXPORT_SYMBOL_GPL(sched_clock_base_cc); 64 65 static DEFINE_PER_CPU(struct clock_event_device, comparators); 66 67 /* 68 * Scheduler clock - returns current time in nanosec units. 69 */ 70 unsigned long long notrace sched_clock(void) 71 { 72 return (get_clock_monotonic() * 125) >> 9; 73 } 74 75 /* 76 * Monotonic_clock - returns # of nanoseconds passed since time_init() 77 */ 78 unsigned long long monotonic_clock(void) 79 { 80 return sched_clock(); 81 } 82 EXPORT_SYMBOL(monotonic_clock); 83 84 void tod_to_timeval(__u64 todval, struct timespec *xtime) 85 { 86 unsigned long long sec; 87 88 sec = todval >> 12; 89 do_div(sec, 1000000); 90 xtime->tv_sec = sec; 91 todval -= (sec * 1000000) << 12; 92 xtime->tv_nsec = ((todval * 1000) >> 12); 93 } 94 EXPORT_SYMBOL(tod_to_timeval); 95 96 void clock_comparator_work(void) 97 { 98 struct clock_event_device *cd; 99 100 S390_lowcore.clock_comparator = -1ULL; 101 set_clock_comparator(S390_lowcore.clock_comparator); 102 cd = &__get_cpu_var(comparators); 103 cd->event_handler(cd); 104 } 105 106 /* 107 * Fixup the clock comparator. 108 */ 109 static void fixup_clock_comparator(unsigned long long delta) 110 { 111 /* If nobody is waiting there's nothing to fix. */ 112 if (S390_lowcore.clock_comparator == -1ULL) 113 return; 114 S390_lowcore.clock_comparator += delta; 115 set_clock_comparator(S390_lowcore.clock_comparator); 116 } 117 118 static int s390_next_event(unsigned long delta, 119 struct clock_event_device *evt) 120 { 121 S390_lowcore.clock_comparator = get_clock() + delta; 122 set_clock_comparator(S390_lowcore.clock_comparator); 123 return 0; 124 } 125 126 static void s390_set_mode(enum clock_event_mode mode, 127 struct clock_event_device *evt) 128 { 129 } 130 131 /* 132 * Set up lowcore and control register of the current cpu to 133 * enable TOD clock and clock comparator interrupts. 134 */ 135 void init_cpu_timer(void) 136 { 137 struct clock_event_device *cd; 138 int cpu; 139 140 S390_lowcore.clock_comparator = -1ULL; 141 set_clock_comparator(S390_lowcore.clock_comparator); 142 143 cpu = smp_processor_id(); 144 cd = &per_cpu(comparators, cpu); 145 cd->name = "comparator"; 146 cd->features = CLOCK_EVT_FEAT_ONESHOT; 147 cd->mult = 16777; 148 cd->shift = 12; 149 cd->min_delta_ns = 1; 150 cd->max_delta_ns = LONG_MAX; 151 cd->rating = 400; 152 cd->cpumask = cpumask_of(cpu); 153 cd->set_next_event = s390_next_event; 154 cd->set_mode = s390_set_mode; 155 156 clockevents_register_device(cd); 157 158 /* Enable clock comparator timer interrupt. */ 159 __ctl_set_bit(0,11); 160 161 /* Always allow the timing alert external interrupt. */ 162 __ctl_set_bit(0, 4); 163 } 164 165 static void clock_comparator_interrupt(__u16 code) 166 { 167 if (S390_lowcore.clock_comparator == -1ULL) 168 set_clock_comparator(S390_lowcore.clock_comparator); 169 } 170 171 static void etr_timing_alert(struct etr_irq_parm *); 172 static void stp_timing_alert(struct stp_irq_parm *); 173 174 static void timing_alert_interrupt(__u16 code) 175 { 176 if (S390_lowcore.ext_params & 0x00c40000) 177 etr_timing_alert((struct etr_irq_parm *) 178 &S390_lowcore.ext_params); 179 if (S390_lowcore.ext_params & 0x00038000) 180 stp_timing_alert((struct stp_irq_parm *) 181 &S390_lowcore.ext_params); 182 } 183 184 static void etr_reset(void); 185 static void stp_reset(void); 186 187 unsigned long read_persistent_clock(void) 188 { 189 struct timespec ts; 190 191 tod_to_timeval(get_clock() - TOD_UNIX_EPOCH, &ts); 192 return ts.tv_sec; 193 } 194 195 static cycle_t read_tod_clock(struct clocksource *cs) 196 { 197 return get_clock(); 198 } 199 200 static struct clocksource clocksource_tod = { 201 .name = "tod", 202 .rating = 400, 203 .read = read_tod_clock, 204 .mask = -1ULL, 205 .mult = 1000, 206 .shift = 12, 207 .flags = CLOCK_SOURCE_IS_CONTINUOUS, 208 }; 209 210 211 void update_vsyscall(struct timespec *wall_time, struct clocksource *clock) 212 { 213 if (clock != &clocksource_tod) 214 return; 215 216 /* Make userspace gettimeofday spin until we're done. */ 217 ++vdso_data->tb_update_count; 218 smp_wmb(); 219 vdso_data->xtime_tod_stamp = clock->cycle_last; 220 vdso_data->xtime_clock_sec = xtime.tv_sec; 221 vdso_data->xtime_clock_nsec = xtime.tv_nsec; 222 vdso_data->wtom_clock_sec = wall_to_monotonic.tv_sec; 223 vdso_data->wtom_clock_nsec = wall_to_monotonic.tv_nsec; 224 smp_wmb(); 225 ++vdso_data->tb_update_count; 226 } 227 228 extern struct timezone sys_tz; 229 230 void update_vsyscall_tz(void) 231 { 232 /* Make userspace gettimeofday spin until we're done. */ 233 ++vdso_data->tb_update_count; 234 smp_wmb(); 235 vdso_data->tz_minuteswest = sys_tz.tz_minuteswest; 236 vdso_data->tz_dsttime = sys_tz.tz_dsttime; 237 smp_wmb(); 238 ++vdso_data->tb_update_count; 239 } 240 241 /* 242 * Initialize the TOD clock and the CPU timer of 243 * the boot cpu. 244 */ 245 void __init time_init(void) 246 { 247 struct timespec ts; 248 unsigned long flags; 249 cycle_t now; 250 251 /* Reset time synchronization interfaces. */ 252 etr_reset(); 253 stp_reset(); 254 255 /* request the clock comparator external interrupt */ 256 if (register_external_interrupt(0x1004, clock_comparator_interrupt)) 257 panic("Couldn't request external interrupt 0x1004"); 258 259 /* request the timing alert external interrupt */ 260 if (register_external_interrupt(0x1406, timing_alert_interrupt)) 261 panic("Couldn't request external interrupt 0x1406"); 262 263 if (clocksource_register(&clocksource_tod) != 0) 264 panic("Could not register TOD clock source"); 265 266 /* 267 * The TOD clock is an accurate clock. The xtime should be 268 * initialized in a way that the difference between TOD and 269 * xtime is reasonably small. Too bad that timekeeping_init 270 * sets xtime.tv_nsec to zero. In addition the clock source 271 * change from the jiffies clock source to the TOD clock 272 * source add another error of up to 1/HZ second. The same 273 * function sets wall_to_monotonic to a value that is too 274 * small for /proc/uptime to be accurate. 275 * Reset xtime and wall_to_monotonic to sane values. 276 */ 277 write_seqlock_irqsave(&xtime_lock, flags); 278 now = get_clock(); 279 tod_to_timeval(now - TOD_UNIX_EPOCH, &xtime); 280 clocksource_tod.cycle_last = now; 281 clocksource_tod.raw_time = xtime; 282 tod_to_timeval(sched_clock_base_cc - TOD_UNIX_EPOCH, &ts); 283 set_normalized_timespec(&wall_to_monotonic, -ts.tv_sec, -ts.tv_nsec); 284 write_sequnlock_irqrestore(&xtime_lock, flags); 285 286 /* Enable TOD clock interrupts on the boot cpu. */ 287 init_cpu_timer(); 288 289 /* Enable cpu timer interrupts on the boot cpu. */ 290 vtime_init(); 291 } 292 293 /* 294 * The time is "clock". old is what we think the time is. 295 * Adjust the value by a multiple of jiffies and add the delta to ntp. 296 * "delay" is an approximation how long the synchronization took. If 297 * the time correction is positive, then "delay" is subtracted from 298 * the time difference and only the remaining part is passed to ntp. 299 */ 300 static unsigned long long adjust_time(unsigned long long old, 301 unsigned long long clock, 302 unsigned long long delay) 303 { 304 unsigned long long delta, ticks; 305 struct timex adjust; 306 307 if (clock > old) { 308 /* It is later than we thought. */ 309 delta = ticks = clock - old; 310 delta = ticks = (delta < delay) ? 0 : delta - delay; 311 delta -= do_div(ticks, CLK_TICKS_PER_JIFFY); 312 adjust.offset = ticks * (1000000 / HZ); 313 } else { 314 /* It is earlier than we thought. */ 315 delta = ticks = old - clock; 316 delta -= do_div(ticks, CLK_TICKS_PER_JIFFY); 317 delta = -delta; 318 adjust.offset = -ticks * (1000000 / HZ); 319 } 320 sched_clock_base_cc += delta; 321 if (adjust.offset != 0) { 322 pr_notice("The ETR interface has adjusted the clock " 323 "by %li microseconds\n", adjust.offset); 324 adjust.modes = ADJ_OFFSET_SINGLESHOT; 325 do_adjtimex(&adjust); 326 } 327 return delta; 328 } 329 330 static DEFINE_PER_CPU(atomic_t, clock_sync_word); 331 static DEFINE_MUTEX(clock_sync_mutex); 332 static unsigned long clock_sync_flags; 333 334 #define CLOCK_SYNC_HAS_ETR 0 335 #define CLOCK_SYNC_HAS_STP 1 336 #define CLOCK_SYNC_ETR 2 337 #define CLOCK_SYNC_STP 3 338 339 /* 340 * The synchronous get_clock function. It will write the current clock 341 * value to the clock pointer and return 0 if the clock is in sync with 342 * the external time source. If the clock mode is local it will return 343 * -ENOSYS and -EAGAIN if the clock is not in sync with the external 344 * reference. 345 */ 346 int get_sync_clock(unsigned long long *clock) 347 { 348 atomic_t *sw_ptr; 349 unsigned int sw0, sw1; 350 351 sw_ptr = &get_cpu_var(clock_sync_word); 352 sw0 = atomic_read(sw_ptr); 353 *clock = get_clock(); 354 sw1 = atomic_read(sw_ptr); 355 put_cpu_var(clock_sync_sync); 356 if (sw0 == sw1 && (sw0 & 0x80000000U)) 357 /* Success: time is in sync. */ 358 return 0; 359 if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags) && 360 !test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags)) 361 return -ENOSYS; 362 if (!test_bit(CLOCK_SYNC_ETR, &clock_sync_flags) && 363 !test_bit(CLOCK_SYNC_STP, &clock_sync_flags)) 364 return -EACCES; 365 return -EAGAIN; 366 } 367 EXPORT_SYMBOL(get_sync_clock); 368 369 /* 370 * Make get_sync_clock return -EAGAIN. 371 */ 372 static void disable_sync_clock(void *dummy) 373 { 374 atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word); 375 /* 376 * Clear the in-sync bit 2^31. All get_sync_clock calls will 377 * fail until the sync bit is turned back on. In addition 378 * increase the "sequence" counter to avoid the race of an 379 * etr event and the complete recovery against get_sync_clock. 380 */ 381 atomic_clear_mask(0x80000000, sw_ptr); 382 atomic_inc(sw_ptr); 383 } 384 385 /* 386 * Make get_sync_clock return 0 again. 387 * Needs to be called from a context disabled for preemption. 388 */ 389 static void enable_sync_clock(void) 390 { 391 atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word); 392 atomic_set_mask(0x80000000, sw_ptr); 393 } 394 395 /* 396 * Function to check if the clock is in sync. 397 */ 398 static inline int check_sync_clock(void) 399 { 400 atomic_t *sw_ptr; 401 int rc; 402 403 sw_ptr = &get_cpu_var(clock_sync_word); 404 rc = (atomic_read(sw_ptr) & 0x80000000U) != 0; 405 put_cpu_var(clock_sync_sync); 406 return rc; 407 } 408 409 /* Single threaded workqueue used for etr and stp sync events */ 410 static struct workqueue_struct *time_sync_wq; 411 412 static void __init time_init_wq(void) 413 { 414 if (time_sync_wq) 415 return; 416 time_sync_wq = create_singlethread_workqueue("timesync"); 417 stop_machine_create(); 418 } 419 420 /* 421 * External Time Reference (ETR) code. 422 */ 423 static int etr_port0_online; 424 static int etr_port1_online; 425 static int etr_steai_available; 426 427 static int __init early_parse_etr(char *p) 428 { 429 if (strncmp(p, "off", 3) == 0) 430 etr_port0_online = etr_port1_online = 0; 431 else if (strncmp(p, "port0", 5) == 0) 432 etr_port0_online = 1; 433 else if (strncmp(p, "port1", 5) == 0) 434 etr_port1_online = 1; 435 else if (strncmp(p, "on", 2) == 0) 436 etr_port0_online = etr_port1_online = 1; 437 return 0; 438 } 439 early_param("etr", early_parse_etr); 440 441 enum etr_event { 442 ETR_EVENT_PORT0_CHANGE, 443 ETR_EVENT_PORT1_CHANGE, 444 ETR_EVENT_PORT_ALERT, 445 ETR_EVENT_SYNC_CHECK, 446 ETR_EVENT_SWITCH_LOCAL, 447 ETR_EVENT_UPDATE, 448 }; 449 450 /* 451 * Valid bit combinations of the eacr register are (x = don't care): 452 * e0 e1 dp p0 p1 ea es sl 453 * 0 0 x 0 0 0 0 0 initial, disabled state 454 * 0 0 x 0 1 1 0 0 port 1 online 455 * 0 0 x 1 0 1 0 0 port 0 online 456 * 0 0 x 1 1 1 0 0 both ports online 457 * 0 1 x 0 1 1 0 0 port 1 online and usable, ETR or PPS mode 458 * 0 1 x 0 1 1 0 1 port 1 online, usable and ETR mode 459 * 0 1 x 0 1 1 1 0 port 1 online, usable, PPS mode, in-sync 460 * 0 1 x 0 1 1 1 1 port 1 online, usable, ETR mode, in-sync 461 * 0 1 x 1 1 1 0 0 both ports online, port 1 usable 462 * 0 1 x 1 1 1 1 0 both ports online, port 1 usable, PPS mode, in-sync 463 * 0 1 x 1 1 1 1 1 both ports online, port 1 usable, ETR mode, in-sync 464 * 1 0 x 1 0 1 0 0 port 0 online and usable, ETR or PPS mode 465 * 1 0 x 1 0 1 0 1 port 0 online, usable and ETR mode 466 * 1 0 x 1 0 1 1 0 port 0 online, usable, PPS mode, in-sync 467 * 1 0 x 1 0 1 1 1 port 0 online, usable, ETR mode, in-sync 468 * 1 0 x 1 1 1 0 0 both ports online, port 0 usable 469 * 1 0 x 1 1 1 1 0 both ports online, port 0 usable, PPS mode, in-sync 470 * 1 0 x 1 1 1 1 1 both ports online, port 0 usable, ETR mode, in-sync 471 * 1 1 x 1 1 1 1 0 both ports online & usable, ETR, in-sync 472 * 1 1 x 1 1 1 1 1 both ports online & usable, ETR, in-sync 473 */ 474 static struct etr_eacr etr_eacr; 475 static u64 etr_tolec; /* time of last eacr update */ 476 static struct etr_aib etr_port0; 477 static int etr_port0_uptodate; 478 static struct etr_aib etr_port1; 479 static int etr_port1_uptodate; 480 static unsigned long etr_events; 481 static struct timer_list etr_timer; 482 483 static void etr_timeout(unsigned long dummy); 484 static void etr_work_fn(struct work_struct *work); 485 static DEFINE_MUTEX(etr_work_mutex); 486 static DECLARE_WORK(etr_work, etr_work_fn); 487 488 /* 489 * Reset ETR attachment. 490 */ 491 static void etr_reset(void) 492 { 493 etr_eacr = (struct etr_eacr) { 494 .e0 = 0, .e1 = 0, ._pad0 = 4, .dp = 0, 495 .p0 = 0, .p1 = 0, ._pad1 = 0, .ea = 0, 496 .es = 0, .sl = 0 }; 497 if (etr_setr(&etr_eacr) == 0) { 498 etr_tolec = get_clock(); 499 set_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags); 500 if (etr_port0_online && etr_port1_online) 501 set_bit(CLOCK_SYNC_ETR, &clock_sync_flags); 502 } else if (etr_port0_online || etr_port1_online) { 503 pr_warning("The real or virtual hardware system does " 504 "not provide an ETR interface\n"); 505 etr_port0_online = etr_port1_online = 0; 506 } 507 } 508 509 static int __init etr_init(void) 510 { 511 struct etr_aib aib; 512 513 if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags)) 514 return 0; 515 time_init_wq(); 516 /* Check if this machine has the steai instruction. */ 517 if (etr_steai(&aib, ETR_STEAI_STEPPING_PORT) == 0) 518 etr_steai_available = 1; 519 setup_timer(&etr_timer, etr_timeout, 0UL); 520 if (etr_port0_online) { 521 set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events); 522 queue_work(time_sync_wq, &etr_work); 523 } 524 if (etr_port1_online) { 525 set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events); 526 queue_work(time_sync_wq, &etr_work); 527 } 528 return 0; 529 } 530 531 arch_initcall(etr_init); 532 533 /* 534 * Two sorts of ETR machine checks. The architecture reads: 535 * "When a machine-check niterruption occurs and if a switch-to-local or 536 * ETR-sync-check interrupt request is pending but disabled, this pending 537 * disabled interruption request is indicated and is cleared". 538 * Which means that we can get etr_switch_to_local events from the machine 539 * check handler although the interruption condition is disabled. Lovely.. 540 */ 541 542 /* 543 * Switch to local machine check. This is called when the last usable 544 * ETR port goes inactive. After switch to local the clock is not in sync. 545 */ 546 void etr_switch_to_local(void) 547 { 548 if (!etr_eacr.sl) 549 return; 550 disable_sync_clock(NULL); 551 set_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events); 552 queue_work(time_sync_wq, &etr_work); 553 } 554 555 /* 556 * ETR sync check machine check. This is called when the ETR OTE and the 557 * local clock OTE are farther apart than the ETR sync check tolerance. 558 * After a ETR sync check the clock is not in sync. The machine check 559 * is broadcasted to all cpus at the same time. 560 */ 561 void etr_sync_check(void) 562 { 563 if (!etr_eacr.es) 564 return; 565 disable_sync_clock(NULL); 566 set_bit(ETR_EVENT_SYNC_CHECK, &etr_events); 567 queue_work(time_sync_wq, &etr_work); 568 } 569 570 /* 571 * ETR timing alert. There are two causes: 572 * 1) port state change, check the usability of the port 573 * 2) port alert, one of the ETR-data-validity bits (v1-v2 bits of the 574 * sldr-status word) or ETR-data word 1 (edf1) or ETR-data word 3 (edf3) 575 * or ETR-data word 4 (edf4) has changed. 576 */ 577 static void etr_timing_alert(struct etr_irq_parm *intparm) 578 { 579 if (intparm->pc0) 580 /* ETR port 0 state change. */ 581 set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events); 582 if (intparm->pc1) 583 /* ETR port 1 state change. */ 584 set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events); 585 if (intparm->eai) 586 /* 587 * ETR port alert on either port 0, 1 or both. 588 * Both ports are not up-to-date now. 589 */ 590 set_bit(ETR_EVENT_PORT_ALERT, &etr_events); 591 queue_work(time_sync_wq, &etr_work); 592 } 593 594 static void etr_timeout(unsigned long dummy) 595 { 596 set_bit(ETR_EVENT_UPDATE, &etr_events); 597 queue_work(time_sync_wq, &etr_work); 598 } 599 600 /* 601 * Check if the etr mode is pss. 602 */ 603 static inline int etr_mode_is_pps(struct etr_eacr eacr) 604 { 605 return eacr.es && !eacr.sl; 606 } 607 608 /* 609 * Check if the etr mode is etr. 610 */ 611 static inline int etr_mode_is_etr(struct etr_eacr eacr) 612 { 613 return eacr.es && eacr.sl; 614 } 615 616 /* 617 * Check if the port can be used for TOD synchronization. 618 * For PPS mode the port has to receive OTEs. For ETR mode 619 * the port has to receive OTEs, the ETR stepping bit has to 620 * be zero and the validity bits for data frame 1, 2, and 3 621 * have to be 1. 622 */ 623 static int etr_port_valid(struct etr_aib *aib, int port) 624 { 625 unsigned int psc; 626 627 /* Check that this port is receiving OTEs. */ 628 if (aib->tsp == 0) 629 return 0; 630 631 psc = port ? aib->esw.psc1 : aib->esw.psc0; 632 if (psc == etr_lpsc_pps_mode) 633 return 1; 634 if (psc == etr_lpsc_operational_step) 635 return !aib->esw.y && aib->slsw.v1 && 636 aib->slsw.v2 && aib->slsw.v3; 637 return 0; 638 } 639 640 /* 641 * Check if two ports are on the same network. 642 */ 643 static int etr_compare_network(struct etr_aib *aib1, struct etr_aib *aib2) 644 { 645 // FIXME: any other fields we have to compare? 646 return aib1->edf1.net_id == aib2->edf1.net_id; 647 } 648 649 /* 650 * Wrapper for etr_stei that converts physical port states 651 * to logical port states to be consistent with the output 652 * of stetr (see etr_psc vs. etr_lpsc). 653 */ 654 static void etr_steai_cv(struct etr_aib *aib, unsigned int func) 655 { 656 BUG_ON(etr_steai(aib, func) != 0); 657 /* Convert port state to logical port state. */ 658 if (aib->esw.psc0 == 1) 659 aib->esw.psc0 = 2; 660 else if (aib->esw.psc0 == 0 && aib->esw.p == 0) 661 aib->esw.psc0 = 1; 662 if (aib->esw.psc1 == 1) 663 aib->esw.psc1 = 2; 664 else if (aib->esw.psc1 == 0 && aib->esw.p == 1) 665 aib->esw.psc1 = 1; 666 } 667 668 /* 669 * Check if the aib a2 is still connected to the same attachment as 670 * aib a1, the etv values differ by one and a2 is valid. 671 */ 672 static int etr_aib_follows(struct etr_aib *a1, struct etr_aib *a2, int p) 673 { 674 int state_a1, state_a2; 675 676 /* Paranoia check: e0/e1 should better be the same. */ 677 if (a1->esw.eacr.e0 != a2->esw.eacr.e0 || 678 a1->esw.eacr.e1 != a2->esw.eacr.e1) 679 return 0; 680 681 /* Still connected to the same etr ? */ 682 state_a1 = p ? a1->esw.psc1 : a1->esw.psc0; 683 state_a2 = p ? a2->esw.psc1 : a2->esw.psc0; 684 if (state_a1 == etr_lpsc_operational_step) { 685 if (state_a2 != etr_lpsc_operational_step || 686 a1->edf1.net_id != a2->edf1.net_id || 687 a1->edf1.etr_id != a2->edf1.etr_id || 688 a1->edf1.etr_pn != a2->edf1.etr_pn) 689 return 0; 690 } else if (state_a2 != etr_lpsc_pps_mode) 691 return 0; 692 693 /* The ETV value of a2 needs to be ETV of a1 + 1. */ 694 if (a1->edf2.etv + 1 != a2->edf2.etv) 695 return 0; 696 697 if (!etr_port_valid(a2, p)) 698 return 0; 699 700 return 1; 701 } 702 703 struct clock_sync_data { 704 atomic_t cpus; 705 int in_sync; 706 unsigned long long fixup_cc; 707 int etr_port; 708 struct etr_aib *etr_aib; 709 }; 710 711 static void clock_sync_cpu(struct clock_sync_data *sync) 712 { 713 atomic_dec(&sync->cpus); 714 enable_sync_clock(); 715 /* 716 * This looks like a busy wait loop but it isn't. etr_sync_cpus 717 * is called on all other cpus while the TOD clocks is stopped. 718 * __udelay will stop the cpu on an enabled wait psw until the 719 * TOD is running again. 720 */ 721 while (sync->in_sync == 0) { 722 __udelay(1); 723 /* 724 * A different cpu changes *in_sync. Therefore use 725 * barrier() to force memory access. 726 */ 727 barrier(); 728 } 729 if (sync->in_sync != 1) 730 /* Didn't work. Clear per-cpu in sync bit again. */ 731 disable_sync_clock(NULL); 732 /* 733 * This round of TOD syncing is done. Set the clock comparator 734 * to the next tick and let the processor continue. 735 */ 736 fixup_clock_comparator(sync->fixup_cc); 737 } 738 739 /* 740 * Sync the TOD clock using the port refered to by aibp. This port 741 * has to be enabled and the other port has to be disabled. The 742 * last eacr update has to be more than 1.6 seconds in the past. 743 */ 744 static int etr_sync_clock(void *data) 745 { 746 static int first; 747 unsigned long long clock, old_clock, delay, delta; 748 struct clock_sync_data *etr_sync; 749 struct etr_aib *sync_port, *aib; 750 int port; 751 int rc; 752 753 etr_sync = data; 754 755 if (xchg(&first, 1) == 1) { 756 /* Slave */ 757 clock_sync_cpu(etr_sync); 758 return 0; 759 } 760 761 /* Wait until all other cpus entered the sync function. */ 762 while (atomic_read(&etr_sync->cpus) != 0) 763 cpu_relax(); 764 765 port = etr_sync->etr_port; 766 aib = etr_sync->etr_aib; 767 sync_port = (port == 0) ? &etr_port0 : &etr_port1; 768 enable_sync_clock(); 769 770 /* Set clock to next OTE. */ 771 __ctl_set_bit(14, 21); 772 __ctl_set_bit(0, 29); 773 clock = ((unsigned long long) (aib->edf2.etv + 1)) << 32; 774 old_clock = get_clock(); 775 if (set_clock(clock) == 0) { 776 __udelay(1); /* Wait for the clock to start. */ 777 __ctl_clear_bit(0, 29); 778 __ctl_clear_bit(14, 21); 779 etr_stetr(aib); 780 /* Adjust Linux timing variables. */ 781 delay = (unsigned long long) 782 (aib->edf2.etv - sync_port->edf2.etv) << 32; 783 delta = adjust_time(old_clock, clock, delay); 784 etr_sync->fixup_cc = delta; 785 fixup_clock_comparator(delta); 786 /* Verify that the clock is properly set. */ 787 if (!etr_aib_follows(sync_port, aib, port)) { 788 /* Didn't work. */ 789 disable_sync_clock(NULL); 790 etr_sync->in_sync = -EAGAIN; 791 rc = -EAGAIN; 792 } else { 793 etr_sync->in_sync = 1; 794 rc = 0; 795 } 796 } else { 797 /* Could not set the clock ?!? */ 798 __ctl_clear_bit(0, 29); 799 __ctl_clear_bit(14, 21); 800 disable_sync_clock(NULL); 801 etr_sync->in_sync = -EAGAIN; 802 rc = -EAGAIN; 803 } 804 xchg(&first, 0); 805 return rc; 806 } 807 808 static int etr_sync_clock_stop(struct etr_aib *aib, int port) 809 { 810 struct clock_sync_data etr_sync; 811 struct etr_aib *sync_port; 812 int follows; 813 int rc; 814 815 /* Check if the current aib is adjacent to the sync port aib. */ 816 sync_port = (port == 0) ? &etr_port0 : &etr_port1; 817 follows = etr_aib_follows(sync_port, aib, port); 818 memcpy(sync_port, aib, sizeof(*aib)); 819 if (!follows) 820 return -EAGAIN; 821 memset(&etr_sync, 0, sizeof(etr_sync)); 822 etr_sync.etr_aib = aib; 823 etr_sync.etr_port = port; 824 get_online_cpus(); 825 atomic_set(&etr_sync.cpus, num_online_cpus() - 1); 826 rc = stop_machine(etr_sync_clock, &etr_sync, &cpu_online_map); 827 put_online_cpus(); 828 return rc; 829 } 830 831 /* 832 * Handle the immediate effects of the different events. 833 * The port change event is used for online/offline changes. 834 */ 835 static struct etr_eacr etr_handle_events(struct etr_eacr eacr) 836 { 837 if (test_and_clear_bit(ETR_EVENT_SYNC_CHECK, &etr_events)) 838 eacr.es = 0; 839 if (test_and_clear_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events)) 840 eacr.es = eacr.sl = 0; 841 if (test_and_clear_bit(ETR_EVENT_PORT_ALERT, &etr_events)) 842 etr_port0_uptodate = etr_port1_uptodate = 0; 843 844 if (test_and_clear_bit(ETR_EVENT_PORT0_CHANGE, &etr_events)) { 845 if (eacr.e0) 846 /* 847 * Port change of an enabled port. We have to 848 * assume that this can have caused an stepping 849 * port switch. 850 */ 851 etr_tolec = get_clock(); 852 eacr.p0 = etr_port0_online; 853 if (!eacr.p0) 854 eacr.e0 = 0; 855 etr_port0_uptodate = 0; 856 } 857 if (test_and_clear_bit(ETR_EVENT_PORT1_CHANGE, &etr_events)) { 858 if (eacr.e1) 859 /* 860 * Port change of an enabled port. We have to 861 * assume that this can have caused an stepping 862 * port switch. 863 */ 864 etr_tolec = get_clock(); 865 eacr.p1 = etr_port1_online; 866 if (!eacr.p1) 867 eacr.e1 = 0; 868 etr_port1_uptodate = 0; 869 } 870 clear_bit(ETR_EVENT_UPDATE, &etr_events); 871 return eacr; 872 } 873 874 /* 875 * Set up a timer that expires after the etr_tolec + 1.6 seconds if 876 * one of the ports needs an update. 877 */ 878 static void etr_set_tolec_timeout(unsigned long long now) 879 { 880 unsigned long micros; 881 882 if ((!etr_eacr.p0 || etr_port0_uptodate) && 883 (!etr_eacr.p1 || etr_port1_uptodate)) 884 return; 885 micros = (now > etr_tolec) ? ((now - etr_tolec) >> 12) : 0; 886 micros = (micros > 1600000) ? 0 : 1600000 - micros; 887 mod_timer(&etr_timer, jiffies + (micros * HZ) / 1000000 + 1); 888 } 889 890 /* 891 * Set up a time that expires after 1/2 second. 892 */ 893 static void etr_set_sync_timeout(void) 894 { 895 mod_timer(&etr_timer, jiffies + HZ/2); 896 } 897 898 /* 899 * Update the aib information for one or both ports. 900 */ 901 static struct etr_eacr etr_handle_update(struct etr_aib *aib, 902 struct etr_eacr eacr) 903 { 904 /* With both ports disabled the aib information is useless. */ 905 if (!eacr.e0 && !eacr.e1) 906 return eacr; 907 908 /* Update port0 or port1 with aib stored in etr_work_fn. */ 909 if (aib->esw.q == 0) { 910 /* Information for port 0 stored. */ 911 if (eacr.p0 && !etr_port0_uptodate) { 912 etr_port0 = *aib; 913 if (etr_port0_online) 914 etr_port0_uptodate = 1; 915 } 916 } else { 917 /* Information for port 1 stored. */ 918 if (eacr.p1 && !etr_port1_uptodate) { 919 etr_port1 = *aib; 920 if (etr_port0_online) 921 etr_port1_uptodate = 1; 922 } 923 } 924 925 /* 926 * Do not try to get the alternate port aib if the clock 927 * is not in sync yet. 928 */ 929 if (!check_sync_clock()) 930 return eacr; 931 932 /* 933 * If steai is available we can get the information about 934 * the other port immediately. If only stetr is available the 935 * data-port bit toggle has to be used. 936 */ 937 if (etr_steai_available) { 938 if (eacr.p0 && !etr_port0_uptodate) { 939 etr_steai_cv(&etr_port0, ETR_STEAI_PORT_0); 940 etr_port0_uptodate = 1; 941 } 942 if (eacr.p1 && !etr_port1_uptodate) { 943 etr_steai_cv(&etr_port1, ETR_STEAI_PORT_1); 944 etr_port1_uptodate = 1; 945 } 946 } else { 947 /* 948 * One port was updated above, if the other 949 * port is not uptodate toggle dp bit. 950 */ 951 if ((eacr.p0 && !etr_port0_uptodate) || 952 (eacr.p1 && !etr_port1_uptodate)) 953 eacr.dp ^= 1; 954 else 955 eacr.dp = 0; 956 } 957 return eacr; 958 } 959 960 /* 961 * Write new etr control register if it differs from the current one. 962 * Return 1 if etr_tolec has been updated as well. 963 */ 964 static void etr_update_eacr(struct etr_eacr eacr) 965 { 966 int dp_changed; 967 968 if (memcmp(&etr_eacr, &eacr, sizeof(eacr)) == 0) 969 /* No change, return. */ 970 return; 971 /* 972 * The disable of an active port of the change of the data port 973 * bit can/will cause a change in the data port. 974 */ 975 dp_changed = etr_eacr.e0 > eacr.e0 || etr_eacr.e1 > eacr.e1 || 976 (etr_eacr.dp ^ eacr.dp) != 0; 977 etr_eacr = eacr; 978 etr_setr(&etr_eacr); 979 if (dp_changed) 980 etr_tolec = get_clock(); 981 } 982 983 /* 984 * ETR work. In this function you'll find the main logic. In 985 * particular this is the only function that calls etr_update_eacr(), 986 * it "controls" the etr control register. 987 */ 988 static void etr_work_fn(struct work_struct *work) 989 { 990 unsigned long long now; 991 struct etr_eacr eacr; 992 struct etr_aib aib; 993 int sync_port; 994 995 /* prevent multiple execution. */ 996 mutex_lock(&etr_work_mutex); 997 998 /* Create working copy of etr_eacr. */ 999 eacr = etr_eacr; 1000 1001 /* Check for the different events and their immediate effects. */ 1002 eacr = etr_handle_events(eacr); 1003 1004 /* Check if ETR is supposed to be active. */ 1005 eacr.ea = eacr.p0 || eacr.p1; 1006 if (!eacr.ea) { 1007 /* Both ports offline. Reset everything. */ 1008 eacr.dp = eacr.es = eacr.sl = 0; 1009 on_each_cpu(disable_sync_clock, NULL, 1); 1010 del_timer_sync(&etr_timer); 1011 etr_update_eacr(eacr); 1012 goto out_unlock; 1013 } 1014 1015 /* Store aib to get the current ETR status word. */ 1016 BUG_ON(etr_stetr(&aib) != 0); 1017 etr_port0.esw = etr_port1.esw = aib.esw; /* Copy status word. */ 1018 now = get_clock(); 1019 1020 /* 1021 * Update the port information if the last stepping port change 1022 * or data port change is older than 1.6 seconds. 1023 */ 1024 if (now >= etr_tolec + (1600000 << 12)) 1025 eacr = etr_handle_update(&aib, eacr); 1026 1027 /* 1028 * Select ports to enable. The prefered synchronization mode is PPS. 1029 * If a port can be enabled depends on a number of things: 1030 * 1) The port needs to be online and uptodate. A port is not 1031 * disabled just because it is not uptodate, but it is only 1032 * enabled if it is uptodate. 1033 * 2) The port needs to have the same mode (pps / etr). 1034 * 3) The port needs to be usable -> etr_port_valid() == 1 1035 * 4) To enable the second port the clock needs to be in sync. 1036 * 5) If both ports are useable and are ETR ports, the network id 1037 * has to be the same. 1038 * The eacr.sl bit is used to indicate etr mode vs. pps mode. 1039 */ 1040 if (eacr.p0 && aib.esw.psc0 == etr_lpsc_pps_mode) { 1041 eacr.sl = 0; 1042 eacr.e0 = 1; 1043 if (!etr_mode_is_pps(etr_eacr)) 1044 eacr.es = 0; 1045 if (!eacr.es || !eacr.p1 || aib.esw.psc1 != etr_lpsc_pps_mode) 1046 eacr.e1 = 0; 1047 // FIXME: uptodate checks ? 1048 else if (etr_port0_uptodate && etr_port1_uptodate) 1049 eacr.e1 = 1; 1050 sync_port = (etr_port0_uptodate && 1051 etr_port_valid(&etr_port0, 0)) ? 0 : -1; 1052 } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_pps_mode) { 1053 eacr.sl = 0; 1054 eacr.e0 = 0; 1055 eacr.e1 = 1; 1056 if (!etr_mode_is_pps(etr_eacr)) 1057 eacr.es = 0; 1058 sync_port = (etr_port1_uptodate && 1059 etr_port_valid(&etr_port1, 1)) ? 1 : -1; 1060 } else if (eacr.p0 && aib.esw.psc0 == etr_lpsc_operational_step) { 1061 eacr.sl = 1; 1062 eacr.e0 = 1; 1063 if (!etr_mode_is_etr(etr_eacr)) 1064 eacr.es = 0; 1065 if (!eacr.es || !eacr.p1 || 1066 aib.esw.psc1 != etr_lpsc_operational_alt) 1067 eacr.e1 = 0; 1068 else if (etr_port0_uptodate && etr_port1_uptodate && 1069 etr_compare_network(&etr_port0, &etr_port1)) 1070 eacr.e1 = 1; 1071 sync_port = (etr_port0_uptodate && 1072 etr_port_valid(&etr_port0, 0)) ? 0 : -1; 1073 } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_operational_step) { 1074 eacr.sl = 1; 1075 eacr.e0 = 0; 1076 eacr.e1 = 1; 1077 if (!etr_mode_is_etr(etr_eacr)) 1078 eacr.es = 0; 1079 sync_port = (etr_port1_uptodate && 1080 etr_port_valid(&etr_port1, 1)) ? 1 : -1; 1081 } else { 1082 /* Both ports not usable. */ 1083 eacr.es = eacr.sl = 0; 1084 sync_port = -1; 1085 } 1086 1087 /* 1088 * If the clock is in sync just update the eacr and return. 1089 * If there is no valid sync port wait for a port update. 1090 */ 1091 if (check_sync_clock() || sync_port < 0) { 1092 etr_update_eacr(eacr); 1093 etr_set_tolec_timeout(now); 1094 goto out_unlock; 1095 } 1096 1097 /* 1098 * Prepare control register for clock syncing 1099 * (reset data port bit, set sync check control. 1100 */ 1101 eacr.dp = 0; 1102 eacr.es = 1; 1103 1104 /* 1105 * Update eacr and try to synchronize the clock. If the update 1106 * of eacr caused a stepping port switch (or if we have to 1107 * assume that a stepping port switch has occured) or the 1108 * clock syncing failed, reset the sync check control bit 1109 * and set up a timer to try again after 0.5 seconds 1110 */ 1111 etr_update_eacr(eacr); 1112 if (now < etr_tolec + (1600000 << 12) || 1113 etr_sync_clock_stop(&aib, sync_port) != 0) { 1114 /* Sync failed. Try again in 1/2 second. */ 1115 eacr.es = 0; 1116 etr_update_eacr(eacr); 1117 etr_set_sync_timeout(); 1118 } else 1119 etr_set_tolec_timeout(now); 1120 out_unlock: 1121 mutex_unlock(&etr_work_mutex); 1122 } 1123 1124 /* 1125 * Sysfs interface functions 1126 */ 1127 static struct sysdev_class etr_sysclass = { 1128 .name = "etr", 1129 }; 1130 1131 static struct sys_device etr_port0_dev = { 1132 .id = 0, 1133 .cls = &etr_sysclass, 1134 }; 1135 1136 static struct sys_device etr_port1_dev = { 1137 .id = 1, 1138 .cls = &etr_sysclass, 1139 }; 1140 1141 /* 1142 * ETR class attributes 1143 */ 1144 static ssize_t etr_stepping_port_show(struct sysdev_class *class, char *buf) 1145 { 1146 return sprintf(buf, "%i\n", etr_port0.esw.p); 1147 } 1148 1149 static SYSDEV_CLASS_ATTR(stepping_port, 0400, etr_stepping_port_show, NULL); 1150 1151 static ssize_t etr_stepping_mode_show(struct sysdev_class *class, char *buf) 1152 { 1153 char *mode_str; 1154 1155 if (etr_mode_is_pps(etr_eacr)) 1156 mode_str = "pps"; 1157 else if (etr_mode_is_etr(etr_eacr)) 1158 mode_str = "etr"; 1159 else 1160 mode_str = "local"; 1161 return sprintf(buf, "%s\n", mode_str); 1162 } 1163 1164 static SYSDEV_CLASS_ATTR(stepping_mode, 0400, etr_stepping_mode_show, NULL); 1165 1166 /* 1167 * ETR port attributes 1168 */ 1169 static inline struct etr_aib *etr_aib_from_dev(struct sys_device *dev) 1170 { 1171 if (dev == &etr_port0_dev) 1172 return etr_port0_online ? &etr_port0 : NULL; 1173 else 1174 return etr_port1_online ? &etr_port1 : NULL; 1175 } 1176 1177 static ssize_t etr_online_show(struct sys_device *dev, 1178 struct sysdev_attribute *attr, 1179 char *buf) 1180 { 1181 unsigned int online; 1182 1183 online = (dev == &etr_port0_dev) ? etr_port0_online : etr_port1_online; 1184 return sprintf(buf, "%i\n", online); 1185 } 1186 1187 static ssize_t etr_online_store(struct sys_device *dev, 1188 struct sysdev_attribute *attr, 1189 const char *buf, size_t count) 1190 { 1191 unsigned int value; 1192 1193 value = simple_strtoul(buf, NULL, 0); 1194 if (value != 0 && value != 1) 1195 return -EINVAL; 1196 if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags)) 1197 return -EOPNOTSUPP; 1198 mutex_lock(&clock_sync_mutex); 1199 if (dev == &etr_port0_dev) { 1200 if (etr_port0_online == value) 1201 goto out; /* Nothing to do. */ 1202 etr_port0_online = value; 1203 if (etr_port0_online && etr_port1_online) 1204 set_bit(CLOCK_SYNC_ETR, &clock_sync_flags); 1205 else 1206 clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags); 1207 set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events); 1208 queue_work(time_sync_wq, &etr_work); 1209 } else { 1210 if (etr_port1_online == value) 1211 goto out; /* Nothing to do. */ 1212 etr_port1_online = value; 1213 if (etr_port0_online && etr_port1_online) 1214 set_bit(CLOCK_SYNC_ETR, &clock_sync_flags); 1215 else 1216 clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags); 1217 set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events); 1218 queue_work(time_sync_wq, &etr_work); 1219 } 1220 out: 1221 mutex_unlock(&clock_sync_mutex); 1222 return count; 1223 } 1224 1225 static SYSDEV_ATTR(online, 0600, etr_online_show, etr_online_store); 1226 1227 static ssize_t etr_stepping_control_show(struct sys_device *dev, 1228 struct sysdev_attribute *attr, 1229 char *buf) 1230 { 1231 return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ? 1232 etr_eacr.e0 : etr_eacr.e1); 1233 } 1234 1235 static SYSDEV_ATTR(stepping_control, 0400, etr_stepping_control_show, NULL); 1236 1237 static ssize_t etr_mode_code_show(struct sys_device *dev, 1238 struct sysdev_attribute *attr, char *buf) 1239 { 1240 if (!etr_port0_online && !etr_port1_online) 1241 /* Status word is not uptodate if both ports are offline. */ 1242 return -ENODATA; 1243 return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ? 1244 etr_port0.esw.psc0 : etr_port0.esw.psc1); 1245 } 1246 1247 static SYSDEV_ATTR(state_code, 0400, etr_mode_code_show, NULL); 1248 1249 static ssize_t etr_untuned_show(struct sys_device *dev, 1250 struct sysdev_attribute *attr, char *buf) 1251 { 1252 struct etr_aib *aib = etr_aib_from_dev(dev); 1253 1254 if (!aib || !aib->slsw.v1) 1255 return -ENODATA; 1256 return sprintf(buf, "%i\n", aib->edf1.u); 1257 } 1258 1259 static SYSDEV_ATTR(untuned, 0400, etr_untuned_show, NULL); 1260 1261 static ssize_t etr_network_id_show(struct sys_device *dev, 1262 struct sysdev_attribute *attr, char *buf) 1263 { 1264 struct etr_aib *aib = etr_aib_from_dev(dev); 1265 1266 if (!aib || !aib->slsw.v1) 1267 return -ENODATA; 1268 return sprintf(buf, "%i\n", aib->edf1.net_id); 1269 } 1270 1271 static SYSDEV_ATTR(network, 0400, etr_network_id_show, NULL); 1272 1273 static ssize_t etr_id_show(struct sys_device *dev, 1274 struct sysdev_attribute *attr, char *buf) 1275 { 1276 struct etr_aib *aib = etr_aib_from_dev(dev); 1277 1278 if (!aib || !aib->slsw.v1) 1279 return -ENODATA; 1280 return sprintf(buf, "%i\n", aib->edf1.etr_id); 1281 } 1282 1283 static SYSDEV_ATTR(id, 0400, etr_id_show, NULL); 1284 1285 static ssize_t etr_port_number_show(struct sys_device *dev, 1286 struct sysdev_attribute *attr, char *buf) 1287 { 1288 struct etr_aib *aib = etr_aib_from_dev(dev); 1289 1290 if (!aib || !aib->slsw.v1) 1291 return -ENODATA; 1292 return sprintf(buf, "%i\n", aib->edf1.etr_pn); 1293 } 1294 1295 static SYSDEV_ATTR(port, 0400, etr_port_number_show, NULL); 1296 1297 static ssize_t etr_coupled_show(struct sys_device *dev, 1298 struct sysdev_attribute *attr, char *buf) 1299 { 1300 struct etr_aib *aib = etr_aib_from_dev(dev); 1301 1302 if (!aib || !aib->slsw.v3) 1303 return -ENODATA; 1304 return sprintf(buf, "%i\n", aib->edf3.c); 1305 } 1306 1307 static SYSDEV_ATTR(coupled, 0400, etr_coupled_show, NULL); 1308 1309 static ssize_t etr_local_time_show(struct sys_device *dev, 1310 struct sysdev_attribute *attr, char *buf) 1311 { 1312 struct etr_aib *aib = etr_aib_from_dev(dev); 1313 1314 if (!aib || !aib->slsw.v3) 1315 return -ENODATA; 1316 return sprintf(buf, "%i\n", aib->edf3.blto); 1317 } 1318 1319 static SYSDEV_ATTR(local_time, 0400, etr_local_time_show, NULL); 1320 1321 static ssize_t etr_utc_offset_show(struct sys_device *dev, 1322 struct sysdev_attribute *attr, char *buf) 1323 { 1324 struct etr_aib *aib = etr_aib_from_dev(dev); 1325 1326 if (!aib || !aib->slsw.v3) 1327 return -ENODATA; 1328 return sprintf(buf, "%i\n", aib->edf3.buo); 1329 } 1330 1331 static SYSDEV_ATTR(utc_offset, 0400, etr_utc_offset_show, NULL); 1332 1333 static struct sysdev_attribute *etr_port_attributes[] = { 1334 &attr_online, 1335 &attr_stepping_control, 1336 &attr_state_code, 1337 &attr_untuned, 1338 &attr_network, 1339 &attr_id, 1340 &attr_port, 1341 &attr_coupled, 1342 &attr_local_time, 1343 &attr_utc_offset, 1344 NULL 1345 }; 1346 1347 static int __init etr_register_port(struct sys_device *dev) 1348 { 1349 struct sysdev_attribute **attr; 1350 int rc; 1351 1352 rc = sysdev_register(dev); 1353 if (rc) 1354 goto out; 1355 for (attr = etr_port_attributes; *attr; attr++) { 1356 rc = sysdev_create_file(dev, *attr); 1357 if (rc) 1358 goto out_unreg; 1359 } 1360 return 0; 1361 out_unreg: 1362 for (; attr >= etr_port_attributes; attr--) 1363 sysdev_remove_file(dev, *attr); 1364 sysdev_unregister(dev); 1365 out: 1366 return rc; 1367 } 1368 1369 static void __init etr_unregister_port(struct sys_device *dev) 1370 { 1371 struct sysdev_attribute **attr; 1372 1373 for (attr = etr_port_attributes; *attr; attr++) 1374 sysdev_remove_file(dev, *attr); 1375 sysdev_unregister(dev); 1376 } 1377 1378 static int __init etr_init_sysfs(void) 1379 { 1380 int rc; 1381 1382 rc = sysdev_class_register(&etr_sysclass); 1383 if (rc) 1384 goto out; 1385 rc = sysdev_class_create_file(&etr_sysclass, &attr_stepping_port); 1386 if (rc) 1387 goto out_unreg_class; 1388 rc = sysdev_class_create_file(&etr_sysclass, &attr_stepping_mode); 1389 if (rc) 1390 goto out_remove_stepping_port; 1391 rc = etr_register_port(&etr_port0_dev); 1392 if (rc) 1393 goto out_remove_stepping_mode; 1394 rc = etr_register_port(&etr_port1_dev); 1395 if (rc) 1396 goto out_remove_port0; 1397 return 0; 1398 1399 out_remove_port0: 1400 etr_unregister_port(&etr_port0_dev); 1401 out_remove_stepping_mode: 1402 sysdev_class_remove_file(&etr_sysclass, &attr_stepping_mode); 1403 out_remove_stepping_port: 1404 sysdev_class_remove_file(&etr_sysclass, &attr_stepping_port); 1405 out_unreg_class: 1406 sysdev_class_unregister(&etr_sysclass); 1407 out: 1408 return rc; 1409 } 1410 1411 device_initcall(etr_init_sysfs); 1412 1413 /* 1414 * Server Time Protocol (STP) code. 1415 */ 1416 static int stp_online; 1417 static struct stp_sstpi stp_info; 1418 static void *stp_page; 1419 1420 static void stp_work_fn(struct work_struct *work); 1421 static DEFINE_MUTEX(stp_work_mutex); 1422 static DECLARE_WORK(stp_work, stp_work_fn); 1423 static struct timer_list stp_timer; 1424 1425 static int __init early_parse_stp(char *p) 1426 { 1427 if (strncmp(p, "off", 3) == 0) 1428 stp_online = 0; 1429 else if (strncmp(p, "on", 2) == 0) 1430 stp_online = 1; 1431 return 0; 1432 } 1433 early_param("stp", early_parse_stp); 1434 1435 /* 1436 * Reset STP attachment. 1437 */ 1438 static void __init stp_reset(void) 1439 { 1440 int rc; 1441 1442 stp_page = (void *) get_zeroed_page(GFP_ATOMIC); 1443 rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000); 1444 if (rc == 0) 1445 set_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags); 1446 else if (stp_online) { 1447 pr_warning("The real or virtual hardware system does " 1448 "not provide an STP interface\n"); 1449 free_page((unsigned long) stp_page); 1450 stp_page = NULL; 1451 stp_online = 0; 1452 } 1453 } 1454 1455 static void stp_timeout(unsigned long dummy) 1456 { 1457 queue_work(time_sync_wq, &stp_work); 1458 } 1459 1460 static int __init stp_init(void) 1461 { 1462 if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags)) 1463 return 0; 1464 setup_timer(&stp_timer, stp_timeout, 0UL); 1465 time_init_wq(); 1466 if (!stp_online) 1467 return 0; 1468 queue_work(time_sync_wq, &stp_work); 1469 return 0; 1470 } 1471 1472 arch_initcall(stp_init); 1473 1474 /* 1475 * STP timing alert. There are three causes: 1476 * 1) timing status change 1477 * 2) link availability change 1478 * 3) time control parameter change 1479 * In all three cases we are only interested in the clock source state. 1480 * If a STP clock source is now available use it. 1481 */ 1482 static void stp_timing_alert(struct stp_irq_parm *intparm) 1483 { 1484 if (intparm->tsc || intparm->lac || intparm->tcpc) 1485 queue_work(time_sync_wq, &stp_work); 1486 } 1487 1488 /* 1489 * STP sync check machine check. This is called when the timing state 1490 * changes from the synchronized state to the unsynchronized state. 1491 * After a STP sync check the clock is not in sync. The machine check 1492 * is broadcasted to all cpus at the same time. 1493 */ 1494 void stp_sync_check(void) 1495 { 1496 disable_sync_clock(NULL); 1497 queue_work(time_sync_wq, &stp_work); 1498 } 1499 1500 /* 1501 * STP island condition machine check. This is called when an attached 1502 * server attempts to communicate over an STP link and the servers 1503 * have matching CTN ids and have a valid stratum-1 configuration 1504 * but the configurations do not match. 1505 */ 1506 void stp_island_check(void) 1507 { 1508 disable_sync_clock(NULL); 1509 queue_work(time_sync_wq, &stp_work); 1510 } 1511 1512 1513 static int stp_sync_clock(void *data) 1514 { 1515 static int first; 1516 unsigned long long old_clock, delta; 1517 struct clock_sync_data *stp_sync; 1518 int rc; 1519 1520 stp_sync = data; 1521 1522 if (xchg(&first, 1) == 1) { 1523 /* Slave */ 1524 clock_sync_cpu(stp_sync); 1525 return 0; 1526 } 1527 1528 /* Wait until all other cpus entered the sync function. */ 1529 while (atomic_read(&stp_sync->cpus) != 0) 1530 cpu_relax(); 1531 1532 enable_sync_clock(); 1533 1534 rc = 0; 1535 if (stp_info.todoff[0] || stp_info.todoff[1] || 1536 stp_info.todoff[2] || stp_info.todoff[3] || 1537 stp_info.tmd != 2) { 1538 old_clock = get_clock(); 1539 rc = chsc_sstpc(stp_page, STP_OP_SYNC, 0); 1540 if (rc == 0) { 1541 delta = adjust_time(old_clock, get_clock(), 0); 1542 fixup_clock_comparator(delta); 1543 rc = chsc_sstpi(stp_page, &stp_info, 1544 sizeof(struct stp_sstpi)); 1545 if (rc == 0 && stp_info.tmd != 2) 1546 rc = -EAGAIN; 1547 } 1548 } 1549 if (rc) { 1550 disable_sync_clock(NULL); 1551 stp_sync->in_sync = -EAGAIN; 1552 } else 1553 stp_sync->in_sync = 1; 1554 xchg(&first, 0); 1555 return 0; 1556 } 1557 1558 /* 1559 * STP work. Check for the STP state and take over the clock 1560 * synchronization if the STP clock source is usable. 1561 */ 1562 static void stp_work_fn(struct work_struct *work) 1563 { 1564 struct clock_sync_data stp_sync; 1565 int rc; 1566 1567 /* prevent multiple execution. */ 1568 mutex_lock(&stp_work_mutex); 1569 1570 if (!stp_online) { 1571 chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000); 1572 del_timer_sync(&stp_timer); 1573 goto out_unlock; 1574 } 1575 1576 rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0xb0e0); 1577 if (rc) 1578 goto out_unlock; 1579 1580 rc = chsc_sstpi(stp_page, &stp_info, sizeof(struct stp_sstpi)); 1581 if (rc || stp_info.c == 0) 1582 goto out_unlock; 1583 1584 /* Skip synchronization if the clock is already in sync. */ 1585 if (check_sync_clock()) 1586 goto out_unlock; 1587 1588 memset(&stp_sync, 0, sizeof(stp_sync)); 1589 get_online_cpus(); 1590 atomic_set(&stp_sync.cpus, num_online_cpus() - 1); 1591 stop_machine(stp_sync_clock, &stp_sync, &cpu_online_map); 1592 put_online_cpus(); 1593 1594 if (!check_sync_clock()) 1595 /* 1596 * There is a usable clock but the synchonization failed. 1597 * Retry after a second. 1598 */ 1599 mod_timer(&stp_timer, jiffies + HZ); 1600 1601 out_unlock: 1602 mutex_unlock(&stp_work_mutex); 1603 } 1604 1605 /* 1606 * STP class sysfs interface functions 1607 */ 1608 static struct sysdev_class stp_sysclass = { 1609 .name = "stp", 1610 }; 1611 1612 static ssize_t stp_ctn_id_show(struct sysdev_class *class, char *buf) 1613 { 1614 if (!stp_online) 1615 return -ENODATA; 1616 return sprintf(buf, "%016llx\n", 1617 *(unsigned long long *) stp_info.ctnid); 1618 } 1619 1620 static SYSDEV_CLASS_ATTR(ctn_id, 0400, stp_ctn_id_show, NULL); 1621 1622 static ssize_t stp_ctn_type_show(struct sysdev_class *class, char *buf) 1623 { 1624 if (!stp_online) 1625 return -ENODATA; 1626 return sprintf(buf, "%i\n", stp_info.ctn); 1627 } 1628 1629 static SYSDEV_CLASS_ATTR(ctn_type, 0400, stp_ctn_type_show, NULL); 1630 1631 static ssize_t stp_dst_offset_show(struct sysdev_class *class, char *buf) 1632 { 1633 if (!stp_online || !(stp_info.vbits & 0x2000)) 1634 return -ENODATA; 1635 return sprintf(buf, "%i\n", (int)(s16) stp_info.dsto); 1636 } 1637 1638 static SYSDEV_CLASS_ATTR(dst_offset, 0400, stp_dst_offset_show, NULL); 1639 1640 static ssize_t stp_leap_seconds_show(struct sysdev_class *class, char *buf) 1641 { 1642 if (!stp_online || !(stp_info.vbits & 0x8000)) 1643 return -ENODATA; 1644 return sprintf(buf, "%i\n", (int)(s16) stp_info.leaps); 1645 } 1646 1647 static SYSDEV_CLASS_ATTR(leap_seconds, 0400, stp_leap_seconds_show, NULL); 1648 1649 static ssize_t stp_stratum_show(struct sysdev_class *class, char *buf) 1650 { 1651 if (!stp_online) 1652 return -ENODATA; 1653 return sprintf(buf, "%i\n", (int)(s16) stp_info.stratum); 1654 } 1655 1656 static SYSDEV_CLASS_ATTR(stratum, 0400, stp_stratum_show, NULL); 1657 1658 static ssize_t stp_time_offset_show(struct sysdev_class *class, char *buf) 1659 { 1660 if (!stp_online || !(stp_info.vbits & 0x0800)) 1661 return -ENODATA; 1662 return sprintf(buf, "%i\n", (int) stp_info.tto); 1663 } 1664 1665 static SYSDEV_CLASS_ATTR(time_offset, 0400, stp_time_offset_show, NULL); 1666 1667 static ssize_t stp_time_zone_offset_show(struct sysdev_class *class, char *buf) 1668 { 1669 if (!stp_online || !(stp_info.vbits & 0x4000)) 1670 return -ENODATA; 1671 return sprintf(buf, "%i\n", (int)(s16) stp_info.tzo); 1672 } 1673 1674 static SYSDEV_CLASS_ATTR(time_zone_offset, 0400, 1675 stp_time_zone_offset_show, NULL); 1676 1677 static ssize_t stp_timing_mode_show(struct sysdev_class *class, char *buf) 1678 { 1679 if (!stp_online) 1680 return -ENODATA; 1681 return sprintf(buf, "%i\n", stp_info.tmd); 1682 } 1683 1684 static SYSDEV_CLASS_ATTR(timing_mode, 0400, stp_timing_mode_show, NULL); 1685 1686 static ssize_t stp_timing_state_show(struct sysdev_class *class, char *buf) 1687 { 1688 if (!stp_online) 1689 return -ENODATA; 1690 return sprintf(buf, "%i\n", stp_info.tst); 1691 } 1692 1693 static SYSDEV_CLASS_ATTR(timing_state, 0400, stp_timing_state_show, NULL); 1694 1695 static ssize_t stp_online_show(struct sysdev_class *class, char *buf) 1696 { 1697 return sprintf(buf, "%i\n", stp_online); 1698 } 1699 1700 static ssize_t stp_online_store(struct sysdev_class *class, 1701 const char *buf, size_t count) 1702 { 1703 unsigned int value; 1704 1705 value = simple_strtoul(buf, NULL, 0); 1706 if (value != 0 && value != 1) 1707 return -EINVAL; 1708 if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags)) 1709 return -EOPNOTSUPP; 1710 mutex_lock(&clock_sync_mutex); 1711 stp_online = value; 1712 if (stp_online) 1713 set_bit(CLOCK_SYNC_STP, &clock_sync_flags); 1714 else 1715 clear_bit(CLOCK_SYNC_STP, &clock_sync_flags); 1716 queue_work(time_sync_wq, &stp_work); 1717 mutex_unlock(&clock_sync_mutex); 1718 return count; 1719 } 1720 1721 /* 1722 * Can't use SYSDEV_CLASS_ATTR because the attribute should be named 1723 * stp/online but attr_online already exists in this file .. 1724 */ 1725 static struct sysdev_class_attribute attr_stp_online = { 1726 .attr = { .name = "online", .mode = 0600 }, 1727 .show = stp_online_show, 1728 .store = stp_online_store, 1729 }; 1730 1731 static struct sysdev_class_attribute *stp_attributes[] = { 1732 &attr_ctn_id, 1733 &attr_ctn_type, 1734 &attr_dst_offset, 1735 &attr_leap_seconds, 1736 &attr_stp_online, 1737 &attr_stratum, 1738 &attr_time_offset, 1739 &attr_time_zone_offset, 1740 &attr_timing_mode, 1741 &attr_timing_state, 1742 NULL 1743 }; 1744 1745 static int __init stp_init_sysfs(void) 1746 { 1747 struct sysdev_class_attribute **attr; 1748 int rc; 1749 1750 rc = sysdev_class_register(&stp_sysclass); 1751 if (rc) 1752 goto out; 1753 for (attr = stp_attributes; *attr; attr++) { 1754 rc = sysdev_class_create_file(&stp_sysclass, *attr); 1755 if (rc) 1756 goto out_unreg; 1757 } 1758 return 0; 1759 out_unreg: 1760 for (; attr >= stp_attributes; attr--) 1761 sysdev_class_remove_file(&stp_sysclass, *attr); 1762 sysdev_class_unregister(&stp_sysclass); 1763 out: 1764 return rc; 1765 } 1766 1767 device_initcall(stp_init_sysfs); 1768