xref: /linux/arch/s390/kernel/time.c (revision 90ab5ee94171b3e28de6bb42ee30b527014e0be7)
1 /*
2  *  arch/s390/kernel/time.c
3  *    Time of day based timer functions.
4  *
5  *  S390 version
6  *    Copyright IBM Corp. 1999, 2008
7  *    Author(s): Hartmut Penner (hp@de.ibm.com),
8  *               Martin Schwidefsky (schwidefsky@de.ibm.com),
9  *               Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
10  *
11  *  Derived from "arch/i386/kernel/time.c"
12  *    Copyright (C) 1991, 1992, 1995  Linus Torvalds
13  */
14 
15 #define KMSG_COMPONENT "time"
16 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
17 
18 #include <linux/kernel_stat.h>
19 #include <linux/errno.h>
20 #include <linux/module.h>
21 #include <linux/sched.h>
22 #include <linux/kernel.h>
23 #include <linux/param.h>
24 #include <linux/string.h>
25 #include <linux/mm.h>
26 #include <linux/interrupt.h>
27 #include <linux/cpu.h>
28 #include <linux/stop_machine.h>
29 #include <linux/time.h>
30 #include <linux/device.h>
31 #include <linux/delay.h>
32 #include <linux/init.h>
33 #include <linux/smp.h>
34 #include <linux/types.h>
35 #include <linux/profile.h>
36 #include <linux/timex.h>
37 #include <linux/notifier.h>
38 #include <linux/clocksource.h>
39 #include <linux/clockchips.h>
40 #include <linux/gfp.h>
41 #include <linux/kprobes.h>
42 #include <asm/uaccess.h>
43 #include <asm/delay.h>
44 #include <asm/div64.h>
45 #include <asm/vdso.h>
46 #include <asm/irq.h>
47 #include <asm/irq_regs.h>
48 #include <asm/timer.h>
49 #include <asm/etr.h>
50 #include <asm/cio.h>
51 #include "entry.h"
52 
53 /* change this if you have some constant time drift */
54 #define USECS_PER_JIFFY     ((unsigned long) 1000000/HZ)
55 #define CLK_TICKS_PER_JIFFY ((unsigned long) USECS_PER_JIFFY << 12)
56 
57 u64 sched_clock_base_cc = -1;	/* Force to data section. */
58 EXPORT_SYMBOL_GPL(sched_clock_base_cc);
59 
60 static DEFINE_PER_CPU(struct clock_event_device, comparators);
61 
62 /*
63  * Scheduler clock - returns current time in nanosec units.
64  */
65 unsigned long long notrace __kprobes sched_clock(void)
66 {
67 	return (get_clock_monotonic() * 125) >> 9;
68 }
69 
70 /*
71  * Monotonic_clock - returns # of nanoseconds passed since time_init()
72  */
73 unsigned long long monotonic_clock(void)
74 {
75 	return sched_clock();
76 }
77 EXPORT_SYMBOL(monotonic_clock);
78 
79 void tod_to_timeval(__u64 todval, struct timespec *xt)
80 {
81 	unsigned long long sec;
82 
83 	sec = todval >> 12;
84 	do_div(sec, 1000000);
85 	xt->tv_sec = sec;
86 	todval -= (sec * 1000000) << 12;
87 	xt->tv_nsec = ((todval * 1000) >> 12);
88 }
89 EXPORT_SYMBOL(tod_to_timeval);
90 
91 void clock_comparator_work(void)
92 {
93 	struct clock_event_device *cd;
94 
95 	S390_lowcore.clock_comparator = -1ULL;
96 	set_clock_comparator(S390_lowcore.clock_comparator);
97 	cd = &__get_cpu_var(comparators);
98 	cd->event_handler(cd);
99 }
100 
101 /*
102  * Fixup the clock comparator.
103  */
104 static void fixup_clock_comparator(unsigned long long delta)
105 {
106 	/* If nobody is waiting there's nothing to fix. */
107 	if (S390_lowcore.clock_comparator == -1ULL)
108 		return;
109 	S390_lowcore.clock_comparator += delta;
110 	set_clock_comparator(S390_lowcore.clock_comparator);
111 }
112 
113 static int s390_next_ktime(ktime_t expires,
114 			   struct clock_event_device *evt)
115 {
116 	u64 nsecs;
117 
118 	nsecs = ktime_to_ns(ktime_sub(expires, ktime_get_monotonic_offset()));
119 	do_div(nsecs, 125);
120 	S390_lowcore.clock_comparator = TOD_UNIX_EPOCH + (nsecs << 9);
121 	set_clock_comparator(S390_lowcore.clock_comparator);
122 	return 0;
123 }
124 
125 static void s390_set_mode(enum clock_event_mode mode,
126 			  struct clock_event_device *evt)
127 {
128 }
129 
130 /*
131  * Set up lowcore and control register of the current cpu to
132  * enable TOD clock and clock comparator interrupts.
133  */
134 void init_cpu_timer(void)
135 {
136 	struct clock_event_device *cd;
137 	int cpu;
138 
139 	S390_lowcore.clock_comparator = -1ULL;
140 	set_clock_comparator(S390_lowcore.clock_comparator);
141 
142 	cpu = smp_processor_id();
143 	cd = &per_cpu(comparators, cpu);
144 	cd->name		= "comparator";
145 	cd->features		= CLOCK_EVT_FEAT_ONESHOT |
146 				  CLOCK_EVT_FEAT_KTIME;
147 	cd->mult		= 16777;
148 	cd->shift		= 12;
149 	cd->min_delta_ns	= 1;
150 	cd->max_delta_ns	= LONG_MAX;
151 	cd->rating		= 400;
152 	cd->cpumask		= cpumask_of(cpu);
153 	cd->set_next_ktime	= s390_next_ktime;
154 	cd->set_mode		= s390_set_mode;
155 
156 	clockevents_register_device(cd);
157 
158 	/* Enable clock comparator timer interrupt. */
159 	__ctl_set_bit(0,11);
160 
161 	/* Always allow the timing alert external interrupt. */
162 	__ctl_set_bit(0, 4);
163 }
164 
165 static void clock_comparator_interrupt(unsigned int ext_int_code,
166 				       unsigned int param32,
167 				       unsigned long param64)
168 {
169 	kstat_cpu(smp_processor_id()).irqs[EXTINT_CLK]++;
170 	if (S390_lowcore.clock_comparator == -1ULL)
171 		set_clock_comparator(S390_lowcore.clock_comparator);
172 }
173 
174 static void etr_timing_alert(struct etr_irq_parm *);
175 static void stp_timing_alert(struct stp_irq_parm *);
176 
177 static void timing_alert_interrupt(unsigned int ext_int_code,
178 				   unsigned int param32, unsigned long param64)
179 {
180 	kstat_cpu(smp_processor_id()).irqs[EXTINT_TLA]++;
181 	if (param32 & 0x00c40000)
182 		etr_timing_alert((struct etr_irq_parm *) &param32);
183 	if (param32 & 0x00038000)
184 		stp_timing_alert((struct stp_irq_parm *) &param32);
185 }
186 
187 static void etr_reset(void);
188 static void stp_reset(void);
189 
190 void read_persistent_clock(struct timespec *ts)
191 {
192 	tod_to_timeval(get_clock() - TOD_UNIX_EPOCH, ts);
193 }
194 
195 void read_boot_clock(struct timespec *ts)
196 {
197 	tod_to_timeval(sched_clock_base_cc - TOD_UNIX_EPOCH, ts);
198 }
199 
200 static cycle_t read_tod_clock(struct clocksource *cs)
201 {
202 	return get_clock();
203 }
204 
205 static struct clocksource clocksource_tod = {
206 	.name		= "tod",
207 	.rating		= 400,
208 	.read		= read_tod_clock,
209 	.mask		= -1ULL,
210 	.mult		= 1000,
211 	.shift		= 12,
212 	.flags		= CLOCK_SOURCE_IS_CONTINUOUS,
213 };
214 
215 struct clocksource * __init clocksource_default_clock(void)
216 {
217 	return &clocksource_tod;
218 }
219 
220 void update_vsyscall(struct timespec *wall_time, struct timespec *wtm,
221 			struct clocksource *clock, u32 mult)
222 {
223 	if (clock != &clocksource_tod)
224 		return;
225 
226 	/* Make userspace gettimeofday spin until we're done. */
227 	++vdso_data->tb_update_count;
228 	smp_wmb();
229 	vdso_data->xtime_tod_stamp = clock->cycle_last;
230 	vdso_data->xtime_clock_sec = wall_time->tv_sec;
231 	vdso_data->xtime_clock_nsec = wall_time->tv_nsec;
232 	vdso_data->wtom_clock_sec = wtm->tv_sec;
233 	vdso_data->wtom_clock_nsec = wtm->tv_nsec;
234 	vdso_data->ntp_mult = mult;
235 	smp_wmb();
236 	++vdso_data->tb_update_count;
237 }
238 
239 extern struct timezone sys_tz;
240 
241 void update_vsyscall_tz(void)
242 {
243 	/* Make userspace gettimeofday spin until we're done. */
244 	++vdso_data->tb_update_count;
245 	smp_wmb();
246 	vdso_data->tz_minuteswest = sys_tz.tz_minuteswest;
247 	vdso_data->tz_dsttime = sys_tz.tz_dsttime;
248 	smp_wmb();
249 	++vdso_data->tb_update_count;
250 }
251 
252 /*
253  * Initialize the TOD clock and the CPU timer of
254  * the boot cpu.
255  */
256 void __init time_init(void)
257 {
258 	/* Reset time synchronization interfaces. */
259 	etr_reset();
260 	stp_reset();
261 
262 	/* request the clock comparator external interrupt */
263 	if (register_external_interrupt(0x1004, clock_comparator_interrupt))
264                 panic("Couldn't request external interrupt 0x1004");
265 
266 	/* request the timing alert external interrupt */
267 	if (register_external_interrupt(0x1406, timing_alert_interrupt))
268 		panic("Couldn't request external interrupt 0x1406");
269 
270 	if (clocksource_register(&clocksource_tod) != 0)
271 		panic("Could not register TOD clock source");
272 
273 	/* Enable TOD clock interrupts on the boot cpu. */
274 	init_cpu_timer();
275 
276 	/* Enable cpu timer interrupts on the boot cpu. */
277 	vtime_init();
278 }
279 
280 /*
281  * The time is "clock". old is what we think the time is.
282  * Adjust the value by a multiple of jiffies and add the delta to ntp.
283  * "delay" is an approximation how long the synchronization took. If
284  * the time correction is positive, then "delay" is subtracted from
285  * the time difference and only the remaining part is passed to ntp.
286  */
287 static unsigned long long adjust_time(unsigned long long old,
288 				      unsigned long long clock,
289 				      unsigned long long delay)
290 {
291 	unsigned long long delta, ticks;
292 	struct timex adjust;
293 
294 	if (clock > old) {
295 		/* It is later than we thought. */
296 		delta = ticks = clock - old;
297 		delta = ticks = (delta < delay) ? 0 : delta - delay;
298 		delta -= do_div(ticks, CLK_TICKS_PER_JIFFY);
299 		adjust.offset = ticks * (1000000 / HZ);
300 	} else {
301 		/* It is earlier than we thought. */
302 		delta = ticks = old - clock;
303 		delta -= do_div(ticks, CLK_TICKS_PER_JIFFY);
304 		delta = -delta;
305 		adjust.offset = -ticks * (1000000 / HZ);
306 	}
307 	sched_clock_base_cc += delta;
308 	if (adjust.offset != 0) {
309 		pr_notice("The ETR interface has adjusted the clock "
310 			  "by %li microseconds\n", adjust.offset);
311 		adjust.modes = ADJ_OFFSET_SINGLESHOT;
312 		do_adjtimex(&adjust);
313 	}
314 	return delta;
315 }
316 
317 static DEFINE_PER_CPU(atomic_t, clock_sync_word);
318 static DEFINE_MUTEX(clock_sync_mutex);
319 static unsigned long clock_sync_flags;
320 
321 #define CLOCK_SYNC_HAS_ETR	0
322 #define CLOCK_SYNC_HAS_STP	1
323 #define CLOCK_SYNC_ETR		2
324 #define CLOCK_SYNC_STP		3
325 
326 /*
327  * The synchronous get_clock function. It will write the current clock
328  * value to the clock pointer and return 0 if the clock is in sync with
329  * the external time source. If the clock mode is local it will return
330  * -ENOSYS and -EAGAIN if the clock is not in sync with the external
331  * reference.
332  */
333 int get_sync_clock(unsigned long long *clock)
334 {
335 	atomic_t *sw_ptr;
336 	unsigned int sw0, sw1;
337 
338 	sw_ptr = &get_cpu_var(clock_sync_word);
339 	sw0 = atomic_read(sw_ptr);
340 	*clock = get_clock();
341 	sw1 = atomic_read(sw_ptr);
342 	put_cpu_var(clock_sync_word);
343 	if (sw0 == sw1 && (sw0 & 0x80000000U))
344 		/* Success: time is in sync. */
345 		return 0;
346 	if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags) &&
347 	    !test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
348 		return -ENOSYS;
349 	if (!test_bit(CLOCK_SYNC_ETR, &clock_sync_flags) &&
350 	    !test_bit(CLOCK_SYNC_STP, &clock_sync_flags))
351 		return -EACCES;
352 	return -EAGAIN;
353 }
354 EXPORT_SYMBOL(get_sync_clock);
355 
356 /*
357  * Make get_sync_clock return -EAGAIN.
358  */
359 static void disable_sync_clock(void *dummy)
360 {
361 	atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word);
362 	/*
363 	 * Clear the in-sync bit 2^31. All get_sync_clock calls will
364 	 * fail until the sync bit is turned back on. In addition
365 	 * increase the "sequence" counter to avoid the race of an
366 	 * etr event and the complete recovery against get_sync_clock.
367 	 */
368 	atomic_clear_mask(0x80000000, sw_ptr);
369 	atomic_inc(sw_ptr);
370 }
371 
372 /*
373  * Make get_sync_clock return 0 again.
374  * Needs to be called from a context disabled for preemption.
375  */
376 static void enable_sync_clock(void)
377 {
378 	atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word);
379 	atomic_set_mask(0x80000000, sw_ptr);
380 }
381 
382 /*
383  * Function to check if the clock is in sync.
384  */
385 static inline int check_sync_clock(void)
386 {
387 	atomic_t *sw_ptr;
388 	int rc;
389 
390 	sw_ptr = &get_cpu_var(clock_sync_word);
391 	rc = (atomic_read(sw_ptr) & 0x80000000U) != 0;
392 	put_cpu_var(clock_sync_word);
393 	return rc;
394 }
395 
396 /* Single threaded workqueue used for etr and stp sync events */
397 static struct workqueue_struct *time_sync_wq;
398 
399 static void __init time_init_wq(void)
400 {
401 	if (time_sync_wq)
402 		return;
403 	time_sync_wq = create_singlethread_workqueue("timesync");
404 }
405 
406 /*
407  * External Time Reference (ETR) code.
408  */
409 static int etr_port0_online;
410 static int etr_port1_online;
411 static int etr_steai_available;
412 
413 static int __init early_parse_etr(char *p)
414 {
415 	if (strncmp(p, "off", 3) == 0)
416 		etr_port0_online = etr_port1_online = 0;
417 	else if (strncmp(p, "port0", 5) == 0)
418 		etr_port0_online = 1;
419 	else if (strncmp(p, "port1", 5) == 0)
420 		etr_port1_online = 1;
421 	else if (strncmp(p, "on", 2) == 0)
422 		etr_port0_online = etr_port1_online = 1;
423 	return 0;
424 }
425 early_param("etr", early_parse_etr);
426 
427 enum etr_event {
428 	ETR_EVENT_PORT0_CHANGE,
429 	ETR_EVENT_PORT1_CHANGE,
430 	ETR_EVENT_PORT_ALERT,
431 	ETR_EVENT_SYNC_CHECK,
432 	ETR_EVENT_SWITCH_LOCAL,
433 	ETR_EVENT_UPDATE,
434 };
435 
436 /*
437  * Valid bit combinations of the eacr register are (x = don't care):
438  * e0 e1 dp p0 p1 ea es sl
439  *  0  0  x  0	0  0  0  0  initial, disabled state
440  *  0  0  x  0	1  1  0  0  port 1 online
441  *  0  0  x  1	0  1  0  0  port 0 online
442  *  0  0  x  1	1  1  0  0  both ports online
443  *  0  1  x  0	1  1  0  0  port 1 online and usable, ETR or PPS mode
444  *  0  1  x  0	1  1  0  1  port 1 online, usable and ETR mode
445  *  0  1  x  0	1  1  1  0  port 1 online, usable, PPS mode, in-sync
446  *  0  1  x  0	1  1  1  1  port 1 online, usable, ETR mode, in-sync
447  *  0  1  x  1	1  1  0  0  both ports online, port 1 usable
448  *  0  1  x  1	1  1  1  0  both ports online, port 1 usable, PPS mode, in-sync
449  *  0  1  x  1	1  1  1  1  both ports online, port 1 usable, ETR mode, in-sync
450  *  1  0  x  1	0  1  0  0  port 0 online and usable, ETR or PPS mode
451  *  1  0  x  1	0  1  0  1  port 0 online, usable and ETR mode
452  *  1  0  x  1	0  1  1  0  port 0 online, usable, PPS mode, in-sync
453  *  1  0  x  1	0  1  1  1  port 0 online, usable, ETR mode, in-sync
454  *  1  0  x  1	1  1  0  0  both ports online, port 0 usable
455  *  1  0  x  1	1  1  1  0  both ports online, port 0 usable, PPS mode, in-sync
456  *  1  0  x  1	1  1  1  1  both ports online, port 0 usable, ETR mode, in-sync
457  *  1  1  x  1	1  1  1  0  both ports online & usable, ETR, in-sync
458  *  1  1  x  1	1  1  1  1  both ports online & usable, ETR, in-sync
459  */
460 static struct etr_eacr etr_eacr;
461 static u64 etr_tolec;			/* time of last eacr update */
462 static struct etr_aib etr_port0;
463 static int etr_port0_uptodate;
464 static struct etr_aib etr_port1;
465 static int etr_port1_uptodate;
466 static unsigned long etr_events;
467 static struct timer_list etr_timer;
468 
469 static void etr_timeout(unsigned long dummy);
470 static void etr_work_fn(struct work_struct *work);
471 static DEFINE_MUTEX(etr_work_mutex);
472 static DECLARE_WORK(etr_work, etr_work_fn);
473 
474 /*
475  * Reset ETR attachment.
476  */
477 static void etr_reset(void)
478 {
479 	etr_eacr =  (struct etr_eacr) {
480 		.e0 = 0, .e1 = 0, ._pad0 = 4, .dp = 0,
481 		.p0 = 0, .p1 = 0, ._pad1 = 0, .ea = 0,
482 		.es = 0, .sl = 0 };
483 	if (etr_setr(&etr_eacr) == 0) {
484 		etr_tolec = get_clock();
485 		set_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags);
486 		if (etr_port0_online && etr_port1_online)
487 			set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
488 	} else if (etr_port0_online || etr_port1_online) {
489 		pr_warning("The real or virtual hardware system does "
490 			   "not provide an ETR interface\n");
491 		etr_port0_online = etr_port1_online = 0;
492 	}
493 }
494 
495 static int __init etr_init(void)
496 {
497 	struct etr_aib aib;
498 
499 	if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags))
500 		return 0;
501 	time_init_wq();
502 	/* Check if this machine has the steai instruction. */
503 	if (etr_steai(&aib, ETR_STEAI_STEPPING_PORT) == 0)
504 		etr_steai_available = 1;
505 	setup_timer(&etr_timer, etr_timeout, 0UL);
506 	if (etr_port0_online) {
507 		set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
508 		queue_work(time_sync_wq, &etr_work);
509 	}
510 	if (etr_port1_online) {
511 		set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
512 		queue_work(time_sync_wq, &etr_work);
513 	}
514 	return 0;
515 }
516 
517 arch_initcall(etr_init);
518 
519 /*
520  * Two sorts of ETR machine checks. The architecture reads:
521  * "When a machine-check niterruption occurs and if a switch-to-local or
522  *  ETR-sync-check interrupt request is pending but disabled, this pending
523  *  disabled interruption request is indicated and is cleared".
524  * Which means that we can get etr_switch_to_local events from the machine
525  * check handler although the interruption condition is disabled. Lovely..
526  */
527 
528 /*
529  * Switch to local machine check. This is called when the last usable
530  * ETR port goes inactive. After switch to local the clock is not in sync.
531  */
532 void etr_switch_to_local(void)
533 {
534 	if (!etr_eacr.sl)
535 		return;
536 	disable_sync_clock(NULL);
537 	if (!test_and_set_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events)) {
538 		etr_eacr.es = etr_eacr.sl = 0;
539 		etr_setr(&etr_eacr);
540 		queue_work(time_sync_wq, &etr_work);
541 	}
542 }
543 
544 /*
545  * ETR sync check machine check. This is called when the ETR OTE and the
546  * local clock OTE are farther apart than the ETR sync check tolerance.
547  * After a ETR sync check the clock is not in sync. The machine check
548  * is broadcasted to all cpus at the same time.
549  */
550 void etr_sync_check(void)
551 {
552 	if (!etr_eacr.es)
553 		return;
554 	disable_sync_clock(NULL);
555 	if (!test_and_set_bit(ETR_EVENT_SYNC_CHECK, &etr_events)) {
556 		etr_eacr.es = 0;
557 		etr_setr(&etr_eacr);
558 		queue_work(time_sync_wq, &etr_work);
559 	}
560 }
561 
562 /*
563  * ETR timing alert. There are two causes:
564  * 1) port state change, check the usability of the port
565  * 2) port alert, one of the ETR-data-validity bits (v1-v2 bits of the
566  *    sldr-status word) or ETR-data word 1 (edf1) or ETR-data word 3 (edf3)
567  *    or ETR-data word 4 (edf4) has changed.
568  */
569 static void etr_timing_alert(struct etr_irq_parm *intparm)
570 {
571 	if (intparm->pc0)
572 		/* ETR port 0 state change. */
573 		set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
574 	if (intparm->pc1)
575 		/* ETR port 1 state change. */
576 		set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
577 	if (intparm->eai)
578 		/*
579 		 * ETR port alert on either port 0, 1 or both.
580 		 * Both ports are not up-to-date now.
581 		 */
582 		set_bit(ETR_EVENT_PORT_ALERT, &etr_events);
583 	queue_work(time_sync_wq, &etr_work);
584 }
585 
586 static void etr_timeout(unsigned long dummy)
587 {
588 	set_bit(ETR_EVENT_UPDATE, &etr_events);
589 	queue_work(time_sync_wq, &etr_work);
590 }
591 
592 /*
593  * Check if the etr mode is pss.
594  */
595 static inline int etr_mode_is_pps(struct etr_eacr eacr)
596 {
597 	return eacr.es && !eacr.sl;
598 }
599 
600 /*
601  * Check if the etr mode is etr.
602  */
603 static inline int etr_mode_is_etr(struct etr_eacr eacr)
604 {
605 	return eacr.es && eacr.sl;
606 }
607 
608 /*
609  * Check if the port can be used for TOD synchronization.
610  * For PPS mode the port has to receive OTEs. For ETR mode
611  * the port has to receive OTEs, the ETR stepping bit has to
612  * be zero and the validity bits for data frame 1, 2, and 3
613  * have to be 1.
614  */
615 static int etr_port_valid(struct etr_aib *aib, int port)
616 {
617 	unsigned int psc;
618 
619 	/* Check that this port is receiving OTEs. */
620 	if (aib->tsp == 0)
621 		return 0;
622 
623 	psc = port ? aib->esw.psc1 : aib->esw.psc0;
624 	if (psc == etr_lpsc_pps_mode)
625 		return 1;
626 	if (psc == etr_lpsc_operational_step)
627 		return !aib->esw.y && aib->slsw.v1 &&
628 			aib->slsw.v2 && aib->slsw.v3;
629 	return 0;
630 }
631 
632 /*
633  * Check if two ports are on the same network.
634  */
635 static int etr_compare_network(struct etr_aib *aib1, struct etr_aib *aib2)
636 {
637 	// FIXME: any other fields we have to compare?
638 	return aib1->edf1.net_id == aib2->edf1.net_id;
639 }
640 
641 /*
642  * Wrapper for etr_stei that converts physical port states
643  * to logical port states to be consistent with the output
644  * of stetr (see etr_psc vs. etr_lpsc).
645  */
646 static void etr_steai_cv(struct etr_aib *aib, unsigned int func)
647 {
648 	BUG_ON(etr_steai(aib, func) != 0);
649 	/* Convert port state to logical port state. */
650 	if (aib->esw.psc0 == 1)
651 		aib->esw.psc0 = 2;
652 	else if (aib->esw.psc0 == 0 && aib->esw.p == 0)
653 		aib->esw.psc0 = 1;
654 	if (aib->esw.psc1 == 1)
655 		aib->esw.psc1 = 2;
656 	else if (aib->esw.psc1 == 0 && aib->esw.p == 1)
657 		aib->esw.psc1 = 1;
658 }
659 
660 /*
661  * Check if the aib a2 is still connected to the same attachment as
662  * aib a1, the etv values differ by one and a2 is valid.
663  */
664 static int etr_aib_follows(struct etr_aib *a1, struct etr_aib *a2, int p)
665 {
666 	int state_a1, state_a2;
667 
668 	/* Paranoia check: e0/e1 should better be the same. */
669 	if (a1->esw.eacr.e0 != a2->esw.eacr.e0 ||
670 	    a1->esw.eacr.e1 != a2->esw.eacr.e1)
671 		return 0;
672 
673 	/* Still connected to the same etr ? */
674 	state_a1 = p ? a1->esw.psc1 : a1->esw.psc0;
675 	state_a2 = p ? a2->esw.psc1 : a2->esw.psc0;
676 	if (state_a1 == etr_lpsc_operational_step) {
677 		if (state_a2 != etr_lpsc_operational_step ||
678 		    a1->edf1.net_id != a2->edf1.net_id ||
679 		    a1->edf1.etr_id != a2->edf1.etr_id ||
680 		    a1->edf1.etr_pn != a2->edf1.etr_pn)
681 			return 0;
682 	} else if (state_a2 != etr_lpsc_pps_mode)
683 		return 0;
684 
685 	/* The ETV value of a2 needs to be ETV of a1 + 1. */
686 	if (a1->edf2.etv + 1 != a2->edf2.etv)
687 		return 0;
688 
689 	if (!etr_port_valid(a2, p))
690 		return 0;
691 
692 	return 1;
693 }
694 
695 struct clock_sync_data {
696 	atomic_t cpus;
697 	int in_sync;
698 	unsigned long long fixup_cc;
699 	int etr_port;
700 	struct etr_aib *etr_aib;
701 };
702 
703 static void clock_sync_cpu(struct clock_sync_data *sync)
704 {
705 	atomic_dec(&sync->cpus);
706 	enable_sync_clock();
707 	/*
708 	 * This looks like a busy wait loop but it isn't. etr_sync_cpus
709 	 * is called on all other cpus while the TOD clocks is stopped.
710 	 * __udelay will stop the cpu on an enabled wait psw until the
711 	 * TOD is running again.
712 	 */
713 	while (sync->in_sync == 0) {
714 		__udelay(1);
715 		/*
716 		 * A different cpu changes *in_sync. Therefore use
717 		 * barrier() to force memory access.
718 		 */
719 		barrier();
720 	}
721 	if (sync->in_sync != 1)
722 		/* Didn't work. Clear per-cpu in sync bit again. */
723 		disable_sync_clock(NULL);
724 	/*
725 	 * This round of TOD syncing is done. Set the clock comparator
726 	 * to the next tick and let the processor continue.
727 	 */
728 	fixup_clock_comparator(sync->fixup_cc);
729 }
730 
731 /*
732  * Sync the TOD clock using the port referred to by aibp. This port
733  * has to be enabled and the other port has to be disabled. The
734  * last eacr update has to be more than 1.6 seconds in the past.
735  */
736 static int etr_sync_clock(void *data)
737 {
738 	static int first;
739 	unsigned long long clock, old_clock, delay, delta;
740 	struct clock_sync_data *etr_sync;
741 	struct etr_aib *sync_port, *aib;
742 	int port;
743 	int rc;
744 
745 	etr_sync = data;
746 
747 	if (xchg(&first, 1) == 1) {
748 		/* Slave */
749 		clock_sync_cpu(etr_sync);
750 		return 0;
751 	}
752 
753 	/* Wait until all other cpus entered the sync function. */
754 	while (atomic_read(&etr_sync->cpus) != 0)
755 		cpu_relax();
756 
757 	port = etr_sync->etr_port;
758 	aib = etr_sync->etr_aib;
759 	sync_port = (port == 0) ? &etr_port0 : &etr_port1;
760 	enable_sync_clock();
761 
762 	/* Set clock to next OTE. */
763 	__ctl_set_bit(14, 21);
764 	__ctl_set_bit(0, 29);
765 	clock = ((unsigned long long) (aib->edf2.etv + 1)) << 32;
766 	old_clock = get_clock();
767 	if (set_clock(clock) == 0) {
768 		__udelay(1);	/* Wait for the clock to start. */
769 		__ctl_clear_bit(0, 29);
770 		__ctl_clear_bit(14, 21);
771 		etr_stetr(aib);
772 		/* Adjust Linux timing variables. */
773 		delay = (unsigned long long)
774 			(aib->edf2.etv - sync_port->edf2.etv) << 32;
775 		delta = adjust_time(old_clock, clock, delay);
776 		etr_sync->fixup_cc = delta;
777 		fixup_clock_comparator(delta);
778 		/* Verify that the clock is properly set. */
779 		if (!etr_aib_follows(sync_port, aib, port)) {
780 			/* Didn't work. */
781 			disable_sync_clock(NULL);
782 			etr_sync->in_sync = -EAGAIN;
783 			rc = -EAGAIN;
784 		} else {
785 			etr_sync->in_sync = 1;
786 			rc = 0;
787 		}
788 	} else {
789 		/* Could not set the clock ?!? */
790 		__ctl_clear_bit(0, 29);
791 		__ctl_clear_bit(14, 21);
792 		disable_sync_clock(NULL);
793 		etr_sync->in_sync = -EAGAIN;
794 		rc = -EAGAIN;
795 	}
796 	xchg(&first, 0);
797 	return rc;
798 }
799 
800 static int etr_sync_clock_stop(struct etr_aib *aib, int port)
801 {
802 	struct clock_sync_data etr_sync;
803 	struct etr_aib *sync_port;
804 	int follows;
805 	int rc;
806 
807 	/* Check if the current aib is adjacent to the sync port aib. */
808 	sync_port = (port == 0) ? &etr_port0 : &etr_port1;
809 	follows = etr_aib_follows(sync_port, aib, port);
810 	memcpy(sync_port, aib, sizeof(*aib));
811 	if (!follows)
812 		return -EAGAIN;
813 	memset(&etr_sync, 0, sizeof(etr_sync));
814 	etr_sync.etr_aib = aib;
815 	etr_sync.etr_port = port;
816 	get_online_cpus();
817 	atomic_set(&etr_sync.cpus, num_online_cpus() - 1);
818 	rc = stop_machine(etr_sync_clock, &etr_sync, cpu_online_mask);
819 	put_online_cpus();
820 	return rc;
821 }
822 
823 /*
824  * Handle the immediate effects of the different events.
825  * The port change event is used for online/offline changes.
826  */
827 static struct etr_eacr etr_handle_events(struct etr_eacr eacr)
828 {
829 	if (test_and_clear_bit(ETR_EVENT_SYNC_CHECK, &etr_events))
830 		eacr.es = 0;
831 	if (test_and_clear_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events))
832 		eacr.es = eacr.sl = 0;
833 	if (test_and_clear_bit(ETR_EVENT_PORT_ALERT, &etr_events))
834 		etr_port0_uptodate = etr_port1_uptodate = 0;
835 
836 	if (test_and_clear_bit(ETR_EVENT_PORT0_CHANGE, &etr_events)) {
837 		if (eacr.e0)
838 			/*
839 			 * Port change of an enabled port. We have to
840 			 * assume that this can have caused an stepping
841 			 * port switch.
842 			 */
843 			etr_tolec = get_clock();
844 		eacr.p0 = etr_port0_online;
845 		if (!eacr.p0)
846 			eacr.e0 = 0;
847 		etr_port0_uptodate = 0;
848 	}
849 	if (test_and_clear_bit(ETR_EVENT_PORT1_CHANGE, &etr_events)) {
850 		if (eacr.e1)
851 			/*
852 			 * Port change of an enabled port. We have to
853 			 * assume that this can have caused an stepping
854 			 * port switch.
855 			 */
856 			etr_tolec = get_clock();
857 		eacr.p1 = etr_port1_online;
858 		if (!eacr.p1)
859 			eacr.e1 = 0;
860 		etr_port1_uptodate = 0;
861 	}
862 	clear_bit(ETR_EVENT_UPDATE, &etr_events);
863 	return eacr;
864 }
865 
866 /*
867  * Set up a timer that expires after the etr_tolec + 1.6 seconds if
868  * one of the ports needs an update.
869  */
870 static void etr_set_tolec_timeout(unsigned long long now)
871 {
872 	unsigned long micros;
873 
874 	if ((!etr_eacr.p0 || etr_port0_uptodate) &&
875 	    (!etr_eacr.p1 || etr_port1_uptodate))
876 		return;
877 	micros = (now > etr_tolec) ? ((now - etr_tolec) >> 12) : 0;
878 	micros = (micros > 1600000) ? 0 : 1600000 - micros;
879 	mod_timer(&etr_timer, jiffies + (micros * HZ) / 1000000 + 1);
880 }
881 
882 /*
883  * Set up a time that expires after 1/2 second.
884  */
885 static void etr_set_sync_timeout(void)
886 {
887 	mod_timer(&etr_timer, jiffies + HZ/2);
888 }
889 
890 /*
891  * Update the aib information for one or both ports.
892  */
893 static struct etr_eacr etr_handle_update(struct etr_aib *aib,
894 					 struct etr_eacr eacr)
895 {
896 	/* With both ports disabled the aib information is useless. */
897 	if (!eacr.e0 && !eacr.e1)
898 		return eacr;
899 
900 	/* Update port0 or port1 with aib stored in etr_work_fn. */
901 	if (aib->esw.q == 0) {
902 		/* Information for port 0 stored. */
903 		if (eacr.p0 && !etr_port0_uptodate) {
904 			etr_port0 = *aib;
905 			if (etr_port0_online)
906 				etr_port0_uptodate = 1;
907 		}
908 	} else {
909 		/* Information for port 1 stored. */
910 		if (eacr.p1 && !etr_port1_uptodate) {
911 			etr_port1 = *aib;
912 			if (etr_port0_online)
913 				etr_port1_uptodate = 1;
914 		}
915 	}
916 
917 	/*
918 	 * Do not try to get the alternate port aib if the clock
919 	 * is not in sync yet.
920 	 */
921 	if (!eacr.es || !check_sync_clock())
922 		return eacr;
923 
924 	/*
925 	 * If steai is available we can get the information about
926 	 * the other port immediately. If only stetr is available the
927 	 * data-port bit toggle has to be used.
928 	 */
929 	if (etr_steai_available) {
930 		if (eacr.p0 && !etr_port0_uptodate) {
931 			etr_steai_cv(&etr_port0, ETR_STEAI_PORT_0);
932 			etr_port0_uptodate = 1;
933 		}
934 		if (eacr.p1 && !etr_port1_uptodate) {
935 			etr_steai_cv(&etr_port1, ETR_STEAI_PORT_1);
936 			etr_port1_uptodate = 1;
937 		}
938 	} else {
939 		/*
940 		 * One port was updated above, if the other
941 		 * port is not uptodate toggle dp bit.
942 		 */
943 		if ((eacr.p0 && !etr_port0_uptodate) ||
944 		    (eacr.p1 && !etr_port1_uptodate))
945 			eacr.dp ^= 1;
946 		else
947 			eacr.dp = 0;
948 	}
949 	return eacr;
950 }
951 
952 /*
953  * Write new etr control register if it differs from the current one.
954  * Return 1 if etr_tolec has been updated as well.
955  */
956 static void etr_update_eacr(struct etr_eacr eacr)
957 {
958 	int dp_changed;
959 
960 	if (memcmp(&etr_eacr, &eacr, sizeof(eacr)) == 0)
961 		/* No change, return. */
962 		return;
963 	/*
964 	 * The disable of an active port of the change of the data port
965 	 * bit can/will cause a change in the data port.
966 	 */
967 	dp_changed = etr_eacr.e0 > eacr.e0 || etr_eacr.e1 > eacr.e1 ||
968 		(etr_eacr.dp ^ eacr.dp) != 0;
969 	etr_eacr = eacr;
970 	etr_setr(&etr_eacr);
971 	if (dp_changed)
972 		etr_tolec = get_clock();
973 }
974 
975 /*
976  * ETR work. In this function you'll find the main logic. In
977  * particular this is the only function that calls etr_update_eacr(),
978  * it "controls" the etr control register.
979  */
980 static void etr_work_fn(struct work_struct *work)
981 {
982 	unsigned long long now;
983 	struct etr_eacr eacr;
984 	struct etr_aib aib;
985 	int sync_port;
986 
987 	/* prevent multiple execution. */
988 	mutex_lock(&etr_work_mutex);
989 
990 	/* Create working copy of etr_eacr. */
991 	eacr = etr_eacr;
992 
993 	/* Check for the different events and their immediate effects. */
994 	eacr = etr_handle_events(eacr);
995 
996 	/* Check if ETR is supposed to be active. */
997 	eacr.ea = eacr.p0 || eacr.p1;
998 	if (!eacr.ea) {
999 		/* Both ports offline. Reset everything. */
1000 		eacr.dp = eacr.es = eacr.sl = 0;
1001 		on_each_cpu(disable_sync_clock, NULL, 1);
1002 		del_timer_sync(&etr_timer);
1003 		etr_update_eacr(eacr);
1004 		goto out_unlock;
1005 	}
1006 
1007 	/* Store aib to get the current ETR status word. */
1008 	BUG_ON(etr_stetr(&aib) != 0);
1009 	etr_port0.esw = etr_port1.esw = aib.esw;	/* Copy status word. */
1010 	now = get_clock();
1011 
1012 	/*
1013 	 * Update the port information if the last stepping port change
1014 	 * or data port change is older than 1.6 seconds.
1015 	 */
1016 	if (now >= etr_tolec + (1600000 << 12))
1017 		eacr = etr_handle_update(&aib, eacr);
1018 
1019 	/*
1020 	 * Select ports to enable. The preferred synchronization mode is PPS.
1021 	 * If a port can be enabled depends on a number of things:
1022 	 * 1) The port needs to be online and uptodate. A port is not
1023 	 *    disabled just because it is not uptodate, but it is only
1024 	 *    enabled if it is uptodate.
1025 	 * 2) The port needs to have the same mode (pps / etr).
1026 	 * 3) The port needs to be usable -> etr_port_valid() == 1
1027 	 * 4) To enable the second port the clock needs to be in sync.
1028 	 * 5) If both ports are useable and are ETR ports, the network id
1029 	 *    has to be the same.
1030 	 * The eacr.sl bit is used to indicate etr mode vs. pps mode.
1031 	 */
1032 	if (eacr.p0 && aib.esw.psc0 == etr_lpsc_pps_mode) {
1033 		eacr.sl = 0;
1034 		eacr.e0 = 1;
1035 		if (!etr_mode_is_pps(etr_eacr))
1036 			eacr.es = 0;
1037 		if (!eacr.es || !eacr.p1 || aib.esw.psc1 != etr_lpsc_pps_mode)
1038 			eacr.e1 = 0;
1039 		// FIXME: uptodate checks ?
1040 		else if (etr_port0_uptodate && etr_port1_uptodate)
1041 			eacr.e1 = 1;
1042 		sync_port = (etr_port0_uptodate &&
1043 			     etr_port_valid(&etr_port0, 0)) ? 0 : -1;
1044 	} else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_pps_mode) {
1045 		eacr.sl = 0;
1046 		eacr.e0 = 0;
1047 		eacr.e1 = 1;
1048 		if (!etr_mode_is_pps(etr_eacr))
1049 			eacr.es = 0;
1050 		sync_port = (etr_port1_uptodate &&
1051 			     etr_port_valid(&etr_port1, 1)) ? 1 : -1;
1052 	} else if (eacr.p0 && aib.esw.psc0 == etr_lpsc_operational_step) {
1053 		eacr.sl = 1;
1054 		eacr.e0 = 1;
1055 		if (!etr_mode_is_etr(etr_eacr))
1056 			eacr.es = 0;
1057 		if (!eacr.es || !eacr.p1 ||
1058 		    aib.esw.psc1 != etr_lpsc_operational_alt)
1059 			eacr.e1 = 0;
1060 		else if (etr_port0_uptodate && etr_port1_uptodate &&
1061 			 etr_compare_network(&etr_port0, &etr_port1))
1062 			eacr.e1 = 1;
1063 		sync_port = (etr_port0_uptodate &&
1064 			     etr_port_valid(&etr_port0, 0)) ? 0 : -1;
1065 	} else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_operational_step) {
1066 		eacr.sl = 1;
1067 		eacr.e0 = 0;
1068 		eacr.e1 = 1;
1069 		if (!etr_mode_is_etr(etr_eacr))
1070 			eacr.es = 0;
1071 		sync_port = (etr_port1_uptodate &&
1072 			     etr_port_valid(&etr_port1, 1)) ? 1 : -1;
1073 	} else {
1074 		/* Both ports not usable. */
1075 		eacr.es = eacr.sl = 0;
1076 		sync_port = -1;
1077 	}
1078 
1079 	/*
1080 	 * If the clock is in sync just update the eacr and return.
1081 	 * If there is no valid sync port wait for a port update.
1082 	 */
1083 	if ((eacr.es && check_sync_clock()) || sync_port < 0) {
1084 		etr_update_eacr(eacr);
1085 		etr_set_tolec_timeout(now);
1086 		goto out_unlock;
1087 	}
1088 
1089 	/*
1090 	 * Prepare control register for clock syncing
1091 	 * (reset data port bit, set sync check control.
1092 	 */
1093 	eacr.dp = 0;
1094 	eacr.es = 1;
1095 
1096 	/*
1097 	 * Update eacr and try to synchronize the clock. If the update
1098 	 * of eacr caused a stepping port switch (or if we have to
1099 	 * assume that a stepping port switch has occurred) or the
1100 	 * clock syncing failed, reset the sync check control bit
1101 	 * and set up a timer to try again after 0.5 seconds
1102 	 */
1103 	etr_update_eacr(eacr);
1104 	if (now < etr_tolec + (1600000 << 12) ||
1105 	    etr_sync_clock_stop(&aib, sync_port) != 0) {
1106 		/* Sync failed. Try again in 1/2 second. */
1107 		eacr.es = 0;
1108 		etr_update_eacr(eacr);
1109 		etr_set_sync_timeout();
1110 	} else
1111 		etr_set_tolec_timeout(now);
1112 out_unlock:
1113 	mutex_unlock(&etr_work_mutex);
1114 }
1115 
1116 /*
1117  * Sysfs interface functions
1118  */
1119 static struct bus_type etr_subsys = {
1120 	.name		= "etr",
1121 	.dev_name	= "etr",
1122 };
1123 
1124 static struct device etr_port0_dev = {
1125 	.id	= 0,
1126 	.bus	= &etr_subsys,
1127 };
1128 
1129 static struct device etr_port1_dev = {
1130 	.id	= 1,
1131 	.bus	= &etr_subsys,
1132 };
1133 
1134 /*
1135  * ETR subsys attributes
1136  */
1137 static ssize_t etr_stepping_port_show(struct device *dev,
1138 					struct device_attribute *attr,
1139 					char *buf)
1140 {
1141 	return sprintf(buf, "%i\n", etr_port0.esw.p);
1142 }
1143 
1144 static DEVICE_ATTR(stepping_port, 0400, etr_stepping_port_show, NULL);
1145 
1146 static ssize_t etr_stepping_mode_show(struct device *dev,
1147 					struct device_attribute *attr,
1148 					char *buf)
1149 {
1150 	char *mode_str;
1151 
1152 	if (etr_mode_is_pps(etr_eacr))
1153 		mode_str = "pps";
1154 	else if (etr_mode_is_etr(etr_eacr))
1155 		mode_str = "etr";
1156 	else
1157 		mode_str = "local";
1158 	return sprintf(buf, "%s\n", mode_str);
1159 }
1160 
1161 static DEVICE_ATTR(stepping_mode, 0400, etr_stepping_mode_show, NULL);
1162 
1163 /*
1164  * ETR port attributes
1165  */
1166 static inline struct etr_aib *etr_aib_from_dev(struct device *dev)
1167 {
1168 	if (dev == &etr_port0_dev)
1169 		return etr_port0_online ? &etr_port0 : NULL;
1170 	else
1171 		return etr_port1_online ? &etr_port1 : NULL;
1172 }
1173 
1174 static ssize_t etr_online_show(struct device *dev,
1175 				struct device_attribute *attr,
1176 				char *buf)
1177 {
1178 	unsigned int online;
1179 
1180 	online = (dev == &etr_port0_dev) ? etr_port0_online : etr_port1_online;
1181 	return sprintf(buf, "%i\n", online);
1182 }
1183 
1184 static ssize_t etr_online_store(struct device *dev,
1185 				struct device_attribute *attr,
1186 				const char *buf, size_t count)
1187 {
1188 	unsigned int value;
1189 
1190 	value = simple_strtoul(buf, NULL, 0);
1191 	if (value != 0 && value != 1)
1192 		return -EINVAL;
1193 	if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags))
1194 		return -EOPNOTSUPP;
1195 	mutex_lock(&clock_sync_mutex);
1196 	if (dev == &etr_port0_dev) {
1197 		if (etr_port0_online == value)
1198 			goto out;	/* Nothing to do. */
1199 		etr_port0_online = value;
1200 		if (etr_port0_online && etr_port1_online)
1201 			set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
1202 		else
1203 			clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
1204 		set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
1205 		queue_work(time_sync_wq, &etr_work);
1206 	} else {
1207 		if (etr_port1_online == value)
1208 			goto out;	/* Nothing to do. */
1209 		etr_port1_online = value;
1210 		if (etr_port0_online && etr_port1_online)
1211 			set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
1212 		else
1213 			clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
1214 		set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
1215 		queue_work(time_sync_wq, &etr_work);
1216 	}
1217 out:
1218 	mutex_unlock(&clock_sync_mutex);
1219 	return count;
1220 }
1221 
1222 static DEVICE_ATTR(online, 0600, etr_online_show, etr_online_store);
1223 
1224 static ssize_t etr_stepping_control_show(struct device *dev,
1225 					struct device_attribute *attr,
1226 					char *buf)
1227 {
1228 	return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ?
1229 		       etr_eacr.e0 : etr_eacr.e1);
1230 }
1231 
1232 static DEVICE_ATTR(stepping_control, 0400, etr_stepping_control_show, NULL);
1233 
1234 static ssize_t etr_mode_code_show(struct device *dev,
1235 				struct device_attribute *attr, char *buf)
1236 {
1237 	if (!etr_port0_online && !etr_port1_online)
1238 		/* Status word is not uptodate if both ports are offline. */
1239 		return -ENODATA;
1240 	return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ?
1241 		       etr_port0.esw.psc0 : etr_port0.esw.psc1);
1242 }
1243 
1244 static DEVICE_ATTR(state_code, 0400, etr_mode_code_show, NULL);
1245 
1246 static ssize_t etr_untuned_show(struct device *dev,
1247 				struct device_attribute *attr, char *buf)
1248 {
1249 	struct etr_aib *aib = etr_aib_from_dev(dev);
1250 
1251 	if (!aib || !aib->slsw.v1)
1252 		return -ENODATA;
1253 	return sprintf(buf, "%i\n", aib->edf1.u);
1254 }
1255 
1256 static DEVICE_ATTR(untuned, 0400, etr_untuned_show, NULL);
1257 
1258 static ssize_t etr_network_id_show(struct device *dev,
1259 				struct device_attribute *attr, char *buf)
1260 {
1261 	struct etr_aib *aib = etr_aib_from_dev(dev);
1262 
1263 	if (!aib || !aib->slsw.v1)
1264 		return -ENODATA;
1265 	return sprintf(buf, "%i\n", aib->edf1.net_id);
1266 }
1267 
1268 static DEVICE_ATTR(network, 0400, etr_network_id_show, NULL);
1269 
1270 static ssize_t etr_id_show(struct device *dev,
1271 			struct device_attribute *attr, char *buf)
1272 {
1273 	struct etr_aib *aib = etr_aib_from_dev(dev);
1274 
1275 	if (!aib || !aib->slsw.v1)
1276 		return -ENODATA;
1277 	return sprintf(buf, "%i\n", aib->edf1.etr_id);
1278 }
1279 
1280 static DEVICE_ATTR(id, 0400, etr_id_show, NULL);
1281 
1282 static ssize_t etr_port_number_show(struct device *dev,
1283 			struct device_attribute *attr, char *buf)
1284 {
1285 	struct etr_aib *aib = etr_aib_from_dev(dev);
1286 
1287 	if (!aib || !aib->slsw.v1)
1288 		return -ENODATA;
1289 	return sprintf(buf, "%i\n", aib->edf1.etr_pn);
1290 }
1291 
1292 static DEVICE_ATTR(port, 0400, etr_port_number_show, NULL);
1293 
1294 static ssize_t etr_coupled_show(struct device *dev,
1295 			struct device_attribute *attr, char *buf)
1296 {
1297 	struct etr_aib *aib = etr_aib_from_dev(dev);
1298 
1299 	if (!aib || !aib->slsw.v3)
1300 		return -ENODATA;
1301 	return sprintf(buf, "%i\n", aib->edf3.c);
1302 }
1303 
1304 static DEVICE_ATTR(coupled, 0400, etr_coupled_show, NULL);
1305 
1306 static ssize_t etr_local_time_show(struct device *dev,
1307 			struct device_attribute *attr, char *buf)
1308 {
1309 	struct etr_aib *aib = etr_aib_from_dev(dev);
1310 
1311 	if (!aib || !aib->slsw.v3)
1312 		return -ENODATA;
1313 	return sprintf(buf, "%i\n", aib->edf3.blto);
1314 }
1315 
1316 static DEVICE_ATTR(local_time, 0400, etr_local_time_show, NULL);
1317 
1318 static ssize_t etr_utc_offset_show(struct device *dev,
1319 			struct device_attribute *attr, char *buf)
1320 {
1321 	struct etr_aib *aib = etr_aib_from_dev(dev);
1322 
1323 	if (!aib || !aib->slsw.v3)
1324 		return -ENODATA;
1325 	return sprintf(buf, "%i\n", aib->edf3.buo);
1326 }
1327 
1328 static DEVICE_ATTR(utc_offset, 0400, etr_utc_offset_show, NULL);
1329 
1330 static struct device_attribute *etr_port_attributes[] = {
1331 	&dev_attr_online,
1332 	&dev_attr_stepping_control,
1333 	&dev_attr_state_code,
1334 	&dev_attr_untuned,
1335 	&dev_attr_network,
1336 	&dev_attr_id,
1337 	&dev_attr_port,
1338 	&dev_attr_coupled,
1339 	&dev_attr_local_time,
1340 	&dev_attr_utc_offset,
1341 	NULL
1342 };
1343 
1344 static int __init etr_register_port(struct device *dev)
1345 {
1346 	struct device_attribute **attr;
1347 	int rc;
1348 
1349 	rc = device_register(dev);
1350 	if (rc)
1351 		goto out;
1352 	for (attr = etr_port_attributes; *attr; attr++) {
1353 		rc = device_create_file(dev, *attr);
1354 		if (rc)
1355 			goto out_unreg;
1356 	}
1357 	return 0;
1358 out_unreg:
1359 	for (; attr >= etr_port_attributes; attr--)
1360 		device_remove_file(dev, *attr);
1361 	device_unregister(dev);
1362 out:
1363 	return rc;
1364 }
1365 
1366 static void __init etr_unregister_port(struct device *dev)
1367 {
1368 	struct device_attribute **attr;
1369 
1370 	for (attr = etr_port_attributes; *attr; attr++)
1371 		device_remove_file(dev, *attr);
1372 	device_unregister(dev);
1373 }
1374 
1375 static int __init etr_init_sysfs(void)
1376 {
1377 	int rc;
1378 
1379 	rc = subsys_system_register(&etr_subsys, NULL);
1380 	if (rc)
1381 		goto out;
1382 	rc = device_create_file(etr_subsys.dev_root, &dev_attr_stepping_port);
1383 	if (rc)
1384 		goto out_unreg_subsys;
1385 	rc = device_create_file(etr_subsys.dev_root, &dev_attr_stepping_mode);
1386 	if (rc)
1387 		goto out_remove_stepping_port;
1388 	rc = etr_register_port(&etr_port0_dev);
1389 	if (rc)
1390 		goto out_remove_stepping_mode;
1391 	rc = etr_register_port(&etr_port1_dev);
1392 	if (rc)
1393 		goto out_remove_port0;
1394 	return 0;
1395 
1396 out_remove_port0:
1397 	etr_unregister_port(&etr_port0_dev);
1398 out_remove_stepping_mode:
1399 	device_remove_file(etr_subsys.dev_root, &dev_attr_stepping_mode);
1400 out_remove_stepping_port:
1401 	device_remove_file(etr_subsys.dev_root, &dev_attr_stepping_port);
1402 out_unreg_subsys:
1403 	bus_unregister(&etr_subsys);
1404 out:
1405 	return rc;
1406 }
1407 
1408 device_initcall(etr_init_sysfs);
1409 
1410 /*
1411  * Server Time Protocol (STP) code.
1412  */
1413 static int stp_online;
1414 static struct stp_sstpi stp_info;
1415 static void *stp_page;
1416 
1417 static void stp_work_fn(struct work_struct *work);
1418 static DEFINE_MUTEX(stp_work_mutex);
1419 static DECLARE_WORK(stp_work, stp_work_fn);
1420 static struct timer_list stp_timer;
1421 
1422 static int __init early_parse_stp(char *p)
1423 {
1424 	if (strncmp(p, "off", 3) == 0)
1425 		stp_online = 0;
1426 	else if (strncmp(p, "on", 2) == 0)
1427 		stp_online = 1;
1428 	return 0;
1429 }
1430 early_param("stp", early_parse_stp);
1431 
1432 /*
1433  * Reset STP attachment.
1434  */
1435 static void __init stp_reset(void)
1436 {
1437 	int rc;
1438 
1439 	stp_page = (void *) get_zeroed_page(GFP_ATOMIC);
1440 	rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000);
1441 	if (rc == 0)
1442 		set_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags);
1443 	else if (stp_online) {
1444 		pr_warning("The real or virtual hardware system does "
1445 			   "not provide an STP interface\n");
1446 		free_page((unsigned long) stp_page);
1447 		stp_page = NULL;
1448 		stp_online = 0;
1449 	}
1450 }
1451 
1452 static void stp_timeout(unsigned long dummy)
1453 {
1454 	queue_work(time_sync_wq, &stp_work);
1455 }
1456 
1457 static int __init stp_init(void)
1458 {
1459 	if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
1460 		return 0;
1461 	setup_timer(&stp_timer, stp_timeout, 0UL);
1462 	time_init_wq();
1463 	if (!stp_online)
1464 		return 0;
1465 	queue_work(time_sync_wq, &stp_work);
1466 	return 0;
1467 }
1468 
1469 arch_initcall(stp_init);
1470 
1471 /*
1472  * STP timing alert. There are three causes:
1473  * 1) timing status change
1474  * 2) link availability change
1475  * 3) time control parameter change
1476  * In all three cases we are only interested in the clock source state.
1477  * If a STP clock source is now available use it.
1478  */
1479 static void stp_timing_alert(struct stp_irq_parm *intparm)
1480 {
1481 	if (intparm->tsc || intparm->lac || intparm->tcpc)
1482 		queue_work(time_sync_wq, &stp_work);
1483 }
1484 
1485 /*
1486  * STP sync check machine check. This is called when the timing state
1487  * changes from the synchronized state to the unsynchronized state.
1488  * After a STP sync check the clock is not in sync. The machine check
1489  * is broadcasted to all cpus at the same time.
1490  */
1491 void stp_sync_check(void)
1492 {
1493 	disable_sync_clock(NULL);
1494 	queue_work(time_sync_wq, &stp_work);
1495 }
1496 
1497 /*
1498  * STP island condition machine check. This is called when an attached
1499  * server  attempts to communicate over an STP link and the servers
1500  * have matching CTN ids and have a valid stratum-1 configuration
1501  * but the configurations do not match.
1502  */
1503 void stp_island_check(void)
1504 {
1505 	disable_sync_clock(NULL);
1506 	queue_work(time_sync_wq, &stp_work);
1507 }
1508 
1509 
1510 static int stp_sync_clock(void *data)
1511 {
1512 	static int first;
1513 	unsigned long long old_clock, delta;
1514 	struct clock_sync_data *stp_sync;
1515 	int rc;
1516 
1517 	stp_sync = data;
1518 
1519 	if (xchg(&first, 1) == 1) {
1520 		/* Slave */
1521 		clock_sync_cpu(stp_sync);
1522 		return 0;
1523 	}
1524 
1525 	/* Wait until all other cpus entered the sync function. */
1526 	while (atomic_read(&stp_sync->cpus) != 0)
1527 		cpu_relax();
1528 
1529 	enable_sync_clock();
1530 
1531 	rc = 0;
1532 	if (stp_info.todoff[0] || stp_info.todoff[1] ||
1533 	    stp_info.todoff[2] || stp_info.todoff[3] ||
1534 	    stp_info.tmd != 2) {
1535 		old_clock = get_clock();
1536 		rc = chsc_sstpc(stp_page, STP_OP_SYNC, 0);
1537 		if (rc == 0) {
1538 			delta = adjust_time(old_clock, get_clock(), 0);
1539 			fixup_clock_comparator(delta);
1540 			rc = chsc_sstpi(stp_page, &stp_info,
1541 					sizeof(struct stp_sstpi));
1542 			if (rc == 0 && stp_info.tmd != 2)
1543 				rc = -EAGAIN;
1544 		}
1545 	}
1546 	if (rc) {
1547 		disable_sync_clock(NULL);
1548 		stp_sync->in_sync = -EAGAIN;
1549 	} else
1550 		stp_sync->in_sync = 1;
1551 	xchg(&first, 0);
1552 	return 0;
1553 }
1554 
1555 /*
1556  * STP work. Check for the STP state and take over the clock
1557  * synchronization if the STP clock source is usable.
1558  */
1559 static void stp_work_fn(struct work_struct *work)
1560 {
1561 	struct clock_sync_data stp_sync;
1562 	int rc;
1563 
1564 	/* prevent multiple execution. */
1565 	mutex_lock(&stp_work_mutex);
1566 
1567 	if (!stp_online) {
1568 		chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000);
1569 		del_timer_sync(&stp_timer);
1570 		goto out_unlock;
1571 	}
1572 
1573 	rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0xb0e0);
1574 	if (rc)
1575 		goto out_unlock;
1576 
1577 	rc = chsc_sstpi(stp_page, &stp_info, sizeof(struct stp_sstpi));
1578 	if (rc || stp_info.c == 0)
1579 		goto out_unlock;
1580 
1581 	/* Skip synchronization if the clock is already in sync. */
1582 	if (check_sync_clock())
1583 		goto out_unlock;
1584 
1585 	memset(&stp_sync, 0, sizeof(stp_sync));
1586 	get_online_cpus();
1587 	atomic_set(&stp_sync.cpus, num_online_cpus() - 1);
1588 	stop_machine(stp_sync_clock, &stp_sync, cpu_online_mask);
1589 	put_online_cpus();
1590 
1591 	if (!check_sync_clock())
1592 		/*
1593 		 * There is a usable clock but the synchonization failed.
1594 		 * Retry after a second.
1595 		 */
1596 		mod_timer(&stp_timer, jiffies + HZ);
1597 
1598 out_unlock:
1599 	mutex_unlock(&stp_work_mutex);
1600 }
1601 
1602 /*
1603  * STP subsys sysfs interface functions
1604  */
1605 static struct bus_type stp_subsys = {
1606 	.name		= "stp",
1607 	.dev_name	= "stp",
1608 };
1609 
1610 static ssize_t stp_ctn_id_show(struct device *dev,
1611 				struct device_attribute *attr,
1612 				char *buf)
1613 {
1614 	if (!stp_online)
1615 		return -ENODATA;
1616 	return sprintf(buf, "%016llx\n",
1617 		       *(unsigned long long *) stp_info.ctnid);
1618 }
1619 
1620 static DEVICE_ATTR(ctn_id, 0400, stp_ctn_id_show, NULL);
1621 
1622 static ssize_t stp_ctn_type_show(struct device *dev,
1623 				struct device_attribute *attr,
1624 				char *buf)
1625 {
1626 	if (!stp_online)
1627 		return -ENODATA;
1628 	return sprintf(buf, "%i\n", stp_info.ctn);
1629 }
1630 
1631 static DEVICE_ATTR(ctn_type, 0400, stp_ctn_type_show, NULL);
1632 
1633 static ssize_t stp_dst_offset_show(struct device *dev,
1634 				   struct device_attribute *attr,
1635 				   char *buf)
1636 {
1637 	if (!stp_online || !(stp_info.vbits & 0x2000))
1638 		return -ENODATA;
1639 	return sprintf(buf, "%i\n", (int)(s16) stp_info.dsto);
1640 }
1641 
1642 static DEVICE_ATTR(dst_offset, 0400, stp_dst_offset_show, NULL);
1643 
1644 static ssize_t stp_leap_seconds_show(struct device *dev,
1645 					struct device_attribute *attr,
1646 					char *buf)
1647 {
1648 	if (!stp_online || !(stp_info.vbits & 0x8000))
1649 		return -ENODATA;
1650 	return sprintf(buf, "%i\n", (int)(s16) stp_info.leaps);
1651 }
1652 
1653 static DEVICE_ATTR(leap_seconds, 0400, stp_leap_seconds_show, NULL);
1654 
1655 static ssize_t stp_stratum_show(struct device *dev,
1656 				struct device_attribute *attr,
1657 				char *buf)
1658 {
1659 	if (!stp_online)
1660 		return -ENODATA;
1661 	return sprintf(buf, "%i\n", (int)(s16) stp_info.stratum);
1662 }
1663 
1664 static DEVICE_ATTR(stratum, 0400, stp_stratum_show, NULL);
1665 
1666 static ssize_t stp_time_offset_show(struct device *dev,
1667 				struct device_attribute *attr,
1668 				char *buf)
1669 {
1670 	if (!stp_online || !(stp_info.vbits & 0x0800))
1671 		return -ENODATA;
1672 	return sprintf(buf, "%i\n", (int) stp_info.tto);
1673 }
1674 
1675 static DEVICE_ATTR(time_offset, 0400, stp_time_offset_show, NULL);
1676 
1677 static ssize_t stp_time_zone_offset_show(struct device *dev,
1678 				struct device_attribute *attr,
1679 				char *buf)
1680 {
1681 	if (!stp_online || !(stp_info.vbits & 0x4000))
1682 		return -ENODATA;
1683 	return sprintf(buf, "%i\n", (int)(s16) stp_info.tzo);
1684 }
1685 
1686 static DEVICE_ATTR(time_zone_offset, 0400,
1687 			 stp_time_zone_offset_show, NULL);
1688 
1689 static ssize_t stp_timing_mode_show(struct device *dev,
1690 				struct device_attribute *attr,
1691 				char *buf)
1692 {
1693 	if (!stp_online)
1694 		return -ENODATA;
1695 	return sprintf(buf, "%i\n", stp_info.tmd);
1696 }
1697 
1698 static DEVICE_ATTR(timing_mode, 0400, stp_timing_mode_show, NULL);
1699 
1700 static ssize_t stp_timing_state_show(struct device *dev,
1701 				struct device_attribute *attr,
1702 				char *buf)
1703 {
1704 	if (!stp_online)
1705 		return -ENODATA;
1706 	return sprintf(buf, "%i\n", stp_info.tst);
1707 }
1708 
1709 static DEVICE_ATTR(timing_state, 0400, stp_timing_state_show, NULL);
1710 
1711 static ssize_t stp_online_show(struct device *dev,
1712 				struct device_attribute *attr,
1713 				char *buf)
1714 {
1715 	return sprintf(buf, "%i\n", stp_online);
1716 }
1717 
1718 static ssize_t stp_online_store(struct device *dev,
1719 				struct device_attribute *attr,
1720 				const char *buf, size_t count)
1721 {
1722 	unsigned int value;
1723 
1724 	value = simple_strtoul(buf, NULL, 0);
1725 	if (value != 0 && value != 1)
1726 		return -EINVAL;
1727 	if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
1728 		return -EOPNOTSUPP;
1729 	mutex_lock(&clock_sync_mutex);
1730 	stp_online = value;
1731 	if (stp_online)
1732 		set_bit(CLOCK_SYNC_STP, &clock_sync_flags);
1733 	else
1734 		clear_bit(CLOCK_SYNC_STP, &clock_sync_flags);
1735 	queue_work(time_sync_wq, &stp_work);
1736 	mutex_unlock(&clock_sync_mutex);
1737 	return count;
1738 }
1739 
1740 /*
1741  * Can't use DEVICE_ATTR because the attribute should be named
1742  * stp/online but dev_attr_online already exists in this file ..
1743  */
1744 static struct device_attribute dev_attr_stp_online = {
1745 	.attr = { .name = "online", .mode = 0600 },
1746 	.show	= stp_online_show,
1747 	.store	= stp_online_store,
1748 };
1749 
1750 static struct device_attribute *stp_attributes[] = {
1751 	&dev_attr_ctn_id,
1752 	&dev_attr_ctn_type,
1753 	&dev_attr_dst_offset,
1754 	&dev_attr_leap_seconds,
1755 	&dev_attr_stp_online,
1756 	&dev_attr_stratum,
1757 	&dev_attr_time_offset,
1758 	&dev_attr_time_zone_offset,
1759 	&dev_attr_timing_mode,
1760 	&dev_attr_timing_state,
1761 	NULL
1762 };
1763 
1764 static int __init stp_init_sysfs(void)
1765 {
1766 	struct device_attribute **attr;
1767 	int rc;
1768 
1769 	rc = subsys_system_register(&stp_subsys, NULL);
1770 	if (rc)
1771 		goto out;
1772 	for (attr = stp_attributes; *attr; attr++) {
1773 		rc = device_create_file(stp_subsys.dev_root, *attr);
1774 		if (rc)
1775 			goto out_unreg;
1776 	}
1777 	return 0;
1778 out_unreg:
1779 	for (; attr >= stp_attributes; attr--)
1780 		device_remove_file(stp_subsys.dev_root, *attr);
1781 	bus_unregister(&stp_subsys);
1782 out:
1783 	return rc;
1784 }
1785 
1786 device_initcall(stp_init_sysfs);
1787