xref: /linux/arch/s390/kernel/time.c (revision 8fa5723aa7e053d498336b48448b292fc2e0458b)
1 /*
2  *  arch/s390/kernel/time.c
3  *    Time of day based timer functions.
4  *
5  *  S390 version
6  *    Copyright IBM Corp. 1999, 2008
7  *    Author(s): Hartmut Penner (hp@de.ibm.com),
8  *               Martin Schwidefsky (schwidefsky@de.ibm.com),
9  *               Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
10  *
11  *  Derived from "arch/i386/kernel/time.c"
12  *    Copyright (C) 1991, 1992, 1995  Linus Torvalds
13  */
14 
15 #include <linux/errno.h>
16 #include <linux/module.h>
17 #include <linux/sched.h>
18 #include <linux/kernel.h>
19 #include <linux/param.h>
20 #include <linux/string.h>
21 #include <linux/mm.h>
22 #include <linux/interrupt.h>
23 #include <linux/time.h>
24 #include <linux/sysdev.h>
25 #include <linux/delay.h>
26 #include <linux/init.h>
27 #include <linux/smp.h>
28 #include <linux/types.h>
29 #include <linux/profile.h>
30 #include <linux/timex.h>
31 #include <linux/notifier.h>
32 #include <linux/clocksource.h>
33 #include <linux/clockchips.h>
34 #include <linux/bootmem.h>
35 #include <asm/uaccess.h>
36 #include <asm/delay.h>
37 #include <asm/s390_ext.h>
38 #include <asm/div64.h>
39 #include <asm/irq.h>
40 #include <asm/irq_regs.h>
41 #include <asm/timer.h>
42 #include <asm/etr.h>
43 #include <asm/cio.h>
44 
45 /* change this if you have some constant time drift */
46 #define USECS_PER_JIFFY     ((unsigned long) 1000000/HZ)
47 #define CLK_TICKS_PER_JIFFY ((unsigned long) USECS_PER_JIFFY << 12)
48 
49 /* The value of the TOD clock for 1.1.1970. */
50 #define TOD_UNIX_EPOCH 0x7d91048bca000000ULL
51 
52 /*
53  * Create a small time difference between the timer interrupts
54  * on the different cpus to avoid lock contention.
55  */
56 #define CPU_DEVIATION       (smp_processor_id() << 12)
57 
58 #define TICK_SIZE tick
59 
60 static ext_int_info_t ext_int_info_cc;
61 static ext_int_info_t ext_int_etr_cc;
62 static u64 jiffies_timer_cc;
63 
64 static DEFINE_PER_CPU(struct clock_event_device, comparators);
65 
66 /*
67  * Scheduler clock - returns current time in nanosec units.
68  */
69 unsigned long long sched_clock(void)
70 {
71 	return ((get_clock_xt() - jiffies_timer_cc) * 125) >> 9;
72 }
73 
74 /*
75  * Monotonic_clock - returns # of nanoseconds passed since time_init()
76  */
77 unsigned long long monotonic_clock(void)
78 {
79 	return sched_clock();
80 }
81 EXPORT_SYMBOL(monotonic_clock);
82 
83 void tod_to_timeval(__u64 todval, struct timespec *xtime)
84 {
85 	unsigned long long sec;
86 
87 	sec = todval >> 12;
88 	do_div(sec, 1000000);
89 	xtime->tv_sec = sec;
90 	todval -= (sec * 1000000) << 12;
91 	xtime->tv_nsec = ((todval * 1000) >> 12);
92 }
93 
94 #ifdef CONFIG_PROFILING
95 #define s390_do_profile()	profile_tick(CPU_PROFILING)
96 #else
97 #define s390_do_profile()	do { ; } while(0)
98 #endif /* CONFIG_PROFILING */
99 
100 void clock_comparator_work(void)
101 {
102 	struct clock_event_device *cd;
103 
104 	S390_lowcore.clock_comparator = -1ULL;
105 	set_clock_comparator(S390_lowcore.clock_comparator);
106 	cd = &__get_cpu_var(comparators);
107 	cd->event_handler(cd);
108 	s390_do_profile();
109 }
110 
111 /*
112  * Fixup the clock comparator.
113  */
114 static void fixup_clock_comparator(unsigned long long delta)
115 {
116 	/* If nobody is waiting there's nothing to fix. */
117 	if (S390_lowcore.clock_comparator == -1ULL)
118 		return;
119 	S390_lowcore.clock_comparator += delta;
120 	set_clock_comparator(S390_lowcore.clock_comparator);
121 }
122 
123 static int s390_next_event(unsigned long delta,
124 			   struct clock_event_device *evt)
125 {
126 	S390_lowcore.clock_comparator = get_clock() + delta;
127 	set_clock_comparator(S390_lowcore.clock_comparator);
128 	return 0;
129 }
130 
131 static void s390_set_mode(enum clock_event_mode mode,
132 			  struct clock_event_device *evt)
133 {
134 }
135 
136 /*
137  * Set up lowcore and control register of the current cpu to
138  * enable TOD clock and clock comparator interrupts.
139  */
140 void init_cpu_timer(void)
141 {
142 	struct clock_event_device *cd;
143 	int cpu;
144 
145 	S390_lowcore.clock_comparator = -1ULL;
146 	set_clock_comparator(S390_lowcore.clock_comparator);
147 
148 	cpu = smp_processor_id();
149 	cd = &per_cpu(comparators, cpu);
150 	cd->name		= "comparator";
151 	cd->features		= CLOCK_EVT_FEAT_ONESHOT;
152 	cd->mult		= 16777;
153 	cd->shift		= 12;
154 	cd->min_delta_ns	= 1;
155 	cd->max_delta_ns	= LONG_MAX;
156 	cd->rating		= 400;
157 	cd->cpumask		= cpumask_of_cpu(cpu);
158 	cd->set_next_event	= s390_next_event;
159 	cd->set_mode		= s390_set_mode;
160 
161 	clockevents_register_device(cd);
162 
163 	/* Enable clock comparator timer interrupt. */
164 	__ctl_set_bit(0,11);
165 
166 	/* Always allow the timing alert external interrupt. */
167 	__ctl_set_bit(0, 4);
168 }
169 
170 static void clock_comparator_interrupt(__u16 code)
171 {
172 	if (S390_lowcore.clock_comparator == -1ULL)
173 		set_clock_comparator(S390_lowcore.clock_comparator);
174 }
175 
176 static void etr_timing_alert(struct etr_irq_parm *);
177 static void stp_timing_alert(struct stp_irq_parm *);
178 
179 static void timing_alert_interrupt(__u16 code)
180 {
181 	if (S390_lowcore.ext_params & 0x00c40000)
182 		etr_timing_alert((struct etr_irq_parm *)
183 				 &S390_lowcore.ext_params);
184 	if (S390_lowcore.ext_params & 0x00038000)
185 		stp_timing_alert((struct stp_irq_parm *)
186 				 &S390_lowcore.ext_params);
187 }
188 
189 static void etr_reset(void);
190 static void stp_reset(void);
191 
192 /*
193  * Get the TOD clock running.
194  */
195 static u64 __init reset_tod_clock(void)
196 {
197 	u64 time;
198 
199 	etr_reset();
200 	stp_reset();
201 	if (store_clock(&time) == 0)
202 		return time;
203 	/* TOD clock not running. Set the clock to Unix Epoch. */
204 	if (set_clock(TOD_UNIX_EPOCH) != 0 || store_clock(&time) != 0)
205 		panic("TOD clock not operational.");
206 
207 	return TOD_UNIX_EPOCH;
208 }
209 
210 static cycle_t read_tod_clock(void)
211 {
212 	return get_clock();
213 }
214 
215 static struct clocksource clocksource_tod = {
216 	.name		= "tod",
217 	.rating		= 400,
218 	.read		= read_tod_clock,
219 	.mask		= -1ULL,
220 	.mult		= 1000,
221 	.shift		= 12,
222 	.flags		= CLOCK_SOURCE_IS_CONTINUOUS,
223 };
224 
225 
226 /*
227  * Initialize the TOD clock and the CPU timer of
228  * the boot cpu.
229  */
230 void __init time_init(void)
231 {
232 	u64 init_timer_cc;
233 
234 	init_timer_cc = reset_tod_clock();
235 	jiffies_timer_cc = init_timer_cc - jiffies_64 * CLK_TICKS_PER_JIFFY;
236 
237 	/* set xtime */
238 	tod_to_timeval(init_timer_cc - TOD_UNIX_EPOCH, &xtime);
239         set_normalized_timespec(&wall_to_monotonic,
240                                 -xtime.tv_sec, -xtime.tv_nsec);
241 
242 	/* request the clock comparator external interrupt */
243 	if (register_early_external_interrupt(0x1004,
244 					      clock_comparator_interrupt,
245 					      &ext_int_info_cc) != 0)
246                 panic("Couldn't request external interrupt 0x1004");
247 
248 	if (clocksource_register(&clocksource_tod) != 0)
249 		panic("Could not register TOD clock source");
250 
251 	/* request the timing alert external interrupt */
252 	if (register_early_external_interrupt(0x1406,
253 					      timing_alert_interrupt,
254 					      &ext_int_etr_cc) != 0)
255 		panic("Couldn't request external interrupt 0x1406");
256 
257 	/* Enable TOD clock interrupts on the boot cpu. */
258 	init_cpu_timer();
259 
260 #ifdef CONFIG_VIRT_TIMER
261 	vtime_init();
262 #endif
263 }
264 
265 /*
266  * The time is "clock". old is what we think the time is.
267  * Adjust the value by a multiple of jiffies and add the delta to ntp.
268  * "delay" is an approximation how long the synchronization took. If
269  * the time correction is positive, then "delay" is subtracted from
270  * the time difference and only the remaining part is passed to ntp.
271  */
272 static unsigned long long adjust_time(unsigned long long old,
273 				      unsigned long long clock,
274 				      unsigned long long delay)
275 {
276 	unsigned long long delta, ticks;
277 	struct timex adjust;
278 
279 	if (clock > old) {
280 		/* It is later than we thought. */
281 		delta = ticks = clock - old;
282 		delta = ticks = (delta < delay) ? 0 : delta - delay;
283 		delta -= do_div(ticks, CLK_TICKS_PER_JIFFY);
284 		adjust.offset = ticks * (1000000 / HZ);
285 	} else {
286 		/* It is earlier than we thought. */
287 		delta = ticks = old - clock;
288 		delta -= do_div(ticks, CLK_TICKS_PER_JIFFY);
289 		delta = -delta;
290 		adjust.offset = -ticks * (1000000 / HZ);
291 	}
292 	jiffies_timer_cc += delta;
293 	if (adjust.offset != 0) {
294 		printk(KERN_NOTICE "etr: time adjusted by %li micro-seconds\n",
295 		       adjust.offset);
296 		adjust.modes = ADJ_OFFSET_SINGLESHOT;
297 		do_adjtimex(&adjust);
298 	}
299 	return delta;
300 }
301 
302 static DEFINE_PER_CPU(atomic_t, clock_sync_word);
303 static unsigned long clock_sync_flags;
304 
305 #define CLOCK_SYNC_HAS_ETR	0
306 #define CLOCK_SYNC_HAS_STP	1
307 #define CLOCK_SYNC_ETR		2
308 #define CLOCK_SYNC_STP		3
309 
310 /*
311  * The synchronous get_clock function. It will write the current clock
312  * value to the clock pointer and return 0 if the clock is in sync with
313  * the external time source. If the clock mode is local it will return
314  * -ENOSYS and -EAGAIN if the clock is not in sync with the external
315  * reference.
316  */
317 int get_sync_clock(unsigned long long *clock)
318 {
319 	atomic_t *sw_ptr;
320 	unsigned int sw0, sw1;
321 
322 	sw_ptr = &get_cpu_var(clock_sync_word);
323 	sw0 = atomic_read(sw_ptr);
324 	*clock = get_clock();
325 	sw1 = atomic_read(sw_ptr);
326 	put_cpu_var(clock_sync_sync);
327 	if (sw0 == sw1 && (sw0 & 0x80000000U))
328 		/* Success: time is in sync. */
329 		return 0;
330 	if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags) &&
331 	    !test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
332 		return -ENOSYS;
333 	if (!test_bit(CLOCK_SYNC_ETR, &clock_sync_flags) &&
334 	    !test_bit(CLOCK_SYNC_STP, &clock_sync_flags))
335 		return -EACCES;
336 	return -EAGAIN;
337 }
338 EXPORT_SYMBOL(get_sync_clock);
339 
340 /*
341  * Make get_sync_clock return -EAGAIN.
342  */
343 static void disable_sync_clock(void *dummy)
344 {
345 	atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word);
346 	/*
347 	 * Clear the in-sync bit 2^31. All get_sync_clock calls will
348 	 * fail until the sync bit is turned back on. In addition
349 	 * increase the "sequence" counter to avoid the race of an
350 	 * etr event and the complete recovery against get_sync_clock.
351 	 */
352 	atomic_clear_mask(0x80000000, sw_ptr);
353 	atomic_inc(sw_ptr);
354 }
355 
356 /*
357  * Make get_sync_clock return 0 again.
358  * Needs to be called from a context disabled for preemption.
359  */
360 static void enable_sync_clock(void)
361 {
362 	atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word);
363 	atomic_set_mask(0x80000000, sw_ptr);
364 }
365 
366 /*
367  * External Time Reference (ETR) code.
368  */
369 static int etr_port0_online;
370 static int etr_port1_online;
371 static int etr_steai_available;
372 
373 static int __init early_parse_etr(char *p)
374 {
375 	if (strncmp(p, "off", 3) == 0)
376 		etr_port0_online = etr_port1_online = 0;
377 	else if (strncmp(p, "port0", 5) == 0)
378 		etr_port0_online = 1;
379 	else if (strncmp(p, "port1", 5) == 0)
380 		etr_port1_online = 1;
381 	else if (strncmp(p, "on", 2) == 0)
382 		etr_port0_online = etr_port1_online = 1;
383 	return 0;
384 }
385 early_param("etr", early_parse_etr);
386 
387 enum etr_event {
388 	ETR_EVENT_PORT0_CHANGE,
389 	ETR_EVENT_PORT1_CHANGE,
390 	ETR_EVENT_PORT_ALERT,
391 	ETR_EVENT_SYNC_CHECK,
392 	ETR_EVENT_SWITCH_LOCAL,
393 	ETR_EVENT_UPDATE,
394 };
395 
396 /*
397  * Valid bit combinations of the eacr register are (x = don't care):
398  * e0 e1 dp p0 p1 ea es sl
399  *  0  0  x  0	0  0  0  0  initial, disabled state
400  *  0  0  x  0	1  1  0  0  port 1 online
401  *  0  0  x  1	0  1  0  0  port 0 online
402  *  0  0  x  1	1  1  0  0  both ports online
403  *  0  1  x  0	1  1  0  0  port 1 online and usable, ETR or PPS mode
404  *  0  1  x  0	1  1  0  1  port 1 online, usable and ETR mode
405  *  0  1  x  0	1  1  1  0  port 1 online, usable, PPS mode, in-sync
406  *  0  1  x  0	1  1  1  1  port 1 online, usable, ETR mode, in-sync
407  *  0  1  x  1	1  1  0  0  both ports online, port 1 usable
408  *  0  1  x  1	1  1  1  0  both ports online, port 1 usable, PPS mode, in-sync
409  *  0  1  x  1	1  1  1  1  both ports online, port 1 usable, ETR mode, in-sync
410  *  1  0  x  1	0  1  0  0  port 0 online and usable, ETR or PPS mode
411  *  1  0  x  1	0  1  0  1  port 0 online, usable and ETR mode
412  *  1  0  x  1	0  1  1  0  port 0 online, usable, PPS mode, in-sync
413  *  1  0  x  1	0  1  1  1  port 0 online, usable, ETR mode, in-sync
414  *  1  0  x  1	1  1  0  0  both ports online, port 0 usable
415  *  1  0  x  1	1  1  1  0  both ports online, port 0 usable, PPS mode, in-sync
416  *  1  0  x  1	1  1  1  1  both ports online, port 0 usable, ETR mode, in-sync
417  *  1  1  x  1	1  1  1  0  both ports online & usable, ETR, in-sync
418  *  1  1  x  1	1  1  1  1  both ports online & usable, ETR, in-sync
419  */
420 static struct etr_eacr etr_eacr;
421 static u64 etr_tolec;			/* time of last eacr update */
422 static struct etr_aib etr_port0;
423 static int etr_port0_uptodate;
424 static struct etr_aib etr_port1;
425 static int etr_port1_uptodate;
426 static unsigned long etr_events;
427 static struct timer_list etr_timer;
428 
429 static void etr_timeout(unsigned long dummy);
430 static void etr_work_fn(struct work_struct *work);
431 static DECLARE_WORK(etr_work, etr_work_fn);
432 
433 /*
434  * Reset ETR attachment.
435  */
436 static void etr_reset(void)
437 {
438 	etr_eacr =  (struct etr_eacr) {
439 		.e0 = 0, .e1 = 0, ._pad0 = 4, .dp = 0,
440 		.p0 = 0, .p1 = 0, ._pad1 = 0, .ea = 0,
441 		.es = 0, .sl = 0 };
442 	if (etr_setr(&etr_eacr) == 0) {
443 		etr_tolec = get_clock();
444 		set_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags);
445 	} else if (etr_port0_online || etr_port1_online) {
446 		printk(KERN_WARNING "Running on non ETR capable "
447 		       "machine, only local mode available.\n");
448 		etr_port0_online = etr_port1_online = 0;
449 	}
450 }
451 
452 static int __init etr_init(void)
453 {
454 	struct etr_aib aib;
455 
456 	if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags))
457 		return 0;
458 	/* Check if this machine has the steai instruction. */
459 	if (etr_steai(&aib, ETR_STEAI_STEPPING_PORT) == 0)
460 		etr_steai_available = 1;
461 	setup_timer(&etr_timer, etr_timeout, 0UL);
462 	if (etr_port0_online) {
463 		set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
464 		schedule_work(&etr_work);
465 	}
466 	if (etr_port1_online) {
467 		set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
468 		schedule_work(&etr_work);
469 	}
470 	return 0;
471 }
472 
473 arch_initcall(etr_init);
474 
475 /*
476  * Two sorts of ETR machine checks. The architecture reads:
477  * "When a machine-check niterruption occurs and if a switch-to-local or
478  *  ETR-sync-check interrupt request is pending but disabled, this pending
479  *  disabled interruption request is indicated and is cleared".
480  * Which means that we can get etr_switch_to_local events from the machine
481  * check handler although the interruption condition is disabled. Lovely..
482  */
483 
484 /*
485  * Switch to local machine check. This is called when the last usable
486  * ETR port goes inactive. After switch to local the clock is not in sync.
487  */
488 void etr_switch_to_local(void)
489 {
490 	if (!etr_eacr.sl)
491 		return;
492 	if (test_bit(CLOCK_SYNC_ETR, &clock_sync_flags))
493 		disable_sync_clock(NULL);
494 	set_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events);
495 	schedule_work(&etr_work);
496 }
497 
498 /*
499  * ETR sync check machine check. This is called when the ETR OTE and the
500  * local clock OTE are farther apart than the ETR sync check tolerance.
501  * After a ETR sync check the clock is not in sync. The machine check
502  * is broadcasted to all cpus at the same time.
503  */
504 void etr_sync_check(void)
505 {
506 	if (!etr_eacr.es)
507 		return;
508 	if (test_bit(CLOCK_SYNC_ETR, &clock_sync_flags))
509 		disable_sync_clock(NULL);
510 	set_bit(ETR_EVENT_SYNC_CHECK, &etr_events);
511 	schedule_work(&etr_work);
512 }
513 
514 /*
515  * ETR timing alert. There are two causes:
516  * 1) port state change, check the usability of the port
517  * 2) port alert, one of the ETR-data-validity bits (v1-v2 bits of the
518  *    sldr-status word) or ETR-data word 1 (edf1) or ETR-data word 3 (edf3)
519  *    or ETR-data word 4 (edf4) has changed.
520  */
521 static void etr_timing_alert(struct etr_irq_parm *intparm)
522 {
523 	if (intparm->pc0)
524 		/* ETR port 0 state change. */
525 		set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
526 	if (intparm->pc1)
527 		/* ETR port 1 state change. */
528 		set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
529 	if (intparm->eai)
530 		/*
531 		 * ETR port alert on either port 0, 1 or both.
532 		 * Both ports are not up-to-date now.
533 		 */
534 		set_bit(ETR_EVENT_PORT_ALERT, &etr_events);
535 	schedule_work(&etr_work);
536 }
537 
538 static void etr_timeout(unsigned long dummy)
539 {
540 	set_bit(ETR_EVENT_UPDATE, &etr_events);
541 	schedule_work(&etr_work);
542 }
543 
544 /*
545  * Check if the etr mode is pss.
546  */
547 static inline int etr_mode_is_pps(struct etr_eacr eacr)
548 {
549 	return eacr.es && !eacr.sl;
550 }
551 
552 /*
553  * Check if the etr mode is etr.
554  */
555 static inline int etr_mode_is_etr(struct etr_eacr eacr)
556 {
557 	return eacr.es && eacr.sl;
558 }
559 
560 /*
561  * Check if the port can be used for TOD synchronization.
562  * For PPS mode the port has to receive OTEs. For ETR mode
563  * the port has to receive OTEs, the ETR stepping bit has to
564  * be zero and the validity bits for data frame 1, 2, and 3
565  * have to be 1.
566  */
567 static int etr_port_valid(struct etr_aib *aib, int port)
568 {
569 	unsigned int psc;
570 
571 	/* Check that this port is receiving OTEs. */
572 	if (aib->tsp == 0)
573 		return 0;
574 
575 	psc = port ? aib->esw.psc1 : aib->esw.psc0;
576 	if (psc == etr_lpsc_pps_mode)
577 		return 1;
578 	if (psc == etr_lpsc_operational_step)
579 		return !aib->esw.y && aib->slsw.v1 &&
580 			aib->slsw.v2 && aib->slsw.v3;
581 	return 0;
582 }
583 
584 /*
585  * Check if two ports are on the same network.
586  */
587 static int etr_compare_network(struct etr_aib *aib1, struct etr_aib *aib2)
588 {
589 	// FIXME: any other fields we have to compare?
590 	return aib1->edf1.net_id == aib2->edf1.net_id;
591 }
592 
593 /*
594  * Wrapper for etr_stei that converts physical port states
595  * to logical port states to be consistent with the output
596  * of stetr (see etr_psc vs. etr_lpsc).
597  */
598 static void etr_steai_cv(struct etr_aib *aib, unsigned int func)
599 {
600 	BUG_ON(etr_steai(aib, func) != 0);
601 	/* Convert port state to logical port state. */
602 	if (aib->esw.psc0 == 1)
603 		aib->esw.psc0 = 2;
604 	else if (aib->esw.psc0 == 0 && aib->esw.p == 0)
605 		aib->esw.psc0 = 1;
606 	if (aib->esw.psc1 == 1)
607 		aib->esw.psc1 = 2;
608 	else if (aib->esw.psc1 == 0 && aib->esw.p == 1)
609 		aib->esw.psc1 = 1;
610 }
611 
612 /*
613  * Check if the aib a2 is still connected to the same attachment as
614  * aib a1, the etv values differ by one and a2 is valid.
615  */
616 static int etr_aib_follows(struct etr_aib *a1, struct etr_aib *a2, int p)
617 {
618 	int state_a1, state_a2;
619 
620 	/* Paranoia check: e0/e1 should better be the same. */
621 	if (a1->esw.eacr.e0 != a2->esw.eacr.e0 ||
622 	    a1->esw.eacr.e1 != a2->esw.eacr.e1)
623 		return 0;
624 
625 	/* Still connected to the same etr ? */
626 	state_a1 = p ? a1->esw.psc1 : a1->esw.psc0;
627 	state_a2 = p ? a2->esw.psc1 : a2->esw.psc0;
628 	if (state_a1 == etr_lpsc_operational_step) {
629 		if (state_a2 != etr_lpsc_operational_step ||
630 		    a1->edf1.net_id != a2->edf1.net_id ||
631 		    a1->edf1.etr_id != a2->edf1.etr_id ||
632 		    a1->edf1.etr_pn != a2->edf1.etr_pn)
633 			return 0;
634 	} else if (state_a2 != etr_lpsc_pps_mode)
635 		return 0;
636 
637 	/* The ETV value of a2 needs to be ETV of a1 + 1. */
638 	if (a1->edf2.etv + 1 != a2->edf2.etv)
639 		return 0;
640 
641 	if (!etr_port_valid(a2, p))
642 		return 0;
643 
644 	return 1;
645 }
646 
647 struct clock_sync_data {
648 	int in_sync;
649 	unsigned long long fixup_cc;
650 };
651 
652 static void clock_sync_cpu_start(void *dummy)
653 {
654 	struct clock_sync_data *sync = dummy;
655 
656 	enable_sync_clock();
657 	/*
658 	 * This looks like a busy wait loop but it isn't. etr_sync_cpus
659 	 * is called on all other cpus while the TOD clocks is stopped.
660 	 * __udelay will stop the cpu on an enabled wait psw until the
661 	 * TOD is running again.
662 	 */
663 	while (sync->in_sync == 0) {
664 		__udelay(1);
665 		/*
666 		 * A different cpu changes *in_sync. Therefore use
667 		 * barrier() to force memory access.
668 		 */
669 		barrier();
670 	}
671 	if (sync->in_sync != 1)
672 		/* Didn't work. Clear per-cpu in sync bit again. */
673 		disable_sync_clock(NULL);
674 	/*
675 	 * This round of TOD syncing is done. Set the clock comparator
676 	 * to the next tick and let the processor continue.
677 	 */
678 	fixup_clock_comparator(sync->fixup_cc);
679 }
680 
681 static void clock_sync_cpu_end(void *dummy)
682 {
683 }
684 
685 /*
686  * Sync the TOD clock using the port refered to by aibp. This port
687  * has to be enabled and the other port has to be disabled. The
688  * last eacr update has to be more than 1.6 seconds in the past.
689  */
690 static int etr_sync_clock(struct etr_aib *aib, int port)
691 {
692 	struct etr_aib *sync_port;
693 	struct clock_sync_data etr_sync;
694 	unsigned long long clock, old_clock, delay, delta;
695 	int follows;
696 	int rc;
697 
698 	/* Check if the current aib is adjacent to the sync port aib. */
699 	sync_port = (port == 0) ? &etr_port0 : &etr_port1;
700 	follows = etr_aib_follows(sync_port, aib, port);
701 	memcpy(sync_port, aib, sizeof(*aib));
702 	if (!follows)
703 		return -EAGAIN;
704 
705 	/*
706 	 * Catch all other cpus and make them wait until we have
707 	 * successfully synced the clock. smp_call_function will
708 	 * return after all other cpus are in etr_sync_cpu_start.
709 	 */
710 	memset(&etr_sync, 0, sizeof(etr_sync));
711 	preempt_disable();
712 	smp_call_function(clock_sync_cpu_start, &etr_sync, 0);
713 	local_irq_disable();
714 	enable_sync_clock();
715 
716 	/* Set clock to next OTE. */
717 	__ctl_set_bit(14, 21);
718 	__ctl_set_bit(0, 29);
719 	clock = ((unsigned long long) (aib->edf2.etv + 1)) << 32;
720 	old_clock = get_clock();
721 	if (set_clock(clock) == 0) {
722 		__udelay(1);	/* Wait for the clock to start. */
723 		__ctl_clear_bit(0, 29);
724 		__ctl_clear_bit(14, 21);
725 		etr_stetr(aib);
726 		/* Adjust Linux timing variables. */
727 		delay = (unsigned long long)
728 			(aib->edf2.etv - sync_port->edf2.etv) << 32;
729 		delta = adjust_time(old_clock, clock, delay);
730 		etr_sync.fixup_cc = delta;
731 		fixup_clock_comparator(delta);
732 		/* Verify that the clock is properly set. */
733 		if (!etr_aib_follows(sync_port, aib, port)) {
734 			/* Didn't work. */
735 			disable_sync_clock(NULL);
736 			etr_sync.in_sync = -EAGAIN;
737 			rc = -EAGAIN;
738 		} else {
739 			etr_sync.in_sync = 1;
740 			rc = 0;
741 		}
742 	} else {
743 		/* Could not set the clock ?!? */
744 		__ctl_clear_bit(0, 29);
745 		__ctl_clear_bit(14, 21);
746 		disable_sync_clock(NULL);
747 		etr_sync.in_sync = -EAGAIN;
748 		rc = -EAGAIN;
749 	}
750 	local_irq_enable();
751 	smp_call_function(clock_sync_cpu_end, NULL, 0);
752 	preempt_enable();
753 	return rc;
754 }
755 
756 /*
757  * Handle the immediate effects of the different events.
758  * The port change event is used for online/offline changes.
759  */
760 static struct etr_eacr etr_handle_events(struct etr_eacr eacr)
761 {
762 	if (test_and_clear_bit(ETR_EVENT_SYNC_CHECK, &etr_events))
763 		eacr.es = 0;
764 	if (test_and_clear_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events))
765 		eacr.es = eacr.sl = 0;
766 	if (test_and_clear_bit(ETR_EVENT_PORT_ALERT, &etr_events))
767 		etr_port0_uptodate = etr_port1_uptodate = 0;
768 
769 	if (test_and_clear_bit(ETR_EVENT_PORT0_CHANGE, &etr_events)) {
770 		if (eacr.e0)
771 			/*
772 			 * Port change of an enabled port. We have to
773 			 * assume that this can have caused an stepping
774 			 * port switch.
775 			 */
776 			etr_tolec = get_clock();
777 		eacr.p0 = etr_port0_online;
778 		if (!eacr.p0)
779 			eacr.e0 = 0;
780 		etr_port0_uptodate = 0;
781 	}
782 	if (test_and_clear_bit(ETR_EVENT_PORT1_CHANGE, &etr_events)) {
783 		if (eacr.e1)
784 			/*
785 			 * Port change of an enabled port. We have to
786 			 * assume that this can have caused an stepping
787 			 * port switch.
788 			 */
789 			etr_tolec = get_clock();
790 		eacr.p1 = etr_port1_online;
791 		if (!eacr.p1)
792 			eacr.e1 = 0;
793 		etr_port1_uptodate = 0;
794 	}
795 	clear_bit(ETR_EVENT_UPDATE, &etr_events);
796 	return eacr;
797 }
798 
799 /*
800  * Set up a timer that expires after the etr_tolec + 1.6 seconds if
801  * one of the ports needs an update.
802  */
803 static void etr_set_tolec_timeout(unsigned long long now)
804 {
805 	unsigned long micros;
806 
807 	if ((!etr_eacr.p0 || etr_port0_uptodate) &&
808 	    (!etr_eacr.p1 || etr_port1_uptodate))
809 		return;
810 	micros = (now > etr_tolec) ? ((now - etr_tolec) >> 12) : 0;
811 	micros = (micros > 1600000) ? 0 : 1600000 - micros;
812 	mod_timer(&etr_timer, jiffies + (micros * HZ) / 1000000 + 1);
813 }
814 
815 /*
816  * Set up a time that expires after 1/2 second.
817  */
818 static void etr_set_sync_timeout(void)
819 {
820 	mod_timer(&etr_timer, jiffies + HZ/2);
821 }
822 
823 /*
824  * Update the aib information for one or both ports.
825  */
826 static struct etr_eacr etr_handle_update(struct etr_aib *aib,
827 					 struct etr_eacr eacr)
828 {
829 	/* With both ports disabled the aib information is useless. */
830 	if (!eacr.e0 && !eacr.e1)
831 		return eacr;
832 
833 	/* Update port0 or port1 with aib stored in etr_work_fn. */
834 	if (aib->esw.q == 0) {
835 		/* Information for port 0 stored. */
836 		if (eacr.p0 && !etr_port0_uptodate) {
837 			etr_port0 = *aib;
838 			if (etr_port0_online)
839 				etr_port0_uptodate = 1;
840 		}
841 	} else {
842 		/* Information for port 1 stored. */
843 		if (eacr.p1 && !etr_port1_uptodate) {
844 			etr_port1 = *aib;
845 			if (etr_port0_online)
846 				etr_port1_uptodate = 1;
847 		}
848 	}
849 
850 	/*
851 	 * Do not try to get the alternate port aib if the clock
852 	 * is not in sync yet.
853 	 */
854 	if (!test_bit(CLOCK_SYNC_STP, &clock_sync_flags) && !eacr.es)
855 		return eacr;
856 
857 	/*
858 	 * If steai is available we can get the information about
859 	 * the other port immediately. If only stetr is available the
860 	 * data-port bit toggle has to be used.
861 	 */
862 	if (etr_steai_available) {
863 		if (eacr.p0 && !etr_port0_uptodate) {
864 			etr_steai_cv(&etr_port0, ETR_STEAI_PORT_0);
865 			etr_port0_uptodate = 1;
866 		}
867 		if (eacr.p1 && !etr_port1_uptodate) {
868 			etr_steai_cv(&etr_port1, ETR_STEAI_PORT_1);
869 			etr_port1_uptodate = 1;
870 		}
871 	} else {
872 		/*
873 		 * One port was updated above, if the other
874 		 * port is not uptodate toggle dp bit.
875 		 */
876 		if ((eacr.p0 && !etr_port0_uptodate) ||
877 		    (eacr.p1 && !etr_port1_uptodate))
878 			eacr.dp ^= 1;
879 		else
880 			eacr.dp = 0;
881 	}
882 	return eacr;
883 }
884 
885 /*
886  * Write new etr control register if it differs from the current one.
887  * Return 1 if etr_tolec has been updated as well.
888  */
889 static void etr_update_eacr(struct etr_eacr eacr)
890 {
891 	int dp_changed;
892 
893 	if (memcmp(&etr_eacr, &eacr, sizeof(eacr)) == 0)
894 		/* No change, return. */
895 		return;
896 	/*
897 	 * The disable of an active port of the change of the data port
898 	 * bit can/will cause a change in the data port.
899 	 */
900 	dp_changed = etr_eacr.e0 > eacr.e0 || etr_eacr.e1 > eacr.e1 ||
901 		(etr_eacr.dp ^ eacr.dp) != 0;
902 	etr_eacr = eacr;
903 	etr_setr(&etr_eacr);
904 	if (dp_changed)
905 		etr_tolec = get_clock();
906 }
907 
908 /*
909  * ETR tasklet. In this function you'll find the main logic. In
910  * particular this is the only function that calls etr_update_eacr(),
911  * it "controls" the etr control register.
912  */
913 static void etr_work_fn(struct work_struct *work)
914 {
915 	unsigned long long now;
916 	struct etr_eacr eacr;
917 	struct etr_aib aib;
918 	int sync_port;
919 
920 	/* Create working copy of etr_eacr. */
921 	eacr = etr_eacr;
922 
923 	/* Check for the different events and their immediate effects. */
924 	eacr = etr_handle_events(eacr);
925 
926 	/* Check if ETR is supposed to be active. */
927 	eacr.ea = eacr.p0 || eacr.p1;
928 	if (!eacr.ea) {
929 		/* Both ports offline. Reset everything. */
930 		eacr.dp = eacr.es = eacr.sl = 0;
931 		on_each_cpu(disable_sync_clock, NULL, 1);
932 		del_timer_sync(&etr_timer);
933 		etr_update_eacr(eacr);
934 		clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
935 		return;
936 	}
937 
938 	/* Store aib to get the current ETR status word. */
939 	BUG_ON(etr_stetr(&aib) != 0);
940 	etr_port0.esw = etr_port1.esw = aib.esw;	/* Copy status word. */
941 	now = get_clock();
942 
943 	/*
944 	 * Update the port information if the last stepping port change
945 	 * or data port change is older than 1.6 seconds.
946 	 */
947 	if (now >= etr_tolec + (1600000 << 12))
948 		eacr = etr_handle_update(&aib, eacr);
949 
950 	/*
951 	 * Select ports to enable. The prefered synchronization mode is PPS.
952 	 * If a port can be enabled depends on a number of things:
953 	 * 1) The port needs to be online and uptodate. A port is not
954 	 *    disabled just because it is not uptodate, but it is only
955 	 *    enabled if it is uptodate.
956 	 * 2) The port needs to have the same mode (pps / etr).
957 	 * 3) The port needs to be usable -> etr_port_valid() == 1
958 	 * 4) To enable the second port the clock needs to be in sync.
959 	 * 5) If both ports are useable and are ETR ports, the network id
960 	 *    has to be the same.
961 	 * The eacr.sl bit is used to indicate etr mode vs. pps mode.
962 	 */
963 	if (eacr.p0 && aib.esw.psc0 == etr_lpsc_pps_mode) {
964 		eacr.sl = 0;
965 		eacr.e0 = 1;
966 		if (!etr_mode_is_pps(etr_eacr))
967 			eacr.es = 0;
968 		if (!eacr.es || !eacr.p1 || aib.esw.psc1 != etr_lpsc_pps_mode)
969 			eacr.e1 = 0;
970 		// FIXME: uptodate checks ?
971 		else if (etr_port0_uptodate && etr_port1_uptodate)
972 			eacr.e1 = 1;
973 		sync_port = (etr_port0_uptodate &&
974 			     etr_port_valid(&etr_port0, 0)) ? 0 : -1;
975 	} else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_pps_mode) {
976 		eacr.sl = 0;
977 		eacr.e0 = 0;
978 		eacr.e1 = 1;
979 		if (!etr_mode_is_pps(etr_eacr))
980 			eacr.es = 0;
981 		sync_port = (etr_port1_uptodate &&
982 			     etr_port_valid(&etr_port1, 1)) ? 1 : -1;
983 	} else if (eacr.p0 && aib.esw.psc0 == etr_lpsc_operational_step) {
984 		eacr.sl = 1;
985 		eacr.e0 = 1;
986 		if (!etr_mode_is_etr(etr_eacr))
987 			eacr.es = 0;
988 		if (!eacr.es || !eacr.p1 ||
989 		    aib.esw.psc1 != etr_lpsc_operational_alt)
990 			eacr.e1 = 0;
991 		else if (etr_port0_uptodate && etr_port1_uptodate &&
992 			 etr_compare_network(&etr_port0, &etr_port1))
993 			eacr.e1 = 1;
994 		sync_port = (etr_port0_uptodate &&
995 			     etr_port_valid(&etr_port0, 0)) ? 0 : -1;
996 	} else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_operational_step) {
997 		eacr.sl = 1;
998 		eacr.e0 = 0;
999 		eacr.e1 = 1;
1000 		if (!etr_mode_is_etr(etr_eacr))
1001 			eacr.es = 0;
1002 		sync_port = (etr_port1_uptodate &&
1003 			     etr_port_valid(&etr_port1, 1)) ? 1 : -1;
1004 	} else {
1005 		/* Both ports not usable. */
1006 		eacr.es = eacr.sl = 0;
1007 		sync_port = -1;
1008 		clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
1009 	}
1010 
1011 	if (!test_bit(CLOCK_SYNC_ETR, &clock_sync_flags))
1012 		eacr.es = 0;
1013 
1014 	/*
1015 	 * If the clock is in sync just update the eacr and return.
1016 	 * If there is no valid sync port wait for a port update.
1017 	 */
1018 	if (test_bit(CLOCK_SYNC_STP, &clock_sync_flags) ||
1019 	    eacr.es || sync_port < 0) {
1020 		etr_update_eacr(eacr);
1021 		etr_set_tolec_timeout(now);
1022 		return;
1023 	}
1024 
1025 	/*
1026 	 * Prepare control register for clock syncing
1027 	 * (reset data port bit, set sync check control.
1028 	 */
1029 	eacr.dp = 0;
1030 	eacr.es = 1;
1031 
1032 	/*
1033 	 * Update eacr and try to synchronize the clock. If the update
1034 	 * of eacr caused a stepping port switch (or if we have to
1035 	 * assume that a stepping port switch has occured) or the
1036 	 * clock syncing failed, reset the sync check control bit
1037 	 * and set up a timer to try again after 0.5 seconds
1038 	 */
1039 	etr_update_eacr(eacr);
1040 	set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
1041 	if (now < etr_tolec + (1600000 << 12) ||
1042 	    etr_sync_clock(&aib, sync_port) != 0) {
1043 		/* Sync failed. Try again in 1/2 second. */
1044 		eacr.es = 0;
1045 		etr_update_eacr(eacr);
1046 		clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
1047 		etr_set_sync_timeout();
1048 	} else
1049 		etr_set_tolec_timeout(now);
1050 }
1051 
1052 /*
1053  * Sysfs interface functions
1054  */
1055 static struct sysdev_class etr_sysclass = {
1056 	.name	= "etr",
1057 };
1058 
1059 static struct sys_device etr_port0_dev = {
1060 	.id	= 0,
1061 	.cls	= &etr_sysclass,
1062 };
1063 
1064 static struct sys_device etr_port1_dev = {
1065 	.id	= 1,
1066 	.cls	= &etr_sysclass,
1067 };
1068 
1069 /*
1070  * ETR class attributes
1071  */
1072 static ssize_t etr_stepping_port_show(struct sysdev_class *class, char *buf)
1073 {
1074 	return sprintf(buf, "%i\n", etr_port0.esw.p);
1075 }
1076 
1077 static SYSDEV_CLASS_ATTR(stepping_port, 0400, etr_stepping_port_show, NULL);
1078 
1079 static ssize_t etr_stepping_mode_show(struct sysdev_class *class, char *buf)
1080 {
1081 	char *mode_str;
1082 
1083 	if (etr_mode_is_pps(etr_eacr))
1084 		mode_str = "pps";
1085 	else if (etr_mode_is_etr(etr_eacr))
1086 		mode_str = "etr";
1087 	else
1088 		mode_str = "local";
1089 	return sprintf(buf, "%s\n", mode_str);
1090 }
1091 
1092 static SYSDEV_CLASS_ATTR(stepping_mode, 0400, etr_stepping_mode_show, NULL);
1093 
1094 /*
1095  * ETR port attributes
1096  */
1097 static inline struct etr_aib *etr_aib_from_dev(struct sys_device *dev)
1098 {
1099 	if (dev == &etr_port0_dev)
1100 		return etr_port0_online ? &etr_port0 : NULL;
1101 	else
1102 		return etr_port1_online ? &etr_port1 : NULL;
1103 }
1104 
1105 static ssize_t etr_online_show(struct sys_device *dev,
1106 				struct sysdev_attribute *attr,
1107 				char *buf)
1108 {
1109 	unsigned int online;
1110 
1111 	online = (dev == &etr_port0_dev) ? etr_port0_online : etr_port1_online;
1112 	return sprintf(buf, "%i\n", online);
1113 }
1114 
1115 static ssize_t etr_online_store(struct sys_device *dev,
1116 				struct sysdev_attribute *attr,
1117 				const char *buf, size_t count)
1118 {
1119 	unsigned int value;
1120 
1121 	value = simple_strtoul(buf, NULL, 0);
1122 	if (value != 0 && value != 1)
1123 		return -EINVAL;
1124 	if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags))
1125 		return -EOPNOTSUPP;
1126 	if (dev == &etr_port0_dev) {
1127 		if (etr_port0_online == value)
1128 			return count;	/* Nothing to do. */
1129 		etr_port0_online = value;
1130 		set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
1131 		schedule_work(&etr_work);
1132 	} else {
1133 		if (etr_port1_online == value)
1134 			return count;	/* Nothing to do. */
1135 		etr_port1_online = value;
1136 		set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
1137 		schedule_work(&etr_work);
1138 	}
1139 	return count;
1140 }
1141 
1142 static SYSDEV_ATTR(online, 0600, etr_online_show, etr_online_store);
1143 
1144 static ssize_t etr_stepping_control_show(struct sys_device *dev,
1145 					struct sysdev_attribute *attr,
1146 					char *buf)
1147 {
1148 	return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ?
1149 		       etr_eacr.e0 : etr_eacr.e1);
1150 }
1151 
1152 static SYSDEV_ATTR(stepping_control, 0400, etr_stepping_control_show, NULL);
1153 
1154 static ssize_t etr_mode_code_show(struct sys_device *dev,
1155 				struct sysdev_attribute *attr, char *buf)
1156 {
1157 	if (!etr_port0_online && !etr_port1_online)
1158 		/* Status word is not uptodate if both ports are offline. */
1159 		return -ENODATA;
1160 	return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ?
1161 		       etr_port0.esw.psc0 : etr_port0.esw.psc1);
1162 }
1163 
1164 static SYSDEV_ATTR(state_code, 0400, etr_mode_code_show, NULL);
1165 
1166 static ssize_t etr_untuned_show(struct sys_device *dev,
1167 				struct sysdev_attribute *attr, char *buf)
1168 {
1169 	struct etr_aib *aib = etr_aib_from_dev(dev);
1170 
1171 	if (!aib || !aib->slsw.v1)
1172 		return -ENODATA;
1173 	return sprintf(buf, "%i\n", aib->edf1.u);
1174 }
1175 
1176 static SYSDEV_ATTR(untuned, 0400, etr_untuned_show, NULL);
1177 
1178 static ssize_t etr_network_id_show(struct sys_device *dev,
1179 				struct sysdev_attribute *attr, char *buf)
1180 {
1181 	struct etr_aib *aib = etr_aib_from_dev(dev);
1182 
1183 	if (!aib || !aib->slsw.v1)
1184 		return -ENODATA;
1185 	return sprintf(buf, "%i\n", aib->edf1.net_id);
1186 }
1187 
1188 static SYSDEV_ATTR(network, 0400, etr_network_id_show, NULL);
1189 
1190 static ssize_t etr_id_show(struct sys_device *dev,
1191 			struct sysdev_attribute *attr, char *buf)
1192 {
1193 	struct etr_aib *aib = etr_aib_from_dev(dev);
1194 
1195 	if (!aib || !aib->slsw.v1)
1196 		return -ENODATA;
1197 	return sprintf(buf, "%i\n", aib->edf1.etr_id);
1198 }
1199 
1200 static SYSDEV_ATTR(id, 0400, etr_id_show, NULL);
1201 
1202 static ssize_t etr_port_number_show(struct sys_device *dev,
1203 			struct sysdev_attribute *attr, char *buf)
1204 {
1205 	struct etr_aib *aib = etr_aib_from_dev(dev);
1206 
1207 	if (!aib || !aib->slsw.v1)
1208 		return -ENODATA;
1209 	return sprintf(buf, "%i\n", aib->edf1.etr_pn);
1210 }
1211 
1212 static SYSDEV_ATTR(port, 0400, etr_port_number_show, NULL);
1213 
1214 static ssize_t etr_coupled_show(struct sys_device *dev,
1215 			struct sysdev_attribute *attr, char *buf)
1216 {
1217 	struct etr_aib *aib = etr_aib_from_dev(dev);
1218 
1219 	if (!aib || !aib->slsw.v3)
1220 		return -ENODATA;
1221 	return sprintf(buf, "%i\n", aib->edf3.c);
1222 }
1223 
1224 static SYSDEV_ATTR(coupled, 0400, etr_coupled_show, NULL);
1225 
1226 static ssize_t etr_local_time_show(struct sys_device *dev,
1227 			struct sysdev_attribute *attr, char *buf)
1228 {
1229 	struct etr_aib *aib = etr_aib_from_dev(dev);
1230 
1231 	if (!aib || !aib->slsw.v3)
1232 		return -ENODATA;
1233 	return sprintf(buf, "%i\n", aib->edf3.blto);
1234 }
1235 
1236 static SYSDEV_ATTR(local_time, 0400, etr_local_time_show, NULL);
1237 
1238 static ssize_t etr_utc_offset_show(struct sys_device *dev,
1239 			struct sysdev_attribute *attr, char *buf)
1240 {
1241 	struct etr_aib *aib = etr_aib_from_dev(dev);
1242 
1243 	if (!aib || !aib->slsw.v3)
1244 		return -ENODATA;
1245 	return sprintf(buf, "%i\n", aib->edf3.buo);
1246 }
1247 
1248 static SYSDEV_ATTR(utc_offset, 0400, etr_utc_offset_show, NULL);
1249 
1250 static struct sysdev_attribute *etr_port_attributes[] = {
1251 	&attr_online,
1252 	&attr_stepping_control,
1253 	&attr_state_code,
1254 	&attr_untuned,
1255 	&attr_network,
1256 	&attr_id,
1257 	&attr_port,
1258 	&attr_coupled,
1259 	&attr_local_time,
1260 	&attr_utc_offset,
1261 	NULL
1262 };
1263 
1264 static int __init etr_register_port(struct sys_device *dev)
1265 {
1266 	struct sysdev_attribute **attr;
1267 	int rc;
1268 
1269 	rc = sysdev_register(dev);
1270 	if (rc)
1271 		goto out;
1272 	for (attr = etr_port_attributes; *attr; attr++) {
1273 		rc = sysdev_create_file(dev, *attr);
1274 		if (rc)
1275 			goto out_unreg;
1276 	}
1277 	return 0;
1278 out_unreg:
1279 	for (; attr >= etr_port_attributes; attr--)
1280 		sysdev_remove_file(dev, *attr);
1281 	sysdev_unregister(dev);
1282 out:
1283 	return rc;
1284 }
1285 
1286 static void __init etr_unregister_port(struct sys_device *dev)
1287 {
1288 	struct sysdev_attribute **attr;
1289 
1290 	for (attr = etr_port_attributes; *attr; attr++)
1291 		sysdev_remove_file(dev, *attr);
1292 	sysdev_unregister(dev);
1293 }
1294 
1295 static int __init etr_init_sysfs(void)
1296 {
1297 	int rc;
1298 
1299 	rc = sysdev_class_register(&etr_sysclass);
1300 	if (rc)
1301 		goto out;
1302 	rc = sysdev_class_create_file(&etr_sysclass, &attr_stepping_port);
1303 	if (rc)
1304 		goto out_unreg_class;
1305 	rc = sysdev_class_create_file(&etr_sysclass, &attr_stepping_mode);
1306 	if (rc)
1307 		goto out_remove_stepping_port;
1308 	rc = etr_register_port(&etr_port0_dev);
1309 	if (rc)
1310 		goto out_remove_stepping_mode;
1311 	rc = etr_register_port(&etr_port1_dev);
1312 	if (rc)
1313 		goto out_remove_port0;
1314 	return 0;
1315 
1316 out_remove_port0:
1317 	etr_unregister_port(&etr_port0_dev);
1318 out_remove_stepping_mode:
1319 	sysdev_class_remove_file(&etr_sysclass, &attr_stepping_mode);
1320 out_remove_stepping_port:
1321 	sysdev_class_remove_file(&etr_sysclass, &attr_stepping_port);
1322 out_unreg_class:
1323 	sysdev_class_unregister(&etr_sysclass);
1324 out:
1325 	return rc;
1326 }
1327 
1328 device_initcall(etr_init_sysfs);
1329 
1330 /*
1331  * Server Time Protocol (STP) code.
1332  */
1333 static int stp_online;
1334 static struct stp_sstpi stp_info;
1335 static void *stp_page;
1336 
1337 static void stp_work_fn(struct work_struct *work);
1338 static DECLARE_WORK(stp_work, stp_work_fn);
1339 
1340 static int __init early_parse_stp(char *p)
1341 {
1342 	if (strncmp(p, "off", 3) == 0)
1343 		stp_online = 0;
1344 	else if (strncmp(p, "on", 2) == 0)
1345 		stp_online = 1;
1346 	return 0;
1347 }
1348 early_param("stp", early_parse_stp);
1349 
1350 /*
1351  * Reset STP attachment.
1352  */
1353 static void __init stp_reset(void)
1354 {
1355 	int rc;
1356 
1357 	stp_page = alloc_bootmem_pages(PAGE_SIZE);
1358 	rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000);
1359 	if (rc == 0)
1360 		set_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags);
1361 	else if (stp_online) {
1362 		printk(KERN_WARNING "Running on non STP capable machine.\n");
1363 		free_bootmem((unsigned long) stp_page, PAGE_SIZE);
1364 		stp_page = NULL;
1365 		stp_online = 0;
1366 	}
1367 }
1368 
1369 static int __init stp_init(void)
1370 {
1371 	if (test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags) && stp_online)
1372 		schedule_work(&stp_work);
1373 	return 0;
1374 }
1375 
1376 arch_initcall(stp_init);
1377 
1378 /*
1379  * STP timing alert. There are three causes:
1380  * 1) timing status change
1381  * 2) link availability change
1382  * 3) time control parameter change
1383  * In all three cases we are only interested in the clock source state.
1384  * If a STP clock source is now available use it.
1385  */
1386 static void stp_timing_alert(struct stp_irq_parm *intparm)
1387 {
1388 	if (intparm->tsc || intparm->lac || intparm->tcpc)
1389 		schedule_work(&stp_work);
1390 }
1391 
1392 /*
1393  * STP sync check machine check. This is called when the timing state
1394  * changes from the synchronized state to the unsynchronized state.
1395  * After a STP sync check the clock is not in sync. The machine check
1396  * is broadcasted to all cpus at the same time.
1397  */
1398 void stp_sync_check(void)
1399 {
1400 	if (!test_bit(CLOCK_SYNC_STP, &clock_sync_flags))
1401 		return;
1402 	disable_sync_clock(NULL);
1403 	schedule_work(&stp_work);
1404 }
1405 
1406 /*
1407  * STP island condition machine check. This is called when an attached
1408  * server  attempts to communicate over an STP link and the servers
1409  * have matching CTN ids and have a valid stratum-1 configuration
1410  * but the configurations do not match.
1411  */
1412 void stp_island_check(void)
1413 {
1414 	if (!test_bit(CLOCK_SYNC_STP, &clock_sync_flags))
1415 		return;
1416 	disable_sync_clock(NULL);
1417 	schedule_work(&stp_work);
1418 }
1419 
1420 /*
1421  * STP tasklet. Check for the STP state and take over the clock
1422  * synchronization if the STP clock source is usable.
1423  */
1424 static void stp_work_fn(struct work_struct *work)
1425 {
1426 	struct clock_sync_data stp_sync;
1427 	unsigned long long old_clock, delta;
1428 	int rc;
1429 
1430 	if (!stp_online) {
1431 		chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000);
1432 		return;
1433 	}
1434 
1435 	rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0xb0e0);
1436 	if (rc)
1437 		return;
1438 
1439 	rc = chsc_sstpi(stp_page, &stp_info, sizeof(struct stp_sstpi));
1440 	if (rc || stp_info.c == 0)
1441 		return;
1442 
1443 	/*
1444 	 * Catch all other cpus and make them wait until we have
1445 	 * successfully synced the clock. smp_call_function will
1446 	 * return after all other cpus are in clock_sync_cpu_start.
1447 	 */
1448 	memset(&stp_sync, 0, sizeof(stp_sync));
1449 	preempt_disable();
1450 	smp_call_function(clock_sync_cpu_start, &stp_sync, 0);
1451 	local_irq_disable();
1452 	enable_sync_clock();
1453 
1454 	set_bit(CLOCK_SYNC_STP, &clock_sync_flags);
1455 	if (test_and_clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags))
1456 		schedule_work(&etr_work);
1457 
1458 	rc = 0;
1459 	if (stp_info.todoff[0] || stp_info.todoff[1] ||
1460 	    stp_info.todoff[2] || stp_info.todoff[3] ||
1461 	    stp_info.tmd != 2) {
1462 		old_clock = get_clock();
1463 		rc = chsc_sstpc(stp_page, STP_OP_SYNC, 0);
1464 		if (rc == 0) {
1465 			delta = adjust_time(old_clock, get_clock(), 0);
1466 			fixup_clock_comparator(delta);
1467 			rc = chsc_sstpi(stp_page, &stp_info,
1468 					sizeof(struct stp_sstpi));
1469 			if (rc == 0 && stp_info.tmd != 2)
1470 				rc = -EAGAIN;
1471 		}
1472 	}
1473 	if (rc) {
1474 		disable_sync_clock(NULL);
1475 		stp_sync.in_sync = -EAGAIN;
1476 		clear_bit(CLOCK_SYNC_STP, &clock_sync_flags);
1477 		if (etr_port0_online || etr_port1_online)
1478 			schedule_work(&etr_work);
1479 	} else
1480 		stp_sync.in_sync = 1;
1481 
1482 	local_irq_enable();
1483 	smp_call_function(clock_sync_cpu_end, NULL, 0);
1484 	preempt_enable();
1485 }
1486 
1487 /*
1488  * STP class sysfs interface functions
1489  */
1490 static struct sysdev_class stp_sysclass = {
1491 	.name	= "stp",
1492 };
1493 
1494 static ssize_t stp_ctn_id_show(struct sysdev_class *class, char *buf)
1495 {
1496 	if (!stp_online)
1497 		return -ENODATA;
1498 	return sprintf(buf, "%016llx\n",
1499 		       *(unsigned long long *) stp_info.ctnid);
1500 }
1501 
1502 static SYSDEV_CLASS_ATTR(ctn_id, 0400, stp_ctn_id_show, NULL);
1503 
1504 static ssize_t stp_ctn_type_show(struct sysdev_class *class, char *buf)
1505 {
1506 	if (!stp_online)
1507 		return -ENODATA;
1508 	return sprintf(buf, "%i\n", stp_info.ctn);
1509 }
1510 
1511 static SYSDEV_CLASS_ATTR(ctn_type, 0400, stp_ctn_type_show, NULL);
1512 
1513 static ssize_t stp_dst_offset_show(struct sysdev_class *class, char *buf)
1514 {
1515 	if (!stp_online || !(stp_info.vbits & 0x2000))
1516 		return -ENODATA;
1517 	return sprintf(buf, "%i\n", (int)(s16) stp_info.dsto);
1518 }
1519 
1520 static SYSDEV_CLASS_ATTR(dst_offset, 0400, stp_dst_offset_show, NULL);
1521 
1522 static ssize_t stp_leap_seconds_show(struct sysdev_class *class, char *buf)
1523 {
1524 	if (!stp_online || !(stp_info.vbits & 0x8000))
1525 		return -ENODATA;
1526 	return sprintf(buf, "%i\n", (int)(s16) stp_info.leaps);
1527 }
1528 
1529 static SYSDEV_CLASS_ATTR(leap_seconds, 0400, stp_leap_seconds_show, NULL);
1530 
1531 static ssize_t stp_stratum_show(struct sysdev_class *class, char *buf)
1532 {
1533 	if (!stp_online)
1534 		return -ENODATA;
1535 	return sprintf(buf, "%i\n", (int)(s16) stp_info.stratum);
1536 }
1537 
1538 static SYSDEV_CLASS_ATTR(stratum, 0400, stp_stratum_show, NULL);
1539 
1540 static ssize_t stp_time_offset_show(struct sysdev_class *class, char *buf)
1541 {
1542 	if (!stp_online || !(stp_info.vbits & 0x0800))
1543 		return -ENODATA;
1544 	return sprintf(buf, "%i\n", (int) stp_info.tto);
1545 }
1546 
1547 static SYSDEV_CLASS_ATTR(time_offset, 0400, stp_time_offset_show, NULL);
1548 
1549 static ssize_t stp_time_zone_offset_show(struct sysdev_class *class, char *buf)
1550 {
1551 	if (!stp_online || !(stp_info.vbits & 0x4000))
1552 		return -ENODATA;
1553 	return sprintf(buf, "%i\n", (int)(s16) stp_info.tzo);
1554 }
1555 
1556 static SYSDEV_CLASS_ATTR(time_zone_offset, 0400,
1557 			 stp_time_zone_offset_show, NULL);
1558 
1559 static ssize_t stp_timing_mode_show(struct sysdev_class *class, char *buf)
1560 {
1561 	if (!stp_online)
1562 		return -ENODATA;
1563 	return sprintf(buf, "%i\n", stp_info.tmd);
1564 }
1565 
1566 static SYSDEV_CLASS_ATTR(timing_mode, 0400, stp_timing_mode_show, NULL);
1567 
1568 static ssize_t stp_timing_state_show(struct sysdev_class *class, char *buf)
1569 {
1570 	if (!stp_online)
1571 		return -ENODATA;
1572 	return sprintf(buf, "%i\n", stp_info.tst);
1573 }
1574 
1575 static SYSDEV_CLASS_ATTR(timing_state, 0400, stp_timing_state_show, NULL);
1576 
1577 static ssize_t stp_online_show(struct sysdev_class *class, char *buf)
1578 {
1579 	return sprintf(buf, "%i\n", stp_online);
1580 }
1581 
1582 static ssize_t stp_online_store(struct sysdev_class *class,
1583 				const char *buf, size_t count)
1584 {
1585 	unsigned int value;
1586 
1587 	value = simple_strtoul(buf, NULL, 0);
1588 	if (value != 0 && value != 1)
1589 		return -EINVAL;
1590 	if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
1591 		return -EOPNOTSUPP;
1592 	stp_online = value;
1593 	schedule_work(&stp_work);
1594 	return count;
1595 }
1596 
1597 /*
1598  * Can't use SYSDEV_CLASS_ATTR because the attribute should be named
1599  * stp/online but attr_online already exists in this file ..
1600  */
1601 static struct sysdev_class_attribute attr_stp_online = {
1602 	.attr = { .name = "online", .mode = 0600 },
1603 	.show	= stp_online_show,
1604 	.store	= stp_online_store,
1605 };
1606 
1607 static struct sysdev_class_attribute *stp_attributes[] = {
1608 	&attr_ctn_id,
1609 	&attr_ctn_type,
1610 	&attr_dst_offset,
1611 	&attr_leap_seconds,
1612 	&attr_stp_online,
1613 	&attr_stratum,
1614 	&attr_time_offset,
1615 	&attr_time_zone_offset,
1616 	&attr_timing_mode,
1617 	&attr_timing_state,
1618 	NULL
1619 };
1620 
1621 static int __init stp_init_sysfs(void)
1622 {
1623 	struct sysdev_class_attribute **attr;
1624 	int rc;
1625 
1626 	rc = sysdev_class_register(&stp_sysclass);
1627 	if (rc)
1628 		goto out;
1629 	for (attr = stp_attributes; *attr; attr++) {
1630 		rc = sysdev_class_create_file(&stp_sysclass, *attr);
1631 		if (rc)
1632 			goto out_unreg;
1633 	}
1634 	return 0;
1635 out_unreg:
1636 	for (; attr >= stp_attributes; attr--)
1637 		sysdev_class_remove_file(&stp_sysclass, *attr);
1638 	sysdev_class_unregister(&stp_sysclass);
1639 out:
1640 	return rc;
1641 }
1642 
1643 device_initcall(stp_init_sysfs);
1644