1 /* 2 * arch/s390/kernel/time.c 3 * Time of day based timer functions. 4 * 5 * S390 version 6 * Copyright IBM Corp. 1999, 2008 7 * Author(s): Hartmut Penner (hp@de.ibm.com), 8 * Martin Schwidefsky (schwidefsky@de.ibm.com), 9 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com) 10 * 11 * Derived from "arch/i386/kernel/time.c" 12 * Copyright (C) 1991, 1992, 1995 Linus Torvalds 13 */ 14 15 #define KMSG_COMPONENT "time" 16 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt 17 18 #include <linux/errno.h> 19 #include <linux/module.h> 20 #include <linux/sched.h> 21 #include <linux/kernel.h> 22 #include <linux/param.h> 23 #include <linux/string.h> 24 #include <linux/mm.h> 25 #include <linux/interrupt.h> 26 #include <linux/cpu.h> 27 #include <linux/stop_machine.h> 28 #include <linux/time.h> 29 #include <linux/sysdev.h> 30 #include <linux/delay.h> 31 #include <linux/init.h> 32 #include <linux/smp.h> 33 #include <linux/types.h> 34 #include <linux/profile.h> 35 #include <linux/timex.h> 36 #include <linux/notifier.h> 37 #include <linux/clocksource.h> 38 #include <linux/clockchips.h> 39 #include <linux/bootmem.h> 40 #include <asm/uaccess.h> 41 #include <asm/delay.h> 42 #include <asm/s390_ext.h> 43 #include <asm/div64.h> 44 #include <asm/vdso.h> 45 #include <asm/irq.h> 46 #include <asm/irq_regs.h> 47 #include <asm/timer.h> 48 #include <asm/etr.h> 49 #include <asm/cio.h> 50 51 /* change this if you have some constant time drift */ 52 #define USECS_PER_JIFFY ((unsigned long) 1000000/HZ) 53 #define CLK_TICKS_PER_JIFFY ((unsigned long) USECS_PER_JIFFY << 12) 54 55 /* The value of the TOD clock for 1.1.1970. */ 56 #define TOD_UNIX_EPOCH 0x7d91048bca000000ULL 57 58 /* 59 * Create a small time difference between the timer interrupts 60 * on the different cpus to avoid lock contention. 61 */ 62 #define CPU_DEVIATION (smp_processor_id() << 12) 63 64 #define TICK_SIZE tick 65 66 static ext_int_info_t ext_int_info_cc; 67 static ext_int_info_t ext_int_etr_cc; 68 static u64 sched_clock_base_cc; 69 70 static DEFINE_PER_CPU(struct clock_event_device, comparators); 71 72 /* 73 * Scheduler clock - returns current time in nanosec units. 74 */ 75 unsigned long long sched_clock(void) 76 { 77 return ((get_clock_xt() - sched_clock_base_cc) * 125) >> 9; 78 } 79 80 /* 81 * Monotonic_clock - returns # of nanoseconds passed since time_init() 82 */ 83 unsigned long long monotonic_clock(void) 84 { 85 return sched_clock(); 86 } 87 EXPORT_SYMBOL(monotonic_clock); 88 89 void tod_to_timeval(__u64 todval, struct timespec *xtime) 90 { 91 unsigned long long sec; 92 93 sec = todval >> 12; 94 do_div(sec, 1000000); 95 xtime->tv_sec = sec; 96 todval -= (sec * 1000000) << 12; 97 xtime->tv_nsec = ((todval * 1000) >> 12); 98 } 99 100 #ifdef CONFIG_PROFILING 101 #define s390_do_profile() profile_tick(CPU_PROFILING) 102 #else 103 #define s390_do_profile() do { ; } while(0) 104 #endif /* CONFIG_PROFILING */ 105 106 void clock_comparator_work(void) 107 { 108 struct clock_event_device *cd; 109 110 S390_lowcore.clock_comparator = -1ULL; 111 set_clock_comparator(S390_lowcore.clock_comparator); 112 cd = &__get_cpu_var(comparators); 113 cd->event_handler(cd); 114 s390_do_profile(); 115 } 116 117 /* 118 * Fixup the clock comparator. 119 */ 120 static void fixup_clock_comparator(unsigned long long delta) 121 { 122 /* If nobody is waiting there's nothing to fix. */ 123 if (S390_lowcore.clock_comparator == -1ULL) 124 return; 125 S390_lowcore.clock_comparator += delta; 126 set_clock_comparator(S390_lowcore.clock_comparator); 127 } 128 129 static int s390_next_event(unsigned long delta, 130 struct clock_event_device *evt) 131 { 132 S390_lowcore.clock_comparator = get_clock() + delta; 133 set_clock_comparator(S390_lowcore.clock_comparator); 134 return 0; 135 } 136 137 static void s390_set_mode(enum clock_event_mode mode, 138 struct clock_event_device *evt) 139 { 140 } 141 142 /* 143 * Set up lowcore and control register of the current cpu to 144 * enable TOD clock and clock comparator interrupts. 145 */ 146 void init_cpu_timer(void) 147 { 148 struct clock_event_device *cd; 149 int cpu; 150 151 S390_lowcore.clock_comparator = -1ULL; 152 set_clock_comparator(S390_lowcore.clock_comparator); 153 154 cpu = smp_processor_id(); 155 cd = &per_cpu(comparators, cpu); 156 cd->name = "comparator"; 157 cd->features = CLOCK_EVT_FEAT_ONESHOT; 158 cd->mult = 16777; 159 cd->shift = 12; 160 cd->min_delta_ns = 1; 161 cd->max_delta_ns = LONG_MAX; 162 cd->rating = 400; 163 cd->cpumask = cpumask_of(cpu); 164 cd->set_next_event = s390_next_event; 165 cd->set_mode = s390_set_mode; 166 167 clockevents_register_device(cd); 168 169 /* Enable clock comparator timer interrupt. */ 170 __ctl_set_bit(0,11); 171 172 /* Always allow the timing alert external interrupt. */ 173 __ctl_set_bit(0, 4); 174 } 175 176 static void clock_comparator_interrupt(__u16 code) 177 { 178 if (S390_lowcore.clock_comparator == -1ULL) 179 set_clock_comparator(S390_lowcore.clock_comparator); 180 } 181 182 static void etr_timing_alert(struct etr_irq_parm *); 183 static void stp_timing_alert(struct stp_irq_parm *); 184 185 static void timing_alert_interrupt(__u16 code) 186 { 187 if (S390_lowcore.ext_params & 0x00c40000) 188 etr_timing_alert((struct etr_irq_parm *) 189 &S390_lowcore.ext_params); 190 if (S390_lowcore.ext_params & 0x00038000) 191 stp_timing_alert((struct stp_irq_parm *) 192 &S390_lowcore.ext_params); 193 } 194 195 static void etr_reset(void); 196 static void stp_reset(void); 197 198 /* 199 * Get the TOD clock running. 200 */ 201 static u64 __init reset_tod_clock(void) 202 { 203 u64 time; 204 205 etr_reset(); 206 stp_reset(); 207 if (store_clock(&time) == 0) 208 return time; 209 /* TOD clock not running. Set the clock to Unix Epoch. */ 210 if (set_clock(TOD_UNIX_EPOCH) != 0 || store_clock(&time) != 0) 211 panic("TOD clock not operational."); 212 213 return TOD_UNIX_EPOCH; 214 } 215 216 static cycle_t read_tod_clock(void) 217 { 218 return get_clock(); 219 } 220 221 static struct clocksource clocksource_tod = { 222 .name = "tod", 223 .rating = 400, 224 .read = read_tod_clock, 225 .mask = -1ULL, 226 .mult = 1000, 227 .shift = 12, 228 .flags = CLOCK_SOURCE_IS_CONTINUOUS, 229 }; 230 231 232 void update_vsyscall(struct timespec *wall_time, struct clocksource *clock) 233 { 234 if (clock != &clocksource_tod) 235 return; 236 237 /* Make userspace gettimeofday spin until we're done. */ 238 ++vdso_data->tb_update_count; 239 smp_wmb(); 240 vdso_data->xtime_tod_stamp = clock->cycle_last; 241 vdso_data->xtime_clock_sec = xtime.tv_sec; 242 vdso_data->xtime_clock_nsec = xtime.tv_nsec; 243 vdso_data->wtom_clock_sec = wall_to_monotonic.tv_sec; 244 vdso_data->wtom_clock_nsec = wall_to_monotonic.tv_nsec; 245 smp_wmb(); 246 ++vdso_data->tb_update_count; 247 } 248 249 extern struct timezone sys_tz; 250 251 void update_vsyscall_tz(void) 252 { 253 /* Make userspace gettimeofday spin until we're done. */ 254 ++vdso_data->tb_update_count; 255 smp_wmb(); 256 vdso_data->tz_minuteswest = sys_tz.tz_minuteswest; 257 vdso_data->tz_dsttime = sys_tz.tz_dsttime; 258 smp_wmb(); 259 ++vdso_data->tb_update_count; 260 } 261 262 /* 263 * Initialize the TOD clock and the CPU timer of 264 * the boot cpu. 265 */ 266 void __init time_init(void) 267 { 268 sched_clock_base_cc = reset_tod_clock(); 269 270 /* set xtime */ 271 tod_to_timeval(sched_clock_base_cc - TOD_UNIX_EPOCH, &xtime); 272 set_normalized_timespec(&wall_to_monotonic, 273 -xtime.tv_sec, -xtime.tv_nsec); 274 275 /* request the clock comparator external interrupt */ 276 if (register_early_external_interrupt(0x1004, 277 clock_comparator_interrupt, 278 &ext_int_info_cc) != 0) 279 panic("Couldn't request external interrupt 0x1004"); 280 281 if (clocksource_register(&clocksource_tod) != 0) 282 panic("Could not register TOD clock source"); 283 284 /* request the timing alert external interrupt */ 285 if (register_early_external_interrupt(0x1406, 286 timing_alert_interrupt, 287 &ext_int_etr_cc) != 0) 288 panic("Couldn't request external interrupt 0x1406"); 289 290 /* Enable TOD clock interrupts on the boot cpu. */ 291 init_cpu_timer(); 292 /* Enable cpu timer interrupts on the boot cpu. */ 293 vtime_init(); 294 } 295 296 /* 297 * The time is "clock". old is what we think the time is. 298 * Adjust the value by a multiple of jiffies and add the delta to ntp. 299 * "delay" is an approximation how long the synchronization took. If 300 * the time correction is positive, then "delay" is subtracted from 301 * the time difference and only the remaining part is passed to ntp. 302 */ 303 static unsigned long long adjust_time(unsigned long long old, 304 unsigned long long clock, 305 unsigned long long delay) 306 { 307 unsigned long long delta, ticks; 308 struct timex adjust; 309 310 if (clock > old) { 311 /* It is later than we thought. */ 312 delta = ticks = clock - old; 313 delta = ticks = (delta < delay) ? 0 : delta - delay; 314 delta -= do_div(ticks, CLK_TICKS_PER_JIFFY); 315 adjust.offset = ticks * (1000000 / HZ); 316 } else { 317 /* It is earlier than we thought. */ 318 delta = ticks = old - clock; 319 delta -= do_div(ticks, CLK_TICKS_PER_JIFFY); 320 delta = -delta; 321 adjust.offset = -ticks * (1000000 / HZ); 322 } 323 sched_clock_base_cc += delta; 324 if (adjust.offset != 0) { 325 pr_notice("The ETR interface has adjusted the clock " 326 "by %li microseconds\n", adjust.offset); 327 adjust.modes = ADJ_OFFSET_SINGLESHOT; 328 do_adjtimex(&adjust); 329 } 330 return delta; 331 } 332 333 static DEFINE_PER_CPU(atomic_t, clock_sync_word); 334 static unsigned long clock_sync_flags; 335 336 #define CLOCK_SYNC_HAS_ETR 0 337 #define CLOCK_SYNC_HAS_STP 1 338 #define CLOCK_SYNC_ETR 2 339 #define CLOCK_SYNC_STP 3 340 341 /* 342 * The synchronous get_clock function. It will write the current clock 343 * value to the clock pointer and return 0 if the clock is in sync with 344 * the external time source. If the clock mode is local it will return 345 * -ENOSYS and -EAGAIN if the clock is not in sync with the external 346 * reference. 347 */ 348 int get_sync_clock(unsigned long long *clock) 349 { 350 atomic_t *sw_ptr; 351 unsigned int sw0, sw1; 352 353 sw_ptr = &get_cpu_var(clock_sync_word); 354 sw0 = atomic_read(sw_ptr); 355 *clock = get_clock(); 356 sw1 = atomic_read(sw_ptr); 357 put_cpu_var(clock_sync_sync); 358 if (sw0 == sw1 && (sw0 & 0x80000000U)) 359 /* Success: time is in sync. */ 360 return 0; 361 if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags) && 362 !test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags)) 363 return -ENOSYS; 364 if (!test_bit(CLOCK_SYNC_ETR, &clock_sync_flags) && 365 !test_bit(CLOCK_SYNC_STP, &clock_sync_flags)) 366 return -EACCES; 367 return -EAGAIN; 368 } 369 EXPORT_SYMBOL(get_sync_clock); 370 371 /* 372 * Make get_sync_clock return -EAGAIN. 373 */ 374 static void disable_sync_clock(void *dummy) 375 { 376 atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word); 377 /* 378 * Clear the in-sync bit 2^31. All get_sync_clock calls will 379 * fail until the sync bit is turned back on. In addition 380 * increase the "sequence" counter to avoid the race of an 381 * etr event and the complete recovery against get_sync_clock. 382 */ 383 atomic_clear_mask(0x80000000, sw_ptr); 384 atomic_inc(sw_ptr); 385 } 386 387 /* 388 * Make get_sync_clock return 0 again. 389 * Needs to be called from a context disabled for preemption. 390 */ 391 static void enable_sync_clock(void) 392 { 393 atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word); 394 atomic_set_mask(0x80000000, sw_ptr); 395 } 396 397 /* Single threaded workqueue used for etr and stp sync events */ 398 static struct workqueue_struct *time_sync_wq; 399 400 static void __init time_init_wq(void) 401 { 402 if (!time_sync_wq) 403 time_sync_wq = create_singlethread_workqueue("timesync"); 404 } 405 406 /* 407 * External Time Reference (ETR) code. 408 */ 409 static int etr_port0_online; 410 static int etr_port1_online; 411 static int etr_steai_available; 412 413 static int __init early_parse_etr(char *p) 414 { 415 if (strncmp(p, "off", 3) == 0) 416 etr_port0_online = etr_port1_online = 0; 417 else if (strncmp(p, "port0", 5) == 0) 418 etr_port0_online = 1; 419 else if (strncmp(p, "port1", 5) == 0) 420 etr_port1_online = 1; 421 else if (strncmp(p, "on", 2) == 0) 422 etr_port0_online = etr_port1_online = 1; 423 return 0; 424 } 425 early_param("etr", early_parse_etr); 426 427 enum etr_event { 428 ETR_EVENT_PORT0_CHANGE, 429 ETR_EVENT_PORT1_CHANGE, 430 ETR_EVENT_PORT_ALERT, 431 ETR_EVENT_SYNC_CHECK, 432 ETR_EVENT_SWITCH_LOCAL, 433 ETR_EVENT_UPDATE, 434 }; 435 436 /* 437 * Valid bit combinations of the eacr register are (x = don't care): 438 * e0 e1 dp p0 p1 ea es sl 439 * 0 0 x 0 0 0 0 0 initial, disabled state 440 * 0 0 x 0 1 1 0 0 port 1 online 441 * 0 0 x 1 0 1 0 0 port 0 online 442 * 0 0 x 1 1 1 0 0 both ports online 443 * 0 1 x 0 1 1 0 0 port 1 online and usable, ETR or PPS mode 444 * 0 1 x 0 1 1 0 1 port 1 online, usable and ETR mode 445 * 0 1 x 0 1 1 1 0 port 1 online, usable, PPS mode, in-sync 446 * 0 1 x 0 1 1 1 1 port 1 online, usable, ETR mode, in-sync 447 * 0 1 x 1 1 1 0 0 both ports online, port 1 usable 448 * 0 1 x 1 1 1 1 0 both ports online, port 1 usable, PPS mode, in-sync 449 * 0 1 x 1 1 1 1 1 both ports online, port 1 usable, ETR mode, in-sync 450 * 1 0 x 1 0 1 0 0 port 0 online and usable, ETR or PPS mode 451 * 1 0 x 1 0 1 0 1 port 0 online, usable and ETR mode 452 * 1 0 x 1 0 1 1 0 port 0 online, usable, PPS mode, in-sync 453 * 1 0 x 1 0 1 1 1 port 0 online, usable, ETR mode, in-sync 454 * 1 0 x 1 1 1 0 0 both ports online, port 0 usable 455 * 1 0 x 1 1 1 1 0 both ports online, port 0 usable, PPS mode, in-sync 456 * 1 0 x 1 1 1 1 1 both ports online, port 0 usable, ETR mode, in-sync 457 * 1 1 x 1 1 1 1 0 both ports online & usable, ETR, in-sync 458 * 1 1 x 1 1 1 1 1 both ports online & usable, ETR, in-sync 459 */ 460 static struct etr_eacr etr_eacr; 461 static u64 etr_tolec; /* time of last eacr update */ 462 static struct etr_aib etr_port0; 463 static int etr_port0_uptodate; 464 static struct etr_aib etr_port1; 465 static int etr_port1_uptodate; 466 static unsigned long etr_events; 467 static struct timer_list etr_timer; 468 469 static void etr_timeout(unsigned long dummy); 470 static void etr_work_fn(struct work_struct *work); 471 static DEFINE_MUTEX(etr_work_mutex); 472 static DECLARE_WORK(etr_work, etr_work_fn); 473 474 /* 475 * Reset ETR attachment. 476 */ 477 static void etr_reset(void) 478 { 479 etr_eacr = (struct etr_eacr) { 480 .e0 = 0, .e1 = 0, ._pad0 = 4, .dp = 0, 481 .p0 = 0, .p1 = 0, ._pad1 = 0, .ea = 0, 482 .es = 0, .sl = 0 }; 483 if (etr_setr(&etr_eacr) == 0) { 484 etr_tolec = get_clock(); 485 set_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags); 486 } else if (etr_port0_online || etr_port1_online) { 487 pr_warning("The real or virtual hardware system does " 488 "not provide an ETR interface\n"); 489 etr_port0_online = etr_port1_online = 0; 490 } 491 } 492 493 static int __init etr_init(void) 494 { 495 struct etr_aib aib; 496 497 if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags)) 498 return 0; 499 time_init_wq(); 500 /* Check if this machine has the steai instruction. */ 501 if (etr_steai(&aib, ETR_STEAI_STEPPING_PORT) == 0) 502 etr_steai_available = 1; 503 setup_timer(&etr_timer, etr_timeout, 0UL); 504 if (etr_port0_online) { 505 set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events); 506 queue_work(time_sync_wq, &etr_work); 507 } 508 if (etr_port1_online) { 509 set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events); 510 queue_work(time_sync_wq, &etr_work); 511 } 512 return 0; 513 } 514 515 arch_initcall(etr_init); 516 517 /* 518 * Two sorts of ETR machine checks. The architecture reads: 519 * "When a machine-check niterruption occurs and if a switch-to-local or 520 * ETR-sync-check interrupt request is pending but disabled, this pending 521 * disabled interruption request is indicated and is cleared". 522 * Which means that we can get etr_switch_to_local events from the machine 523 * check handler although the interruption condition is disabled. Lovely.. 524 */ 525 526 /* 527 * Switch to local machine check. This is called when the last usable 528 * ETR port goes inactive. After switch to local the clock is not in sync. 529 */ 530 void etr_switch_to_local(void) 531 { 532 if (!etr_eacr.sl) 533 return; 534 if (test_bit(CLOCK_SYNC_ETR, &clock_sync_flags)) 535 disable_sync_clock(NULL); 536 set_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events); 537 queue_work(time_sync_wq, &etr_work); 538 } 539 540 /* 541 * ETR sync check machine check. This is called when the ETR OTE and the 542 * local clock OTE are farther apart than the ETR sync check tolerance. 543 * After a ETR sync check the clock is not in sync. The machine check 544 * is broadcasted to all cpus at the same time. 545 */ 546 void etr_sync_check(void) 547 { 548 if (!etr_eacr.es) 549 return; 550 if (test_bit(CLOCK_SYNC_ETR, &clock_sync_flags)) 551 disable_sync_clock(NULL); 552 set_bit(ETR_EVENT_SYNC_CHECK, &etr_events); 553 queue_work(time_sync_wq, &etr_work); 554 } 555 556 /* 557 * ETR timing alert. There are two causes: 558 * 1) port state change, check the usability of the port 559 * 2) port alert, one of the ETR-data-validity bits (v1-v2 bits of the 560 * sldr-status word) or ETR-data word 1 (edf1) or ETR-data word 3 (edf3) 561 * or ETR-data word 4 (edf4) has changed. 562 */ 563 static void etr_timing_alert(struct etr_irq_parm *intparm) 564 { 565 if (intparm->pc0) 566 /* ETR port 0 state change. */ 567 set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events); 568 if (intparm->pc1) 569 /* ETR port 1 state change. */ 570 set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events); 571 if (intparm->eai) 572 /* 573 * ETR port alert on either port 0, 1 or both. 574 * Both ports are not up-to-date now. 575 */ 576 set_bit(ETR_EVENT_PORT_ALERT, &etr_events); 577 queue_work(time_sync_wq, &etr_work); 578 } 579 580 static void etr_timeout(unsigned long dummy) 581 { 582 set_bit(ETR_EVENT_UPDATE, &etr_events); 583 queue_work(time_sync_wq, &etr_work); 584 } 585 586 /* 587 * Check if the etr mode is pss. 588 */ 589 static inline int etr_mode_is_pps(struct etr_eacr eacr) 590 { 591 return eacr.es && !eacr.sl; 592 } 593 594 /* 595 * Check if the etr mode is etr. 596 */ 597 static inline int etr_mode_is_etr(struct etr_eacr eacr) 598 { 599 return eacr.es && eacr.sl; 600 } 601 602 /* 603 * Check if the port can be used for TOD synchronization. 604 * For PPS mode the port has to receive OTEs. For ETR mode 605 * the port has to receive OTEs, the ETR stepping bit has to 606 * be zero and the validity bits for data frame 1, 2, and 3 607 * have to be 1. 608 */ 609 static int etr_port_valid(struct etr_aib *aib, int port) 610 { 611 unsigned int psc; 612 613 /* Check that this port is receiving OTEs. */ 614 if (aib->tsp == 0) 615 return 0; 616 617 psc = port ? aib->esw.psc1 : aib->esw.psc0; 618 if (psc == etr_lpsc_pps_mode) 619 return 1; 620 if (psc == etr_lpsc_operational_step) 621 return !aib->esw.y && aib->slsw.v1 && 622 aib->slsw.v2 && aib->slsw.v3; 623 return 0; 624 } 625 626 /* 627 * Check if two ports are on the same network. 628 */ 629 static int etr_compare_network(struct etr_aib *aib1, struct etr_aib *aib2) 630 { 631 // FIXME: any other fields we have to compare? 632 return aib1->edf1.net_id == aib2->edf1.net_id; 633 } 634 635 /* 636 * Wrapper for etr_stei that converts physical port states 637 * to logical port states to be consistent with the output 638 * of stetr (see etr_psc vs. etr_lpsc). 639 */ 640 static void etr_steai_cv(struct etr_aib *aib, unsigned int func) 641 { 642 BUG_ON(etr_steai(aib, func) != 0); 643 /* Convert port state to logical port state. */ 644 if (aib->esw.psc0 == 1) 645 aib->esw.psc0 = 2; 646 else if (aib->esw.psc0 == 0 && aib->esw.p == 0) 647 aib->esw.psc0 = 1; 648 if (aib->esw.psc1 == 1) 649 aib->esw.psc1 = 2; 650 else if (aib->esw.psc1 == 0 && aib->esw.p == 1) 651 aib->esw.psc1 = 1; 652 } 653 654 /* 655 * Check if the aib a2 is still connected to the same attachment as 656 * aib a1, the etv values differ by one and a2 is valid. 657 */ 658 static int etr_aib_follows(struct etr_aib *a1, struct etr_aib *a2, int p) 659 { 660 int state_a1, state_a2; 661 662 /* Paranoia check: e0/e1 should better be the same. */ 663 if (a1->esw.eacr.e0 != a2->esw.eacr.e0 || 664 a1->esw.eacr.e1 != a2->esw.eacr.e1) 665 return 0; 666 667 /* Still connected to the same etr ? */ 668 state_a1 = p ? a1->esw.psc1 : a1->esw.psc0; 669 state_a2 = p ? a2->esw.psc1 : a2->esw.psc0; 670 if (state_a1 == etr_lpsc_operational_step) { 671 if (state_a2 != etr_lpsc_operational_step || 672 a1->edf1.net_id != a2->edf1.net_id || 673 a1->edf1.etr_id != a2->edf1.etr_id || 674 a1->edf1.etr_pn != a2->edf1.etr_pn) 675 return 0; 676 } else if (state_a2 != etr_lpsc_pps_mode) 677 return 0; 678 679 /* The ETV value of a2 needs to be ETV of a1 + 1. */ 680 if (a1->edf2.etv + 1 != a2->edf2.etv) 681 return 0; 682 683 if (!etr_port_valid(a2, p)) 684 return 0; 685 686 return 1; 687 } 688 689 struct clock_sync_data { 690 atomic_t cpus; 691 int in_sync; 692 unsigned long long fixup_cc; 693 int etr_port; 694 struct etr_aib *etr_aib; 695 }; 696 697 static void clock_sync_cpu(struct clock_sync_data *sync) 698 { 699 atomic_dec(&sync->cpus); 700 enable_sync_clock(); 701 /* 702 * This looks like a busy wait loop but it isn't. etr_sync_cpus 703 * is called on all other cpus while the TOD clocks is stopped. 704 * __udelay will stop the cpu on an enabled wait psw until the 705 * TOD is running again. 706 */ 707 while (sync->in_sync == 0) { 708 __udelay(1); 709 /* 710 * A different cpu changes *in_sync. Therefore use 711 * barrier() to force memory access. 712 */ 713 barrier(); 714 } 715 if (sync->in_sync != 1) 716 /* Didn't work. Clear per-cpu in sync bit again. */ 717 disable_sync_clock(NULL); 718 /* 719 * This round of TOD syncing is done. Set the clock comparator 720 * to the next tick and let the processor continue. 721 */ 722 fixup_clock_comparator(sync->fixup_cc); 723 } 724 725 /* 726 * Sync the TOD clock using the port refered to by aibp. This port 727 * has to be enabled and the other port has to be disabled. The 728 * last eacr update has to be more than 1.6 seconds in the past. 729 */ 730 static int etr_sync_clock(void *data) 731 { 732 static int first; 733 unsigned long long clock, old_clock, delay, delta; 734 struct clock_sync_data *etr_sync; 735 struct etr_aib *sync_port, *aib; 736 int port; 737 int rc; 738 739 etr_sync = data; 740 741 if (xchg(&first, 1) == 1) { 742 /* Slave */ 743 clock_sync_cpu(etr_sync); 744 return 0; 745 } 746 747 /* Wait until all other cpus entered the sync function. */ 748 while (atomic_read(&etr_sync->cpus) != 0) 749 cpu_relax(); 750 751 port = etr_sync->etr_port; 752 aib = etr_sync->etr_aib; 753 sync_port = (port == 0) ? &etr_port0 : &etr_port1; 754 enable_sync_clock(); 755 756 /* Set clock to next OTE. */ 757 __ctl_set_bit(14, 21); 758 __ctl_set_bit(0, 29); 759 clock = ((unsigned long long) (aib->edf2.etv + 1)) << 32; 760 old_clock = get_clock(); 761 if (set_clock(clock) == 0) { 762 __udelay(1); /* Wait for the clock to start. */ 763 __ctl_clear_bit(0, 29); 764 __ctl_clear_bit(14, 21); 765 etr_stetr(aib); 766 /* Adjust Linux timing variables. */ 767 delay = (unsigned long long) 768 (aib->edf2.etv - sync_port->edf2.etv) << 32; 769 delta = adjust_time(old_clock, clock, delay); 770 etr_sync->fixup_cc = delta; 771 fixup_clock_comparator(delta); 772 /* Verify that the clock is properly set. */ 773 if (!etr_aib_follows(sync_port, aib, port)) { 774 /* Didn't work. */ 775 disable_sync_clock(NULL); 776 etr_sync->in_sync = -EAGAIN; 777 rc = -EAGAIN; 778 } else { 779 etr_sync->in_sync = 1; 780 rc = 0; 781 } 782 } else { 783 /* Could not set the clock ?!? */ 784 __ctl_clear_bit(0, 29); 785 __ctl_clear_bit(14, 21); 786 disable_sync_clock(NULL); 787 etr_sync->in_sync = -EAGAIN; 788 rc = -EAGAIN; 789 } 790 xchg(&first, 0); 791 return rc; 792 } 793 794 static int etr_sync_clock_stop(struct etr_aib *aib, int port) 795 { 796 struct clock_sync_data etr_sync; 797 struct etr_aib *sync_port; 798 int follows; 799 int rc; 800 801 /* Check if the current aib is adjacent to the sync port aib. */ 802 sync_port = (port == 0) ? &etr_port0 : &etr_port1; 803 follows = etr_aib_follows(sync_port, aib, port); 804 memcpy(sync_port, aib, sizeof(*aib)); 805 if (!follows) 806 return -EAGAIN; 807 memset(&etr_sync, 0, sizeof(etr_sync)); 808 etr_sync.etr_aib = aib; 809 etr_sync.etr_port = port; 810 get_online_cpus(); 811 atomic_set(&etr_sync.cpus, num_online_cpus() - 1); 812 rc = stop_machine(etr_sync_clock, &etr_sync, &cpu_online_map); 813 put_online_cpus(); 814 return rc; 815 } 816 817 /* 818 * Handle the immediate effects of the different events. 819 * The port change event is used for online/offline changes. 820 */ 821 static struct etr_eacr etr_handle_events(struct etr_eacr eacr) 822 { 823 if (test_and_clear_bit(ETR_EVENT_SYNC_CHECK, &etr_events)) 824 eacr.es = 0; 825 if (test_and_clear_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events)) 826 eacr.es = eacr.sl = 0; 827 if (test_and_clear_bit(ETR_EVENT_PORT_ALERT, &etr_events)) 828 etr_port0_uptodate = etr_port1_uptodate = 0; 829 830 if (test_and_clear_bit(ETR_EVENT_PORT0_CHANGE, &etr_events)) { 831 if (eacr.e0) 832 /* 833 * Port change of an enabled port. We have to 834 * assume that this can have caused an stepping 835 * port switch. 836 */ 837 etr_tolec = get_clock(); 838 eacr.p0 = etr_port0_online; 839 if (!eacr.p0) 840 eacr.e0 = 0; 841 etr_port0_uptodate = 0; 842 } 843 if (test_and_clear_bit(ETR_EVENT_PORT1_CHANGE, &etr_events)) { 844 if (eacr.e1) 845 /* 846 * Port change of an enabled port. We have to 847 * assume that this can have caused an stepping 848 * port switch. 849 */ 850 etr_tolec = get_clock(); 851 eacr.p1 = etr_port1_online; 852 if (!eacr.p1) 853 eacr.e1 = 0; 854 etr_port1_uptodate = 0; 855 } 856 clear_bit(ETR_EVENT_UPDATE, &etr_events); 857 return eacr; 858 } 859 860 /* 861 * Set up a timer that expires after the etr_tolec + 1.6 seconds if 862 * one of the ports needs an update. 863 */ 864 static void etr_set_tolec_timeout(unsigned long long now) 865 { 866 unsigned long micros; 867 868 if ((!etr_eacr.p0 || etr_port0_uptodate) && 869 (!etr_eacr.p1 || etr_port1_uptodate)) 870 return; 871 micros = (now > etr_tolec) ? ((now - etr_tolec) >> 12) : 0; 872 micros = (micros > 1600000) ? 0 : 1600000 - micros; 873 mod_timer(&etr_timer, jiffies + (micros * HZ) / 1000000 + 1); 874 } 875 876 /* 877 * Set up a time that expires after 1/2 second. 878 */ 879 static void etr_set_sync_timeout(void) 880 { 881 mod_timer(&etr_timer, jiffies + HZ/2); 882 } 883 884 /* 885 * Update the aib information for one or both ports. 886 */ 887 static struct etr_eacr etr_handle_update(struct etr_aib *aib, 888 struct etr_eacr eacr) 889 { 890 /* With both ports disabled the aib information is useless. */ 891 if (!eacr.e0 && !eacr.e1) 892 return eacr; 893 894 /* Update port0 or port1 with aib stored in etr_work_fn. */ 895 if (aib->esw.q == 0) { 896 /* Information for port 0 stored. */ 897 if (eacr.p0 && !etr_port0_uptodate) { 898 etr_port0 = *aib; 899 if (etr_port0_online) 900 etr_port0_uptodate = 1; 901 } 902 } else { 903 /* Information for port 1 stored. */ 904 if (eacr.p1 && !etr_port1_uptodate) { 905 etr_port1 = *aib; 906 if (etr_port0_online) 907 etr_port1_uptodate = 1; 908 } 909 } 910 911 /* 912 * Do not try to get the alternate port aib if the clock 913 * is not in sync yet. 914 */ 915 if (!test_bit(CLOCK_SYNC_STP, &clock_sync_flags) && !eacr.es) 916 return eacr; 917 918 /* 919 * If steai is available we can get the information about 920 * the other port immediately. If only stetr is available the 921 * data-port bit toggle has to be used. 922 */ 923 if (etr_steai_available) { 924 if (eacr.p0 && !etr_port0_uptodate) { 925 etr_steai_cv(&etr_port0, ETR_STEAI_PORT_0); 926 etr_port0_uptodate = 1; 927 } 928 if (eacr.p1 && !etr_port1_uptodate) { 929 etr_steai_cv(&etr_port1, ETR_STEAI_PORT_1); 930 etr_port1_uptodate = 1; 931 } 932 } else { 933 /* 934 * One port was updated above, if the other 935 * port is not uptodate toggle dp bit. 936 */ 937 if ((eacr.p0 && !etr_port0_uptodate) || 938 (eacr.p1 && !etr_port1_uptodate)) 939 eacr.dp ^= 1; 940 else 941 eacr.dp = 0; 942 } 943 return eacr; 944 } 945 946 /* 947 * Write new etr control register if it differs from the current one. 948 * Return 1 if etr_tolec has been updated as well. 949 */ 950 static void etr_update_eacr(struct etr_eacr eacr) 951 { 952 int dp_changed; 953 954 if (memcmp(&etr_eacr, &eacr, sizeof(eacr)) == 0) 955 /* No change, return. */ 956 return; 957 /* 958 * The disable of an active port of the change of the data port 959 * bit can/will cause a change in the data port. 960 */ 961 dp_changed = etr_eacr.e0 > eacr.e0 || etr_eacr.e1 > eacr.e1 || 962 (etr_eacr.dp ^ eacr.dp) != 0; 963 etr_eacr = eacr; 964 etr_setr(&etr_eacr); 965 if (dp_changed) 966 etr_tolec = get_clock(); 967 } 968 969 /* 970 * ETR work. In this function you'll find the main logic. In 971 * particular this is the only function that calls etr_update_eacr(), 972 * it "controls" the etr control register. 973 */ 974 static void etr_work_fn(struct work_struct *work) 975 { 976 unsigned long long now; 977 struct etr_eacr eacr; 978 struct etr_aib aib; 979 int sync_port; 980 981 /* prevent multiple execution. */ 982 mutex_lock(&etr_work_mutex); 983 984 /* Create working copy of etr_eacr. */ 985 eacr = etr_eacr; 986 987 /* Check for the different events and their immediate effects. */ 988 eacr = etr_handle_events(eacr); 989 990 /* Check if ETR is supposed to be active. */ 991 eacr.ea = eacr.p0 || eacr.p1; 992 if (!eacr.ea) { 993 /* Both ports offline. Reset everything. */ 994 eacr.dp = eacr.es = eacr.sl = 0; 995 on_each_cpu(disable_sync_clock, NULL, 1); 996 del_timer_sync(&etr_timer); 997 etr_update_eacr(eacr); 998 clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags); 999 goto out_unlock; 1000 } 1001 1002 /* Store aib to get the current ETR status word. */ 1003 BUG_ON(etr_stetr(&aib) != 0); 1004 etr_port0.esw = etr_port1.esw = aib.esw; /* Copy status word. */ 1005 now = get_clock(); 1006 1007 /* 1008 * Update the port information if the last stepping port change 1009 * or data port change is older than 1.6 seconds. 1010 */ 1011 if (now >= etr_tolec + (1600000 << 12)) 1012 eacr = etr_handle_update(&aib, eacr); 1013 1014 /* 1015 * Select ports to enable. The prefered synchronization mode is PPS. 1016 * If a port can be enabled depends on a number of things: 1017 * 1) The port needs to be online and uptodate. A port is not 1018 * disabled just because it is not uptodate, but it is only 1019 * enabled if it is uptodate. 1020 * 2) The port needs to have the same mode (pps / etr). 1021 * 3) The port needs to be usable -> etr_port_valid() == 1 1022 * 4) To enable the second port the clock needs to be in sync. 1023 * 5) If both ports are useable and are ETR ports, the network id 1024 * has to be the same. 1025 * The eacr.sl bit is used to indicate etr mode vs. pps mode. 1026 */ 1027 if (eacr.p0 && aib.esw.psc0 == etr_lpsc_pps_mode) { 1028 eacr.sl = 0; 1029 eacr.e0 = 1; 1030 if (!etr_mode_is_pps(etr_eacr)) 1031 eacr.es = 0; 1032 if (!eacr.es || !eacr.p1 || aib.esw.psc1 != etr_lpsc_pps_mode) 1033 eacr.e1 = 0; 1034 // FIXME: uptodate checks ? 1035 else if (etr_port0_uptodate && etr_port1_uptodate) 1036 eacr.e1 = 1; 1037 sync_port = (etr_port0_uptodate && 1038 etr_port_valid(&etr_port0, 0)) ? 0 : -1; 1039 } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_pps_mode) { 1040 eacr.sl = 0; 1041 eacr.e0 = 0; 1042 eacr.e1 = 1; 1043 if (!etr_mode_is_pps(etr_eacr)) 1044 eacr.es = 0; 1045 sync_port = (etr_port1_uptodate && 1046 etr_port_valid(&etr_port1, 1)) ? 1 : -1; 1047 } else if (eacr.p0 && aib.esw.psc0 == etr_lpsc_operational_step) { 1048 eacr.sl = 1; 1049 eacr.e0 = 1; 1050 if (!etr_mode_is_etr(etr_eacr)) 1051 eacr.es = 0; 1052 if (!eacr.es || !eacr.p1 || 1053 aib.esw.psc1 != etr_lpsc_operational_alt) 1054 eacr.e1 = 0; 1055 else if (etr_port0_uptodate && etr_port1_uptodate && 1056 etr_compare_network(&etr_port0, &etr_port1)) 1057 eacr.e1 = 1; 1058 sync_port = (etr_port0_uptodate && 1059 etr_port_valid(&etr_port0, 0)) ? 0 : -1; 1060 } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_operational_step) { 1061 eacr.sl = 1; 1062 eacr.e0 = 0; 1063 eacr.e1 = 1; 1064 if (!etr_mode_is_etr(etr_eacr)) 1065 eacr.es = 0; 1066 sync_port = (etr_port1_uptodate && 1067 etr_port_valid(&etr_port1, 1)) ? 1 : -1; 1068 } else { 1069 /* Both ports not usable. */ 1070 eacr.es = eacr.sl = 0; 1071 sync_port = -1; 1072 clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags); 1073 } 1074 1075 if (!test_bit(CLOCK_SYNC_ETR, &clock_sync_flags)) 1076 eacr.es = 0; 1077 1078 /* 1079 * If the clock is in sync just update the eacr and return. 1080 * If there is no valid sync port wait for a port update. 1081 */ 1082 if (test_bit(CLOCK_SYNC_STP, &clock_sync_flags) || 1083 eacr.es || sync_port < 0) { 1084 etr_update_eacr(eacr); 1085 etr_set_tolec_timeout(now); 1086 goto out_unlock; 1087 } 1088 1089 /* 1090 * Prepare control register for clock syncing 1091 * (reset data port bit, set sync check control. 1092 */ 1093 eacr.dp = 0; 1094 eacr.es = 1; 1095 1096 /* 1097 * Update eacr and try to synchronize the clock. If the update 1098 * of eacr caused a stepping port switch (or if we have to 1099 * assume that a stepping port switch has occured) or the 1100 * clock syncing failed, reset the sync check control bit 1101 * and set up a timer to try again after 0.5 seconds 1102 */ 1103 etr_update_eacr(eacr); 1104 set_bit(CLOCK_SYNC_ETR, &clock_sync_flags); 1105 if (now < etr_tolec + (1600000 << 12) || 1106 etr_sync_clock_stop(&aib, sync_port) != 0) { 1107 /* Sync failed. Try again in 1/2 second. */ 1108 eacr.es = 0; 1109 etr_update_eacr(eacr); 1110 clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags); 1111 etr_set_sync_timeout(); 1112 } else 1113 etr_set_tolec_timeout(now); 1114 out_unlock: 1115 mutex_unlock(&etr_work_mutex); 1116 } 1117 1118 /* 1119 * Sysfs interface functions 1120 */ 1121 static struct sysdev_class etr_sysclass = { 1122 .name = "etr", 1123 }; 1124 1125 static struct sys_device etr_port0_dev = { 1126 .id = 0, 1127 .cls = &etr_sysclass, 1128 }; 1129 1130 static struct sys_device etr_port1_dev = { 1131 .id = 1, 1132 .cls = &etr_sysclass, 1133 }; 1134 1135 /* 1136 * ETR class attributes 1137 */ 1138 static ssize_t etr_stepping_port_show(struct sysdev_class *class, char *buf) 1139 { 1140 return sprintf(buf, "%i\n", etr_port0.esw.p); 1141 } 1142 1143 static SYSDEV_CLASS_ATTR(stepping_port, 0400, etr_stepping_port_show, NULL); 1144 1145 static ssize_t etr_stepping_mode_show(struct sysdev_class *class, char *buf) 1146 { 1147 char *mode_str; 1148 1149 if (etr_mode_is_pps(etr_eacr)) 1150 mode_str = "pps"; 1151 else if (etr_mode_is_etr(etr_eacr)) 1152 mode_str = "etr"; 1153 else 1154 mode_str = "local"; 1155 return sprintf(buf, "%s\n", mode_str); 1156 } 1157 1158 static SYSDEV_CLASS_ATTR(stepping_mode, 0400, etr_stepping_mode_show, NULL); 1159 1160 /* 1161 * ETR port attributes 1162 */ 1163 static inline struct etr_aib *etr_aib_from_dev(struct sys_device *dev) 1164 { 1165 if (dev == &etr_port0_dev) 1166 return etr_port0_online ? &etr_port0 : NULL; 1167 else 1168 return etr_port1_online ? &etr_port1 : NULL; 1169 } 1170 1171 static ssize_t etr_online_show(struct sys_device *dev, 1172 struct sysdev_attribute *attr, 1173 char *buf) 1174 { 1175 unsigned int online; 1176 1177 online = (dev == &etr_port0_dev) ? etr_port0_online : etr_port1_online; 1178 return sprintf(buf, "%i\n", online); 1179 } 1180 1181 static ssize_t etr_online_store(struct sys_device *dev, 1182 struct sysdev_attribute *attr, 1183 const char *buf, size_t count) 1184 { 1185 unsigned int value; 1186 1187 value = simple_strtoul(buf, NULL, 0); 1188 if (value != 0 && value != 1) 1189 return -EINVAL; 1190 if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags)) 1191 return -EOPNOTSUPP; 1192 if (dev == &etr_port0_dev) { 1193 if (etr_port0_online == value) 1194 return count; /* Nothing to do. */ 1195 etr_port0_online = value; 1196 set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events); 1197 queue_work(time_sync_wq, &etr_work); 1198 } else { 1199 if (etr_port1_online == value) 1200 return count; /* Nothing to do. */ 1201 etr_port1_online = value; 1202 set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events); 1203 queue_work(time_sync_wq, &etr_work); 1204 } 1205 return count; 1206 } 1207 1208 static SYSDEV_ATTR(online, 0600, etr_online_show, etr_online_store); 1209 1210 static ssize_t etr_stepping_control_show(struct sys_device *dev, 1211 struct sysdev_attribute *attr, 1212 char *buf) 1213 { 1214 return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ? 1215 etr_eacr.e0 : etr_eacr.e1); 1216 } 1217 1218 static SYSDEV_ATTR(stepping_control, 0400, etr_stepping_control_show, NULL); 1219 1220 static ssize_t etr_mode_code_show(struct sys_device *dev, 1221 struct sysdev_attribute *attr, char *buf) 1222 { 1223 if (!etr_port0_online && !etr_port1_online) 1224 /* Status word is not uptodate if both ports are offline. */ 1225 return -ENODATA; 1226 return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ? 1227 etr_port0.esw.psc0 : etr_port0.esw.psc1); 1228 } 1229 1230 static SYSDEV_ATTR(state_code, 0400, etr_mode_code_show, NULL); 1231 1232 static ssize_t etr_untuned_show(struct sys_device *dev, 1233 struct sysdev_attribute *attr, char *buf) 1234 { 1235 struct etr_aib *aib = etr_aib_from_dev(dev); 1236 1237 if (!aib || !aib->slsw.v1) 1238 return -ENODATA; 1239 return sprintf(buf, "%i\n", aib->edf1.u); 1240 } 1241 1242 static SYSDEV_ATTR(untuned, 0400, etr_untuned_show, NULL); 1243 1244 static ssize_t etr_network_id_show(struct sys_device *dev, 1245 struct sysdev_attribute *attr, char *buf) 1246 { 1247 struct etr_aib *aib = etr_aib_from_dev(dev); 1248 1249 if (!aib || !aib->slsw.v1) 1250 return -ENODATA; 1251 return sprintf(buf, "%i\n", aib->edf1.net_id); 1252 } 1253 1254 static SYSDEV_ATTR(network, 0400, etr_network_id_show, NULL); 1255 1256 static ssize_t etr_id_show(struct sys_device *dev, 1257 struct sysdev_attribute *attr, char *buf) 1258 { 1259 struct etr_aib *aib = etr_aib_from_dev(dev); 1260 1261 if (!aib || !aib->slsw.v1) 1262 return -ENODATA; 1263 return sprintf(buf, "%i\n", aib->edf1.etr_id); 1264 } 1265 1266 static SYSDEV_ATTR(id, 0400, etr_id_show, NULL); 1267 1268 static ssize_t etr_port_number_show(struct sys_device *dev, 1269 struct sysdev_attribute *attr, char *buf) 1270 { 1271 struct etr_aib *aib = etr_aib_from_dev(dev); 1272 1273 if (!aib || !aib->slsw.v1) 1274 return -ENODATA; 1275 return sprintf(buf, "%i\n", aib->edf1.etr_pn); 1276 } 1277 1278 static SYSDEV_ATTR(port, 0400, etr_port_number_show, NULL); 1279 1280 static ssize_t etr_coupled_show(struct sys_device *dev, 1281 struct sysdev_attribute *attr, char *buf) 1282 { 1283 struct etr_aib *aib = etr_aib_from_dev(dev); 1284 1285 if (!aib || !aib->slsw.v3) 1286 return -ENODATA; 1287 return sprintf(buf, "%i\n", aib->edf3.c); 1288 } 1289 1290 static SYSDEV_ATTR(coupled, 0400, etr_coupled_show, NULL); 1291 1292 static ssize_t etr_local_time_show(struct sys_device *dev, 1293 struct sysdev_attribute *attr, char *buf) 1294 { 1295 struct etr_aib *aib = etr_aib_from_dev(dev); 1296 1297 if (!aib || !aib->slsw.v3) 1298 return -ENODATA; 1299 return sprintf(buf, "%i\n", aib->edf3.blto); 1300 } 1301 1302 static SYSDEV_ATTR(local_time, 0400, etr_local_time_show, NULL); 1303 1304 static ssize_t etr_utc_offset_show(struct sys_device *dev, 1305 struct sysdev_attribute *attr, char *buf) 1306 { 1307 struct etr_aib *aib = etr_aib_from_dev(dev); 1308 1309 if (!aib || !aib->slsw.v3) 1310 return -ENODATA; 1311 return sprintf(buf, "%i\n", aib->edf3.buo); 1312 } 1313 1314 static SYSDEV_ATTR(utc_offset, 0400, etr_utc_offset_show, NULL); 1315 1316 static struct sysdev_attribute *etr_port_attributes[] = { 1317 &attr_online, 1318 &attr_stepping_control, 1319 &attr_state_code, 1320 &attr_untuned, 1321 &attr_network, 1322 &attr_id, 1323 &attr_port, 1324 &attr_coupled, 1325 &attr_local_time, 1326 &attr_utc_offset, 1327 NULL 1328 }; 1329 1330 static int __init etr_register_port(struct sys_device *dev) 1331 { 1332 struct sysdev_attribute **attr; 1333 int rc; 1334 1335 rc = sysdev_register(dev); 1336 if (rc) 1337 goto out; 1338 for (attr = etr_port_attributes; *attr; attr++) { 1339 rc = sysdev_create_file(dev, *attr); 1340 if (rc) 1341 goto out_unreg; 1342 } 1343 return 0; 1344 out_unreg: 1345 for (; attr >= etr_port_attributes; attr--) 1346 sysdev_remove_file(dev, *attr); 1347 sysdev_unregister(dev); 1348 out: 1349 return rc; 1350 } 1351 1352 static void __init etr_unregister_port(struct sys_device *dev) 1353 { 1354 struct sysdev_attribute **attr; 1355 1356 for (attr = etr_port_attributes; *attr; attr++) 1357 sysdev_remove_file(dev, *attr); 1358 sysdev_unregister(dev); 1359 } 1360 1361 static int __init etr_init_sysfs(void) 1362 { 1363 int rc; 1364 1365 rc = sysdev_class_register(&etr_sysclass); 1366 if (rc) 1367 goto out; 1368 rc = sysdev_class_create_file(&etr_sysclass, &attr_stepping_port); 1369 if (rc) 1370 goto out_unreg_class; 1371 rc = sysdev_class_create_file(&etr_sysclass, &attr_stepping_mode); 1372 if (rc) 1373 goto out_remove_stepping_port; 1374 rc = etr_register_port(&etr_port0_dev); 1375 if (rc) 1376 goto out_remove_stepping_mode; 1377 rc = etr_register_port(&etr_port1_dev); 1378 if (rc) 1379 goto out_remove_port0; 1380 return 0; 1381 1382 out_remove_port0: 1383 etr_unregister_port(&etr_port0_dev); 1384 out_remove_stepping_mode: 1385 sysdev_class_remove_file(&etr_sysclass, &attr_stepping_mode); 1386 out_remove_stepping_port: 1387 sysdev_class_remove_file(&etr_sysclass, &attr_stepping_port); 1388 out_unreg_class: 1389 sysdev_class_unregister(&etr_sysclass); 1390 out: 1391 return rc; 1392 } 1393 1394 device_initcall(etr_init_sysfs); 1395 1396 /* 1397 * Server Time Protocol (STP) code. 1398 */ 1399 static int stp_online; 1400 static struct stp_sstpi stp_info; 1401 static void *stp_page; 1402 1403 static void stp_work_fn(struct work_struct *work); 1404 static DEFINE_MUTEX(stp_work_mutex); 1405 static DECLARE_WORK(stp_work, stp_work_fn); 1406 1407 static int __init early_parse_stp(char *p) 1408 { 1409 if (strncmp(p, "off", 3) == 0) 1410 stp_online = 0; 1411 else if (strncmp(p, "on", 2) == 0) 1412 stp_online = 1; 1413 return 0; 1414 } 1415 early_param("stp", early_parse_stp); 1416 1417 /* 1418 * Reset STP attachment. 1419 */ 1420 static void __init stp_reset(void) 1421 { 1422 int rc; 1423 1424 stp_page = alloc_bootmem_pages(PAGE_SIZE); 1425 rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000); 1426 if (rc == 0) 1427 set_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags); 1428 else if (stp_online) { 1429 pr_warning("The real or virtual hardware system does " 1430 "not provide an STP interface\n"); 1431 free_bootmem((unsigned long) stp_page, PAGE_SIZE); 1432 stp_page = NULL; 1433 stp_online = 0; 1434 } 1435 } 1436 1437 static int __init stp_init(void) 1438 { 1439 if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags)) 1440 return 0; 1441 time_init_wq(); 1442 if (!stp_online) 1443 return 0; 1444 queue_work(time_sync_wq, &stp_work); 1445 return 0; 1446 } 1447 1448 arch_initcall(stp_init); 1449 1450 /* 1451 * STP timing alert. There are three causes: 1452 * 1) timing status change 1453 * 2) link availability change 1454 * 3) time control parameter change 1455 * In all three cases we are only interested in the clock source state. 1456 * If a STP clock source is now available use it. 1457 */ 1458 static void stp_timing_alert(struct stp_irq_parm *intparm) 1459 { 1460 if (intparm->tsc || intparm->lac || intparm->tcpc) 1461 queue_work(time_sync_wq, &stp_work); 1462 } 1463 1464 /* 1465 * STP sync check machine check. This is called when the timing state 1466 * changes from the synchronized state to the unsynchronized state. 1467 * After a STP sync check the clock is not in sync. The machine check 1468 * is broadcasted to all cpus at the same time. 1469 */ 1470 void stp_sync_check(void) 1471 { 1472 if (!test_bit(CLOCK_SYNC_STP, &clock_sync_flags)) 1473 return; 1474 disable_sync_clock(NULL); 1475 queue_work(time_sync_wq, &stp_work); 1476 } 1477 1478 /* 1479 * STP island condition machine check. This is called when an attached 1480 * server attempts to communicate over an STP link and the servers 1481 * have matching CTN ids and have a valid stratum-1 configuration 1482 * but the configurations do not match. 1483 */ 1484 void stp_island_check(void) 1485 { 1486 if (!test_bit(CLOCK_SYNC_STP, &clock_sync_flags)) 1487 return; 1488 disable_sync_clock(NULL); 1489 queue_work(time_sync_wq, &stp_work); 1490 } 1491 1492 1493 static int stp_sync_clock(void *data) 1494 { 1495 static int first; 1496 unsigned long long old_clock, delta; 1497 struct clock_sync_data *stp_sync; 1498 int rc; 1499 1500 stp_sync = data; 1501 1502 if (xchg(&first, 1) == 1) { 1503 /* Slave */ 1504 clock_sync_cpu(stp_sync); 1505 return 0; 1506 } 1507 1508 /* Wait until all other cpus entered the sync function. */ 1509 while (atomic_read(&stp_sync->cpus) != 0) 1510 cpu_relax(); 1511 1512 enable_sync_clock(); 1513 1514 set_bit(CLOCK_SYNC_STP, &clock_sync_flags); 1515 if (test_and_clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags)) 1516 queue_work(time_sync_wq, &etr_work); 1517 1518 rc = 0; 1519 if (stp_info.todoff[0] || stp_info.todoff[1] || 1520 stp_info.todoff[2] || stp_info.todoff[3] || 1521 stp_info.tmd != 2) { 1522 old_clock = get_clock(); 1523 rc = chsc_sstpc(stp_page, STP_OP_SYNC, 0); 1524 if (rc == 0) { 1525 delta = adjust_time(old_clock, get_clock(), 0); 1526 fixup_clock_comparator(delta); 1527 rc = chsc_sstpi(stp_page, &stp_info, 1528 sizeof(struct stp_sstpi)); 1529 if (rc == 0 && stp_info.tmd != 2) 1530 rc = -EAGAIN; 1531 } 1532 } 1533 if (rc) { 1534 disable_sync_clock(NULL); 1535 stp_sync->in_sync = -EAGAIN; 1536 clear_bit(CLOCK_SYNC_STP, &clock_sync_flags); 1537 if (etr_port0_online || etr_port1_online) 1538 queue_work(time_sync_wq, &etr_work); 1539 } else 1540 stp_sync->in_sync = 1; 1541 xchg(&first, 0); 1542 return 0; 1543 } 1544 1545 /* 1546 * STP work. Check for the STP state and take over the clock 1547 * synchronization if the STP clock source is usable. 1548 */ 1549 static void stp_work_fn(struct work_struct *work) 1550 { 1551 struct clock_sync_data stp_sync; 1552 int rc; 1553 1554 /* prevent multiple execution. */ 1555 mutex_lock(&stp_work_mutex); 1556 1557 if (!stp_online) { 1558 chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000); 1559 goto out_unlock; 1560 } 1561 1562 rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0xb0e0); 1563 if (rc) 1564 goto out_unlock; 1565 1566 rc = chsc_sstpi(stp_page, &stp_info, sizeof(struct stp_sstpi)); 1567 if (rc || stp_info.c == 0) 1568 goto out_unlock; 1569 1570 memset(&stp_sync, 0, sizeof(stp_sync)); 1571 get_online_cpus(); 1572 atomic_set(&stp_sync.cpus, num_online_cpus() - 1); 1573 stop_machine(stp_sync_clock, &stp_sync, &cpu_online_map); 1574 put_online_cpus(); 1575 1576 out_unlock: 1577 mutex_unlock(&stp_work_mutex); 1578 } 1579 1580 /* 1581 * STP class sysfs interface functions 1582 */ 1583 static struct sysdev_class stp_sysclass = { 1584 .name = "stp", 1585 }; 1586 1587 static ssize_t stp_ctn_id_show(struct sysdev_class *class, char *buf) 1588 { 1589 if (!stp_online) 1590 return -ENODATA; 1591 return sprintf(buf, "%016llx\n", 1592 *(unsigned long long *) stp_info.ctnid); 1593 } 1594 1595 static SYSDEV_CLASS_ATTR(ctn_id, 0400, stp_ctn_id_show, NULL); 1596 1597 static ssize_t stp_ctn_type_show(struct sysdev_class *class, char *buf) 1598 { 1599 if (!stp_online) 1600 return -ENODATA; 1601 return sprintf(buf, "%i\n", stp_info.ctn); 1602 } 1603 1604 static SYSDEV_CLASS_ATTR(ctn_type, 0400, stp_ctn_type_show, NULL); 1605 1606 static ssize_t stp_dst_offset_show(struct sysdev_class *class, char *buf) 1607 { 1608 if (!stp_online || !(stp_info.vbits & 0x2000)) 1609 return -ENODATA; 1610 return sprintf(buf, "%i\n", (int)(s16) stp_info.dsto); 1611 } 1612 1613 static SYSDEV_CLASS_ATTR(dst_offset, 0400, stp_dst_offset_show, NULL); 1614 1615 static ssize_t stp_leap_seconds_show(struct sysdev_class *class, char *buf) 1616 { 1617 if (!stp_online || !(stp_info.vbits & 0x8000)) 1618 return -ENODATA; 1619 return sprintf(buf, "%i\n", (int)(s16) stp_info.leaps); 1620 } 1621 1622 static SYSDEV_CLASS_ATTR(leap_seconds, 0400, stp_leap_seconds_show, NULL); 1623 1624 static ssize_t stp_stratum_show(struct sysdev_class *class, char *buf) 1625 { 1626 if (!stp_online) 1627 return -ENODATA; 1628 return sprintf(buf, "%i\n", (int)(s16) stp_info.stratum); 1629 } 1630 1631 static SYSDEV_CLASS_ATTR(stratum, 0400, stp_stratum_show, NULL); 1632 1633 static ssize_t stp_time_offset_show(struct sysdev_class *class, char *buf) 1634 { 1635 if (!stp_online || !(stp_info.vbits & 0x0800)) 1636 return -ENODATA; 1637 return sprintf(buf, "%i\n", (int) stp_info.tto); 1638 } 1639 1640 static SYSDEV_CLASS_ATTR(time_offset, 0400, stp_time_offset_show, NULL); 1641 1642 static ssize_t stp_time_zone_offset_show(struct sysdev_class *class, char *buf) 1643 { 1644 if (!stp_online || !(stp_info.vbits & 0x4000)) 1645 return -ENODATA; 1646 return sprintf(buf, "%i\n", (int)(s16) stp_info.tzo); 1647 } 1648 1649 static SYSDEV_CLASS_ATTR(time_zone_offset, 0400, 1650 stp_time_zone_offset_show, NULL); 1651 1652 static ssize_t stp_timing_mode_show(struct sysdev_class *class, char *buf) 1653 { 1654 if (!stp_online) 1655 return -ENODATA; 1656 return sprintf(buf, "%i\n", stp_info.tmd); 1657 } 1658 1659 static SYSDEV_CLASS_ATTR(timing_mode, 0400, stp_timing_mode_show, NULL); 1660 1661 static ssize_t stp_timing_state_show(struct sysdev_class *class, char *buf) 1662 { 1663 if (!stp_online) 1664 return -ENODATA; 1665 return sprintf(buf, "%i\n", stp_info.tst); 1666 } 1667 1668 static SYSDEV_CLASS_ATTR(timing_state, 0400, stp_timing_state_show, NULL); 1669 1670 static ssize_t stp_online_show(struct sysdev_class *class, char *buf) 1671 { 1672 return sprintf(buf, "%i\n", stp_online); 1673 } 1674 1675 static ssize_t stp_online_store(struct sysdev_class *class, 1676 const char *buf, size_t count) 1677 { 1678 unsigned int value; 1679 1680 value = simple_strtoul(buf, NULL, 0); 1681 if (value != 0 && value != 1) 1682 return -EINVAL; 1683 if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags)) 1684 return -EOPNOTSUPP; 1685 stp_online = value; 1686 queue_work(time_sync_wq, &stp_work); 1687 return count; 1688 } 1689 1690 /* 1691 * Can't use SYSDEV_CLASS_ATTR because the attribute should be named 1692 * stp/online but attr_online already exists in this file .. 1693 */ 1694 static struct sysdev_class_attribute attr_stp_online = { 1695 .attr = { .name = "online", .mode = 0600 }, 1696 .show = stp_online_show, 1697 .store = stp_online_store, 1698 }; 1699 1700 static struct sysdev_class_attribute *stp_attributes[] = { 1701 &attr_ctn_id, 1702 &attr_ctn_type, 1703 &attr_dst_offset, 1704 &attr_leap_seconds, 1705 &attr_stp_online, 1706 &attr_stratum, 1707 &attr_time_offset, 1708 &attr_time_zone_offset, 1709 &attr_timing_mode, 1710 &attr_timing_state, 1711 NULL 1712 }; 1713 1714 static int __init stp_init_sysfs(void) 1715 { 1716 struct sysdev_class_attribute **attr; 1717 int rc; 1718 1719 rc = sysdev_class_register(&stp_sysclass); 1720 if (rc) 1721 goto out; 1722 for (attr = stp_attributes; *attr; attr++) { 1723 rc = sysdev_class_create_file(&stp_sysclass, *attr); 1724 if (rc) 1725 goto out_unreg; 1726 } 1727 return 0; 1728 out_unreg: 1729 for (; attr >= stp_attributes; attr--) 1730 sysdev_class_remove_file(&stp_sysclass, *attr); 1731 sysdev_class_unregister(&stp_sysclass); 1732 out: 1733 return rc; 1734 } 1735 1736 device_initcall(stp_init_sysfs); 1737