1 /* 2 * arch/s390/kernel/time.c 3 * Time of day based timer functions. 4 * 5 * S390 version 6 * Copyright IBM Corp. 1999, 2008 7 * Author(s): Hartmut Penner (hp@de.ibm.com), 8 * Martin Schwidefsky (schwidefsky@de.ibm.com), 9 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com) 10 * 11 * Derived from "arch/i386/kernel/time.c" 12 * Copyright (C) 1991, 1992, 1995 Linus Torvalds 13 */ 14 15 #define KMSG_COMPONENT "time" 16 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt 17 18 #include <linux/errno.h> 19 #include <linux/module.h> 20 #include <linux/sched.h> 21 #include <linux/kernel.h> 22 #include <linux/param.h> 23 #include <linux/string.h> 24 #include <linux/mm.h> 25 #include <linux/interrupt.h> 26 #include <linux/cpu.h> 27 #include <linux/stop_machine.h> 28 #include <linux/time.h> 29 #include <linux/sysdev.h> 30 #include <linux/delay.h> 31 #include <linux/init.h> 32 #include <linux/smp.h> 33 #include <linux/types.h> 34 #include <linux/profile.h> 35 #include <linux/timex.h> 36 #include <linux/notifier.h> 37 #include <linux/clocksource.h> 38 #include <linux/clockchips.h> 39 #include <asm/uaccess.h> 40 #include <asm/delay.h> 41 #include <asm/s390_ext.h> 42 #include <asm/div64.h> 43 #include <asm/vdso.h> 44 #include <asm/irq.h> 45 #include <asm/irq_regs.h> 46 #include <asm/timer.h> 47 #include <asm/etr.h> 48 #include <asm/cio.h> 49 50 /* change this if you have some constant time drift */ 51 #define USECS_PER_JIFFY ((unsigned long) 1000000/HZ) 52 #define CLK_TICKS_PER_JIFFY ((unsigned long) USECS_PER_JIFFY << 12) 53 54 /* 55 * Create a small time difference between the timer interrupts 56 * on the different cpus to avoid lock contention. 57 */ 58 #define CPU_DEVIATION (smp_processor_id() << 12) 59 60 #define TICK_SIZE tick 61 62 u64 sched_clock_base_cc = -1; /* Force to data section. */ 63 EXPORT_SYMBOL_GPL(sched_clock_base_cc); 64 65 static DEFINE_PER_CPU(struct clock_event_device, comparators); 66 67 /* 68 * Scheduler clock - returns current time in nanosec units. 69 */ 70 unsigned long long notrace sched_clock(void) 71 { 72 return (get_clock_monotonic() * 125) >> 9; 73 } 74 75 /* 76 * Monotonic_clock - returns # of nanoseconds passed since time_init() 77 */ 78 unsigned long long monotonic_clock(void) 79 { 80 return sched_clock(); 81 } 82 EXPORT_SYMBOL(monotonic_clock); 83 84 void tod_to_timeval(__u64 todval, struct timespec *xtime) 85 { 86 unsigned long long sec; 87 88 sec = todval >> 12; 89 do_div(sec, 1000000); 90 xtime->tv_sec = sec; 91 todval -= (sec * 1000000) << 12; 92 xtime->tv_nsec = ((todval * 1000) >> 12); 93 } 94 EXPORT_SYMBOL(tod_to_timeval); 95 96 void clock_comparator_work(void) 97 { 98 struct clock_event_device *cd; 99 100 S390_lowcore.clock_comparator = -1ULL; 101 set_clock_comparator(S390_lowcore.clock_comparator); 102 cd = &__get_cpu_var(comparators); 103 cd->event_handler(cd); 104 } 105 106 /* 107 * Fixup the clock comparator. 108 */ 109 static void fixup_clock_comparator(unsigned long long delta) 110 { 111 /* If nobody is waiting there's nothing to fix. */ 112 if (S390_lowcore.clock_comparator == -1ULL) 113 return; 114 S390_lowcore.clock_comparator += delta; 115 set_clock_comparator(S390_lowcore.clock_comparator); 116 } 117 118 static int s390_next_event(unsigned long delta, 119 struct clock_event_device *evt) 120 { 121 S390_lowcore.clock_comparator = get_clock() + delta; 122 set_clock_comparator(S390_lowcore.clock_comparator); 123 return 0; 124 } 125 126 static void s390_set_mode(enum clock_event_mode mode, 127 struct clock_event_device *evt) 128 { 129 } 130 131 /* 132 * Set up lowcore and control register of the current cpu to 133 * enable TOD clock and clock comparator interrupts. 134 */ 135 void init_cpu_timer(void) 136 { 137 struct clock_event_device *cd; 138 int cpu; 139 140 S390_lowcore.clock_comparator = -1ULL; 141 set_clock_comparator(S390_lowcore.clock_comparator); 142 143 cpu = smp_processor_id(); 144 cd = &per_cpu(comparators, cpu); 145 cd->name = "comparator"; 146 cd->features = CLOCK_EVT_FEAT_ONESHOT; 147 cd->mult = 16777; 148 cd->shift = 12; 149 cd->min_delta_ns = 1; 150 cd->max_delta_ns = LONG_MAX; 151 cd->rating = 400; 152 cd->cpumask = cpumask_of(cpu); 153 cd->set_next_event = s390_next_event; 154 cd->set_mode = s390_set_mode; 155 156 clockevents_register_device(cd); 157 158 /* Enable clock comparator timer interrupt. */ 159 __ctl_set_bit(0,11); 160 161 /* Always allow the timing alert external interrupt. */ 162 __ctl_set_bit(0, 4); 163 } 164 165 static void clock_comparator_interrupt(__u16 code) 166 { 167 if (S390_lowcore.clock_comparator == -1ULL) 168 set_clock_comparator(S390_lowcore.clock_comparator); 169 } 170 171 static void etr_timing_alert(struct etr_irq_parm *); 172 static void stp_timing_alert(struct stp_irq_parm *); 173 174 static void timing_alert_interrupt(__u16 code) 175 { 176 if (S390_lowcore.ext_params & 0x00c40000) 177 etr_timing_alert((struct etr_irq_parm *) 178 &S390_lowcore.ext_params); 179 if (S390_lowcore.ext_params & 0x00038000) 180 stp_timing_alert((struct stp_irq_parm *) 181 &S390_lowcore.ext_params); 182 } 183 184 static void etr_reset(void); 185 static void stp_reset(void); 186 187 void read_persistent_clock(struct timespec *ts) 188 { 189 tod_to_timeval(get_clock() - TOD_UNIX_EPOCH, ts); 190 } 191 192 void read_boot_clock(struct timespec *ts) 193 { 194 tod_to_timeval(sched_clock_base_cc - TOD_UNIX_EPOCH, ts); 195 } 196 197 static cycle_t read_tod_clock(struct clocksource *cs) 198 { 199 return get_clock(); 200 } 201 202 static struct clocksource clocksource_tod = { 203 .name = "tod", 204 .rating = 400, 205 .read = read_tod_clock, 206 .mask = -1ULL, 207 .mult = 1000, 208 .shift = 12, 209 .flags = CLOCK_SOURCE_IS_CONTINUOUS, 210 }; 211 212 struct clocksource * __init clocksource_default_clock(void) 213 { 214 return &clocksource_tod; 215 } 216 217 void update_vsyscall(struct timespec *wall_time, struct clocksource *clock, 218 u32 mult) 219 { 220 if (clock != &clocksource_tod) 221 return; 222 223 /* Make userspace gettimeofday spin until we're done. */ 224 ++vdso_data->tb_update_count; 225 smp_wmb(); 226 vdso_data->xtime_tod_stamp = clock->cycle_last; 227 vdso_data->xtime_clock_sec = xtime.tv_sec; 228 vdso_data->xtime_clock_nsec = xtime.tv_nsec; 229 vdso_data->wtom_clock_sec = wall_to_monotonic.tv_sec; 230 vdso_data->wtom_clock_nsec = wall_to_monotonic.tv_nsec; 231 smp_wmb(); 232 ++vdso_data->tb_update_count; 233 } 234 235 extern struct timezone sys_tz; 236 237 void update_vsyscall_tz(void) 238 { 239 /* Make userspace gettimeofday spin until we're done. */ 240 ++vdso_data->tb_update_count; 241 smp_wmb(); 242 vdso_data->tz_minuteswest = sys_tz.tz_minuteswest; 243 vdso_data->tz_dsttime = sys_tz.tz_dsttime; 244 smp_wmb(); 245 ++vdso_data->tb_update_count; 246 } 247 248 /* 249 * Initialize the TOD clock and the CPU timer of 250 * the boot cpu. 251 */ 252 void __init time_init(void) 253 { 254 /* Reset time synchronization interfaces. */ 255 etr_reset(); 256 stp_reset(); 257 258 /* request the clock comparator external interrupt */ 259 if (register_external_interrupt(0x1004, clock_comparator_interrupt)) 260 panic("Couldn't request external interrupt 0x1004"); 261 262 /* request the timing alert external interrupt */ 263 if (register_external_interrupt(0x1406, timing_alert_interrupt)) 264 panic("Couldn't request external interrupt 0x1406"); 265 266 if (clocksource_register(&clocksource_tod) != 0) 267 panic("Could not register TOD clock source"); 268 269 /* Enable TOD clock interrupts on the boot cpu. */ 270 init_cpu_timer(); 271 272 /* Enable cpu timer interrupts on the boot cpu. */ 273 vtime_init(); 274 } 275 276 /* 277 * The time is "clock". old is what we think the time is. 278 * Adjust the value by a multiple of jiffies and add the delta to ntp. 279 * "delay" is an approximation how long the synchronization took. If 280 * the time correction is positive, then "delay" is subtracted from 281 * the time difference and only the remaining part is passed to ntp. 282 */ 283 static unsigned long long adjust_time(unsigned long long old, 284 unsigned long long clock, 285 unsigned long long delay) 286 { 287 unsigned long long delta, ticks; 288 struct timex adjust; 289 290 if (clock > old) { 291 /* It is later than we thought. */ 292 delta = ticks = clock - old; 293 delta = ticks = (delta < delay) ? 0 : delta - delay; 294 delta -= do_div(ticks, CLK_TICKS_PER_JIFFY); 295 adjust.offset = ticks * (1000000 / HZ); 296 } else { 297 /* It is earlier than we thought. */ 298 delta = ticks = old - clock; 299 delta -= do_div(ticks, CLK_TICKS_PER_JIFFY); 300 delta = -delta; 301 adjust.offset = -ticks * (1000000 / HZ); 302 } 303 sched_clock_base_cc += delta; 304 if (adjust.offset != 0) { 305 pr_notice("The ETR interface has adjusted the clock " 306 "by %li microseconds\n", adjust.offset); 307 adjust.modes = ADJ_OFFSET_SINGLESHOT; 308 do_adjtimex(&adjust); 309 } 310 return delta; 311 } 312 313 static DEFINE_PER_CPU(atomic_t, clock_sync_word); 314 static DEFINE_MUTEX(clock_sync_mutex); 315 static unsigned long clock_sync_flags; 316 317 #define CLOCK_SYNC_HAS_ETR 0 318 #define CLOCK_SYNC_HAS_STP 1 319 #define CLOCK_SYNC_ETR 2 320 #define CLOCK_SYNC_STP 3 321 322 /* 323 * The synchronous get_clock function. It will write the current clock 324 * value to the clock pointer and return 0 if the clock is in sync with 325 * the external time source. If the clock mode is local it will return 326 * -ENOSYS and -EAGAIN if the clock is not in sync with the external 327 * reference. 328 */ 329 int get_sync_clock(unsigned long long *clock) 330 { 331 atomic_t *sw_ptr; 332 unsigned int sw0, sw1; 333 334 sw_ptr = &get_cpu_var(clock_sync_word); 335 sw0 = atomic_read(sw_ptr); 336 *clock = get_clock(); 337 sw1 = atomic_read(sw_ptr); 338 put_cpu_var(clock_sync_word); 339 if (sw0 == sw1 && (sw0 & 0x80000000U)) 340 /* Success: time is in sync. */ 341 return 0; 342 if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags) && 343 !test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags)) 344 return -ENOSYS; 345 if (!test_bit(CLOCK_SYNC_ETR, &clock_sync_flags) && 346 !test_bit(CLOCK_SYNC_STP, &clock_sync_flags)) 347 return -EACCES; 348 return -EAGAIN; 349 } 350 EXPORT_SYMBOL(get_sync_clock); 351 352 /* 353 * Make get_sync_clock return -EAGAIN. 354 */ 355 static void disable_sync_clock(void *dummy) 356 { 357 atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word); 358 /* 359 * Clear the in-sync bit 2^31. All get_sync_clock calls will 360 * fail until the sync bit is turned back on. In addition 361 * increase the "sequence" counter to avoid the race of an 362 * etr event and the complete recovery against get_sync_clock. 363 */ 364 atomic_clear_mask(0x80000000, sw_ptr); 365 atomic_inc(sw_ptr); 366 } 367 368 /* 369 * Make get_sync_clock return 0 again. 370 * Needs to be called from a context disabled for preemption. 371 */ 372 static void enable_sync_clock(void) 373 { 374 atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word); 375 atomic_set_mask(0x80000000, sw_ptr); 376 } 377 378 /* 379 * Function to check if the clock is in sync. 380 */ 381 static inline int check_sync_clock(void) 382 { 383 atomic_t *sw_ptr; 384 int rc; 385 386 sw_ptr = &get_cpu_var(clock_sync_word); 387 rc = (atomic_read(sw_ptr) & 0x80000000U) != 0; 388 put_cpu_var(clock_sync_word); 389 return rc; 390 } 391 392 /* Single threaded workqueue used for etr and stp sync events */ 393 static struct workqueue_struct *time_sync_wq; 394 395 static void __init time_init_wq(void) 396 { 397 if (time_sync_wq) 398 return; 399 time_sync_wq = create_singlethread_workqueue("timesync"); 400 stop_machine_create(); 401 } 402 403 /* 404 * External Time Reference (ETR) code. 405 */ 406 static int etr_port0_online; 407 static int etr_port1_online; 408 static int etr_steai_available; 409 410 static int __init early_parse_etr(char *p) 411 { 412 if (strncmp(p, "off", 3) == 0) 413 etr_port0_online = etr_port1_online = 0; 414 else if (strncmp(p, "port0", 5) == 0) 415 etr_port0_online = 1; 416 else if (strncmp(p, "port1", 5) == 0) 417 etr_port1_online = 1; 418 else if (strncmp(p, "on", 2) == 0) 419 etr_port0_online = etr_port1_online = 1; 420 return 0; 421 } 422 early_param("etr", early_parse_etr); 423 424 enum etr_event { 425 ETR_EVENT_PORT0_CHANGE, 426 ETR_EVENT_PORT1_CHANGE, 427 ETR_EVENT_PORT_ALERT, 428 ETR_EVENT_SYNC_CHECK, 429 ETR_EVENT_SWITCH_LOCAL, 430 ETR_EVENT_UPDATE, 431 }; 432 433 /* 434 * Valid bit combinations of the eacr register are (x = don't care): 435 * e0 e1 dp p0 p1 ea es sl 436 * 0 0 x 0 0 0 0 0 initial, disabled state 437 * 0 0 x 0 1 1 0 0 port 1 online 438 * 0 0 x 1 0 1 0 0 port 0 online 439 * 0 0 x 1 1 1 0 0 both ports online 440 * 0 1 x 0 1 1 0 0 port 1 online and usable, ETR or PPS mode 441 * 0 1 x 0 1 1 0 1 port 1 online, usable and ETR mode 442 * 0 1 x 0 1 1 1 0 port 1 online, usable, PPS mode, in-sync 443 * 0 1 x 0 1 1 1 1 port 1 online, usable, ETR mode, in-sync 444 * 0 1 x 1 1 1 0 0 both ports online, port 1 usable 445 * 0 1 x 1 1 1 1 0 both ports online, port 1 usable, PPS mode, in-sync 446 * 0 1 x 1 1 1 1 1 both ports online, port 1 usable, ETR mode, in-sync 447 * 1 0 x 1 0 1 0 0 port 0 online and usable, ETR or PPS mode 448 * 1 0 x 1 0 1 0 1 port 0 online, usable and ETR mode 449 * 1 0 x 1 0 1 1 0 port 0 online, usable, PPS mode, in-sync 450 * 1 0 x 1 0 1 1 1 port 0 online, usable, ETR mode, in-sync 451 * 1 0 x 1 1 1 0 0 both ports online, port 0 usable 452 * 1 0 x 1 1 1 1 0 both ports online, port 0 usable, PPS mode, in-sync 453 * 1 0 x 1 1 1 1 1 both ports online, port 0 usable, ETR mode, in-sync 454 * 1 1 x 1 1 1 1 0 both ports online & usable, ETR, in-sync 455 * 1 1 x 1 1 1 1 1 both ports online & usable, ETR, in-sync 456 */ 457 static struct etr_eacr etr_eacr; 458 static u64 etr_tolec; /* time of last eacr update */ 459 static struct etr_aib etr_port0; 460 static int etr_port0_uptodate; 461 static struct etr_aib etr_port1; 462 static int etr_port1_uptodate; 463 static unsigned long etr_events; 464 static struct timer_list etr_timer; 465 466 static void etr_timeout(unsigned long dummy); 467 static void etr_work_fn(struct work_struct *work); 468 static DEFINE_MUTEX(etr_work_mutex); 469 static DECLARE_WORK(etr_work, etr_work_fn); 470 471 /* 472 * Reset ETR attachment. 473 */ 474 static void etr_reset(void) 475 { 476 etr_eacr = (struct etr_eacr) { 477 .e0 = 0, .e1 = 0, ._pad0 = 4, .dp = 0, 478 .p0 = 0, .p1 = 0, ._pad1 = 0, .ea = 0, 479 .es = 0, .sl = 0 }; 480 if (etr_setr(&etr_eacr) == 0) { 481 etr_tolec = get_clock(); 482 set_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags); 483 if (etr_port0_online && etr_port1_online) 484 set_bit(CLOCK_SYNC_ETR, &clock_sync_flags); 485 } else if (etr_port0_online || etr_port1_online) { 486 pr_warning("The real or virtual hardware system does " 487 "not provide an ETR interface\n"); 488 etr_port0_online = etr_port1_online = 0; 489 } 490 } 491 492 static int __init etr_init(void) 493 { 494 struct etr_aib aib; 495 496 if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags)) 497 return 0; 498 time_init_wq(); 499 /* Check if this machine has the steai instruction. */ 500 if (etr_steai(&aib, ETR_STEAI_STEPPING_PORT) == 0) 501 etr_steai_available = 1; 502 setup_timer(&etr_timer, etr_timeout, 0UL); 503 if (etr_port0_online) { 504 set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events); 505 queue_work(time_sync_wq, &etr_work); 506 } 507 if (etr_port1_online) { 508 set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events); 509 queue_work(time_sync_wq, &etr_work); 510 } 511 return 0; 512 } 513 514 arch_initcall(etr_init); 515 516 /* 517 * Two sorts of ETR machine checks. The architecture reads: 518 * "When a machine-check niterruption occurs and if a switch-to-local or 519 * ETR-sync-check interrupt request is pending but disabled, this pending 520 * disabled interruption request is indicated and is cleared". 521 * Which means that we can get etr_switch_to_local events from the machine 522 * check handler although the interruption condition is disabled. Lovely.. 523 */ 524 525 /* 526 * Switch to local machine check. This is called when the last usable 527 * ETR port goes inactive. After switch to local the clock is not in sync. 528 */ 529 void etr_switch_to_local(void) 530 { 531 if (!etr_eacr.sl) 532 return; 533 disable_sync_clock(NULL); 534 set_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events); 535 queue_work(time_sync_wq, &etr_work); 536 } 537 538 /* 539 * ETR sync check machine check. This is called when the ETR OTE and the 540 * local clock OTE are farther apart than the ETR sync check tolerance. 541 * After a ETR sync check the clock is not in sync. The machine check 542 * is broadcasted to all cpus at the same time. 543 */ 544 void etr_sync_check(void) 545 { 546 if (!etr_eacr.es) 547 return; 548 disable_sync_clock(NULL); 549 set_bit(ETR_EVENT_SYNC_CHECK, &etr_events); 550 queue_work(time_sync_wq, &etr_work); 551 } 552 553 /* 554 * ETR timing alert. There are two causes: 555 * 1) port state change, check the usability of the port 556 * 2) port alert, one of the ETR-data-validity bits (v1-v2 bits of the 557 * sldr-status word) or ETR-data word 1 (edf1) or ETR-data word 3 (edf3) 558 * or ETR-data word 4 (edf4) has changed. 559 */ 560 static void etr_timing_alert(struct etr_irq_parm *intparm) 561 { 562 if (intparm->pc0) 563 /* ETR port 0 state change. */ 564 set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events); 565 if (intparm->pc1) 566 /* ETR port 1 state change. */ 567 set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events); 568 if (intparm->eai) 569 /* 570 * ETR port alert on either port 0, 1 or both. 571 * Both ports are not up-to-date now. 572 */ 573 set_bit(ETR_EVENT_PORT_ALERT, &etr_events); 574 queue_work(time_sync_wq, &etr_work); 575 } 576 577 static void etr_timeout(unsigned long dummy) 578 { 579 set_bit(ETR_EVENT_UPDATE, &etr_events); 580 queue_work(time_sync_wq, &etr_work); 581 } 582 583 /* 584 * Check if the etr mode is pss. 585 */ 586 static inline int etr_mode_is_pps(struct etr_eacr eacr) 587 { 588 return eacr.es && !eacr.sl; 589 } 590 591 /* 592 * Check if the etr mode is etr. 593 */ 594 static inline int etr_mode_is_etr(struct etr_eacr eacr) 595 { 596 return eacr.es && eacr.sl; 597 } 598 599 /* 600 * Check if the port can be used for TOD synchronization. 601 * For PPS mode the port has to receive OTEs. For ETR mode 602 * the port has to receive OTEs, the ETR stepping bit has to 603 * be zero and the validity bits for data frame 1, 2, and 3 604 * have to be 1. 605 */ 606 static int etr_port_valid(struct etr_aib *aib, int port) 607 { 608 unsigned int psc; 609 610 /* Check that this port is receiving OTEs. */ 611 if (aib->tsp == 0) 612 return 0; 613 614 psc = port ? aib->esw.psc1 : aib->esw.psc0; 615 if (psc == etr_lpsc_pps_mode) 616 return 1; 617 if (psc == etr_lpsc_operational_step) 618 return !aib->esw.y && aib->slsw.v1 && 619 aib->slsw.v2 && aib->slsw.v3; 620 return 0; 621 } 622 623 /* 624 * Check if two ports are on the same network. 625 */ 626 static int etr_compare_network(struct etr_aib *aib1, struct etr_aib *aib2) 627 { 628 // FIXME: any other fields we have to compare? 629 return aib1->edf1.net_id == aib2->edf1.net_id; 630 } 631 632 /* 633 * Wrapper for etr_stei that converts physical port states 634 * to logical port states to be consistent with the output 635 * of stetr (see etr_psc vs. etr_lpsc). 636 */ 637 static void etr_steai_cv(struct etr_aib *aib, unsigned int func) 638 { 639 BUG_ON(etr_steai(aib, func) != 0); 640 /* Convert port state to logical port state. */ 641 if (aib->esw.psc0 == 1) 642 aib->esw.psc0 = 2; 643 else if (aib->esw.psc0 == 0 && aib->esw.p == 0) 644 aib->esw.psc0 = 1; 645 if (aib->esw.psc1 == 1) 646 aib->esw.psc1 = 2; 647 else if (aib->esw.psc1 == 0 && aib->esw.p == 1) 648 aib->esw.psc1 = 1; 649 } 650 651 /* 652 * Check if the aib a2 is still connected to the same attachment as 653 * aib a1, the etv values differ by one and a2 is valid. 654 */ 655 static int etr_aib_follows(struct etr_aib *a1, struct etr_aib *a2, int p) 656 { 657 int state_a1, state_a2; 658 659 /* Paranoia check: e0/e1 should better be the same. */ 660 if (a1->esw.eacr.e0 != a2->esw.eacr.e0 || 661 a1->esw.eacr.e1 != a2->esw.eacr.e1) 662 return 0; 663 664 /* Still connected to the same etr ? */ 665 state_a1 = p ? a1->esw.psc1 : a1->esw.psc0; 666 state_a2 = p ? a2->esw.psc1 : a2->esw.psc0; 667 if (state_a1 == etr_lpsc_operational_step) { 668 if (state_a2 != etr_lpsc_operational_step || 669 a1->edf1.net_id != a2->edf1.net_id || 670 a1->edf1.etr_id != a2->edf1.etr_id || 671 a1->edf1.etr_pn != a2->edf1.etr_pn) 672 return 0; 673 } else if (state_a2 != etr_lpsc_pps_mode) 674 return 0; 675 676 /* The ETV value of a2 needs to be ETV of a1 + 1. */ 677 if (a1->edf2.etv + 1 != a2->edf2.etv) 678 return 0; 679 680 if (!etr_port_valid(a2, p)) 681 return 0; 682 683 return 1; 684 } 685 686 struct clock_sync_data { 687 atomic_t cpus; 688 int in_sync; 689 unsigned long long fixup_cc; 690 int etr_port; 691 struct etr_aib *etr_aib; 692 }; 693 694 static void clock_sync_cpu(struct clock_sync_data *sync) 695 { 696 atomic_dec(&sync->cpus); 697 enable_sync_clock(); 698 /* 699 * This looks like a busy wait loop but it isn't. etr_sync_cpus 700 * is called on all other cpus while the TOD clocks is stopped. 701 * __udelay will stop the cpu on an enabled wait psw until the 702 * TOD is running again. 703 */ 704 while (sync->in_sync == 0) { 705 __udelay(1); 706 /* 707 * A different cpu changes *in_sync. Therefore use 708 * barrier() to force memory access. 709 */ 710 barrier(); 711 } 712 if (sync->in_sync != 1) 713 /* Didn't work. Clear per-cpu in sync bit again. */ 714 disable_sync_clock(NULL); 715 /* 716 * This round of TOD syncing is done. Set the clock comparator 717 * to the next tick and let the processor continue. 718 */ 719 fixup_clock_comparator(sync->fixup_cc); 720 } 721 722 /* 723 * Sync the TOD clock using the port refered to by aibp. This port 724 * has to be enabled and the other port has to be disabled. The 725 * last eacr update has to be more than 1.6 seconds in the past. 726 */ 727 static int etr_sync_clock(void *data) 728 { 729 static int first; 730 unsigned long long clock, old_clock, delay, delta; 731 struct clock_sync_data *etr_sync; 732 struct etr_aib *sync_port, *aib; 733 int port; 734 int rc; 735 736 etr_sync = data; 737 738 if (xchg(&first, 1) == 1) { 739 /* Slave */ 740 clock_sync_cpu(etr_sync); 741 return 0; 742 } 743 744 /* Wait until all other cpus entered the sync function. */ 745 while (atomic_read(&etr_sync->cpus) != 0) 746 cpu_relax(); 747 748 port = etr_sync->etr_port; 749 aib = etr_sync->etr_aib; 750 sync_port = (port == 0) ? &etr_port0 : &etr_port1; 751 enable_sync_clock(); 752 753 /* Set clock to next OTE. */ 754 __ctl_set_bit(14, 21); 755 __ctl_set_bit(0, 29); 756 clock = ((unsigned long long) (aib->edf2.etv + 1)) << 32; 757 old_clock = get_clock(); 758 if (set_clock(clock) == 0) { 759 __udelay(1); /* Wait for the clock to start. */ 760 __ctl_clear_bit(0, 29); 761 __ctl_clear_bit(14, 21); 762 etr_stetr(aib); 763 /* Adjust Linux timing variables. */ 764 delay = (unsigned long long) 765 (aib->edf2.etv - sync_port->edf2.etv) << 32; 766 delta = adjust_time(old_clock, clock, delay); 767 etr_sync->fixup_cc = delta; 768 fixup_clock_comparator(delta); 769 /* Verify that the clock is properly set. */ 770 if (!etr_aib_follows(sync_port, aib, port)) { 771 /* Didn't work. */ 772 disable_sync_clock(NULL); 773 etr_sync->in_sync = -EAGAIN; 774 rc = -EAGAIN; 775 } else { 776 etr_sync->in_sync = 1; 777 rc = 0; 778 } 779 } else { 780 /* Could not set the clock ?!? */ 781 __ctl_clear_bit(0, 29); 782 __ctl_clear_bit(14, 21); 783 disable_sync_clock(NULL); 784 etr_sync->in_sync = -EAGAIN; 785 rc = -EAGAIN; 786 } 787 xchg(&first, 0); 788 return rc; 789 } 790 791 static int etr_sync_clock_stop(struct etr_aib *aib, int port) 792 { 793 struct clock_sync_data etr_sync; 794 struct etr_aib *sync_port; 795 int follows; 796 int rc; 797 798 /* Check if the current aib is adjacent to the sync port aib. */ 799 sync_port = (port == 0) ? &etr_port0 : &etr_port1; 800 follows = etr_aib_follows(sync_port, aib, port); 801 memcpy(sync_port, aib, sizeof(*aib)); 802 if (!follows) 803 return -EAGAIN; 804 memset(&etr_sync, 0, sizeof(etr_sync)); 805 etr_sync.etr_aib = aib; 806 etr_sync.etr_port = port; 807 get_online_cpus(); 808 atomic_set(&etr_sync.cpus, num_online_cpus() - 1); 809 rc = stop_machine(etr_sync_clock, &etr_sync, &cpu_online_map); 810 put_online_cpus(); 811 return rc; 812 } 813 814 /* 815 * Handle the immediate effects of the different events. 816 * The port change event is used for online/offline changes. 817 */ 818 static struct etr_eacr etr_handle_events(struct etr_eacr eacr) 819 { 820 if (test_and_clear_bit(ETR_EVENT_SYNC_CHECK, &etr_events)) 821 eacr.es = 0; 822 if (test_and_clear_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events)) 823 eacr.es = eacr.sl = 0; 824 if (test_and_clear_bit(ETR_EVENT_PORT_ALERT, &etr_events)) 825 etr_port0_uptodate = etr_port1_uptodate = 0; 826 827 if (test_and_clear_bit(ETR_EVENT_PORT0_CHANGE, &etr_events)) { 828 if (eacr.e0) 829 /* 830 * Port change of an enabled port. We have to 831 * assume that this can have caused an stepping 832 * port switch. 833 */ 834 etr_tolec = get_clock(); 835 eacr.p0 = etr_port0_online; 836 if (!eacr.p0) 837 eacr.e0 = 0; 838 etr_port0_uptodate = 0; 839 } 840 if (test_and_clear_bit(ETR_EVENT_PORT1_CHANGE, &etr_events)) { 841 if (eacr.e1) 842 /* 843 * Port change of an enabled port. We have to 844 * assume that this can have caused an stepping 845 * port switch. 846 */ 847 etr_tolec = get_clock(); 848 eacr.p1 = etr_port1_online; 849 if (!eacr.p1) 850 eacr.e1 = 0; 851 etr_port1_uptodate = 0; 852 } 853 clear_bit(ETR_EVENT_UPDATE, &etr_events); 854 return eacr; 855 } 856 857 /* 858 * Set up a timer that expires after the etr_tolec + 1.6 seconds if 859 * one of the ports needs an update. 860 */ 861 static void etr_set_tolec_timeout(unsigned long long now) 862 { 863 unsigned long micros; 864 865 if ((!etr_eacr.p0 || etr_port0_uptodate) && 866 (!etr_eacr.p1 || etr_port1_uptodate)) 867 return; 868 micros = (now > etr_tolec) ? ((now - etr_tolec) >> 12) : 0; 869 micros = (micros > 1600000) ? 0 : 1600000 - micros; 870 mod_timer(&etr_timer, jiffies + (micros * HZ) / 1000000 + 1); 871 } 872 873 /* 874 * Set up a time that expires after 1/2 second. 875 */ 876 static void etr_set_sync_timeout(void) 877 { 878 mod_timer(&etr_timer, jiffies + HZ/2); 879 } 880 881 /* 882 * Update the aib information for one or both ports. 883 */ 884 static struct etr_eacr etr_handle_update(struct etr_aib *aib, 885 struct etr_eacr eacr) 886 { 887 /* With both ports disabled the aib information is useless. */ 888 if (!eacr.e0 && !eacr.e1) 889 return eacr; 890 891 /* Update port0 or port1 with aib stored in etr_work_fn. */ 892 if (aib->esw.q == 0) { 893 /* Information for port 0 stored. */ 894 if (eacr.p0 && !etr_port0_uptodate) { 895 etr_port0 = *aib; 896 if (etr_port0_online) 897 etr_port0_uptodate = 1; 898 } 899 } else { 900 /* Information for port 1 stored. */ 901 if (eacr.p1 && !etr_port1_uptodate) { 902 etr_port1 = *aib; 903 if (etr_port0_online) 904 etr_port1_uptodate = 1; 905 } 906 } 907 908 /* 909 * Do not try to get the alternate port aib if the clock 910 * is not in sync yet. 911 */ 912 if (!check_sync_clock()) 913 return eacr; 914 915 /* 916 * If steai is available we can get the information about 917 * the other port immediately. If only stetr is available the 918 * data-port bit toggle has to be used. 919 */ 920 if (etr_steai_available) { 921 if (eacr.p0 && !etr_port0_uptodate) { 922 etr_steai_cv(&etr_port0, ETR_STEAI_PORT_0); 923 etr_port0_uptodate = 1; 924 } 925 if (eacr.p1 && !etr_port1_uptodate) { 926 etr_steai_cv(&etr_port1, ETR_STEAI_PORT_1); 927 etr_port1_uptodate = 1; 928 } 929 } else { 930 /* 931 * One port was updated above, if the other 932 * port is not uptodate toggle dp bit. 933 */ 934 if ((eacr.p0 && !etr_port0_uptodate) || 935 (eacr.p1 && !etr_port1_uptodate)) 936 eacr.dp ^= 1; 937 else 938 eacr.dp = 0; 939 } 940 return eacr; 941 } 942 943 /* 944 * Write new etr control register if it differs from the current one. 945 * Return 1 if etr_tolec has been updated as well. 946 */ 947 static void etr_update_eacr(struct etr_eacr eacr) 948 { 949 int dp_changed; 950 951 if (memcmp(&etr_eacr, &eacr, sizeof(eacr)) == 0) 952 /* No change, return. */ 953 return; 954 /* 955 * The disable of an active port of the change of the data port 956 * bit can/will cause a change in the data port. 957 */ 958 dp_changed = etr_eacr.e0 > eacr.e0 || etr_eacr.e1 > eacr.e1 || 959 (etr_eacr.dp ^ eacr.dp) != 0; 960 etr_eacr = eacr; 961 etr_setr(&etr_eacr); 962 if (dp_changed) 963 etr_tolec = get_clock(); 964 } 965 966 /* 967 * ETR work. In this function you'll find the main logic. In 968 * particular this is the only function that calls etr_update_eacr(), 969 * it "controls" the etr control register. 970 */ 971 static void etr_work_fn(struct work_struct *work) 972 { 973 unsigned long long now; 974 struct etr_eacr eacr; 975 struct etr_aib aib; 976 int sync_port; 977 978 /* prevent multiple execution. */ 979 mutex_lock(&etr_work_mutex); 980 981 /* Create working copy of etr_eacr. */ 982 eacr = etr_eacr; 983 984 /* Check for the different events and their immediate effects. */ 985 eacr = etr_handle_events(eacr); 986 987 /* Check if ETR is supposed to be active. */ 988 eacr.ea = eacr.p0 || eacr.p1; 989 if (!eacr.ea) { 990 /* Both ports offline. Reset everything. */ 991 eacr.dp = eacr.es = eacr.sl = 0; 992 on_each_cpu(disable_sync_clock, NULL, 1); 993 del_timer_sync(&etr_timer); 994 etr_update_eacr(eacr); 995 goto out_unlock; 996 } 997 998 /* Store aib to get the current ETR status word. */ 999 BUG_ON(etr_stetr(&aib) != 0); 1000 etr_port0.esw = etr_port1.esw = aib.esw; /* Copy status word. */ 1001 now = get_clock(); 1002 1003 /* 1004 * Update the port information if the last stepping port change 1005 * or data port change is older than 1.6 seconds. 1006 */ 1007 if (now >= etr_tolec + (1600000 << 12)) 1008 eacr = etr_handle_update(&aib, eacr); 1009 1010 /* 1011 * Select ports to enable. The prefered synchronization mode is PPS. 1012 * If a port can be enabled depends on a number of things: 1013 * 1) The port needs to be online and uptodate. A port is not 1014 * disabled just because it is not uptodate, but it is only 1015 * enabled if it is uptodate. 1016 * 2) The port needs to have the same mode (pps / etr). 1017 * 3) The port needs to be usable -> etr_port_valid() == 1 1018 * 4) To enable the second port the clock needs to be in sync. 1019 * 5) If both ports are useable and are ETR ports, the network id 1020 * has to be the same. 1021 * The eacr.sl bit is used to indicate etr mode vs. pps mode. 1022 */ 1023 if (eacr.p0 && aib.esw.psc0 == etr_lpsc_pps_mode) { 1024 eacr.sl = 0; 1025 eacr.e0 = 1; 1026 if (!etr_mode_is_pps(etr_eacr)) 1027 eacr.es = 0; 1028 if (!eacr.es || !eacr.p1 || aib.esw.psc1 != etr_lpsc_pps_mode) 1029 eacr.e1 = 0; 1030 // FIXME: uptodate checks ? 1031 else if (etr_port0_uptodate && etr_port1_uptodate) 1032 eacr.e1 = 1; 1033 sync_port = (etr_port0_uptodate && 1034 etr_port_valid(&etr_port0, 0)) ? 0 : -1; 1035 } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_pps_mode) { 1036 eacr.sl = 0; 1037 eacr.e0 = 0; 1038 eacr.e1 = 1; 1039 if (!etr_mode_is_pps(etr_eacr)) 1040 eacr.es = 0; 1041 sync_port = (etr_port1_uptodate && 1042 etr_port_valid(&etr_port1, 1)) ? 1 : -1; 1043 } else if (eacr.p0 && aib.esw.psc0 == etr_lpsc_operational_step) { 1044 eacr.sl = 1; 1045 eacr.e0 = 1; 1046 if (!etr_mode_is_etr(etr_eacr)) 1047 eacr.es = 0; 1048 if (!eacr.es || !eacr.p1 || 1049 aib.esw.psc1 != etr_lpsc_operational_alt) 1050 eacr.e1 = 0; 1051 else if (etr_port0_uptodate && etr_port1_uptodate && 1052 etr_compare_network(&etr_port0, &etr_port1)) 1053 eacr.e1 = 1; 1054 sync_port = (etr_port0_uptodate && 1055 etr_port_valid(&etr_port0, 0)) ? 0 : -1; 1056 } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_operational_step) { 1057 eacr.sl = 1; 1058 eacr.e0 = 0; 1059 eacr.e1 = 1; 1060 if (!etr_mode_is_etr(etr_eacr)) 1061 eacr.es = 0; 1062 sync_port = (etr_port1_uptodate && 1063 etr_port_valid(&etr_port1, 1)) ? 1 : -1; 1064 } else { 1065 /* Both ports not usable. */ 1066 eacr.es = eacr.sl = 0; 1067 sync_port = -1; 1068 } 1069 1070 /* 1071 * If the clock is in sync just update the eacr and return. 1072 * If there is no valid sync port wait for a port update. 1073 */ 1074 if (check_sync_clock() || sync_port < 0) { 1075 etr_update_eacr(eacr); 1076 etr_set_tolec_timeout(now); 1077 goto out_unlock; 1078 } 1079 1080 /* 1081 * Prepare control register for clock syncing 1082 * (reset data port bit, set sync check control. 1083 */ 1084 eacr.dp = 0; 1085 eacr.es = 1; 1086 1087 /* 1088 * Update eacr and try to synchronize the clock. If the update 1089 * of eacr caused a stepping port switch (or if we have to 1090 * assume that a stepping port switch has occured) or the 1091 * clock syncing failed, reset the sync check control bit 1092 * and set up a timer to try again after 0.5 seconds 1093 */ 1094 etr_update_eacr(eacr); 1095 if (now < etr_tolec + (1600000 << 12) || 1096 etr_sync_clock_stop(&aib, sync_port) != 0) { 1097 /* Sync failed. Try again in 1/2 second. */ 1098 eacr.es = 0; 1099 etr_update_eacr(eacr); 1100 etr_set_sync_timeout(); 1101 } else 1102 etr_set_tolec_timeout(now); 1103 out_unlock: 1104 mutex_unlock(&etr_work_mutex); 1105 } 1106 1107 /* 1108 * Sysfs interface functions 1109 */ 1110 static struct sysdev_class etr_sysclass = { 1111 .name = "etr", 1112 }; 1113 1114 static struct sys_device etr_port0_dev = { 1115 .id = 0, 1116 .cls = &etr_sysclass, 1117 }; 1118 1119 static struct sys_device etr_port1_dev = { 1120 .id = 1, 1121 .cls = &etr_sysclass, 1122 }; 1123 1124 /* 1125 * ETR class attributes 1126 */ 1127 static ssize_t etr_stepping_port_show(struct sysdev_class *class, char *buf) 1128 { 1129 return sprintf(buf, "%i\n", etr_port0.esw.p); 1130 } 1131 1132 static SYSDEV_CLASS_ATTR(stepping_port, 0400, etr_stepping_port_show, NULL); 1133 1134 static ssize_t etr_stepping_mode_show(struct sysdev_class *class, char *buf) 1135 { 1136 char *mode_str; 1137 1138 if (etr_mode_is_pps(etr_eacr)) 1139 mode_str = "pps"; 1140 else if (etr_mode_is_etr(etr_eacr)) 1141 mode_str = "etr"; 1142 else 1143 mode_str = "local"; 1144 return sprintf(buf, "%s\n", mode_str); 1145 } 1146 1147 static SYSDEV_CLASS_ATTR(stepping_mode, 0400, etr_stepping_mode_show, NULL); 1148 1149 /* 1150 * ETR port attributes 1151 */ 1152 static inline struct etr_aib *etr_aib_from_dev(struct sys_device *dev) 1153 { 1154 if (dev == &etr_port0_dev) 1155 return etr_port0_online ? &etr_port0 : NULL; 1156 else 1157 return etr_port1_online ? &etr_port1 : NULL; 1158 } 1159 1160 static ssize_t etr_online_show(struct sys_device *dev, 1161 struct sysdev_attribute *attr, 1162 char *buf) 1163 { 1164 unsigned int online; 1165 1166 online = (dev == &etr_port0_dev) ? etr_port0_online : etr_port1_online; 1167 return sprintf(buf, "%i\n", online); 1168 } 1169 1170 static ssize_t etr_online_store(struct sys_device *dev, 1171 struct sysdev_attribute *attr, 1172 const char *buf, size_t count) 1173 { 1174 unsigned int value; 1175 1176 value = simple_strtoul(buf, NULL, 0); 1177 if (value != 0 && value != 1) 1178 return -EINVAL; 1179 if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags)) 1180 return -EOPNOTSUPP; 1181 mutex_lock(&clock_sync_mutex); 1182 if (dev == &etr_port0_dev) { 1183 if (etr_port0_online == value) 1184 goto out; /* Nothing to do. */ 1185 etr_port0_online = value; 1186 if (etr_port0_online && etr_port1_online) 1187 set_bit(CLOCK_SYNC_ETR, &clock_sync_flags); 1188 else 1189 clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags); 1190 set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events); 1191 queue_work(time_sync_wq, &etr_work); 1192 } else { 1193 if (etr_port1_online == value) 1194 goto out; /* Nothing to do. */ 1195 etr_port1_online = value; 1196 if (etr_port0_online && etr_port1_online) 1197 set_bit(CLOCK_SYNC_ETR, &clock_sync_flags); 1198 else 1199 clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags); 1200 set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events); 1201 queue_work(time_sync_wq, &etr_work); 1202 } 1203 out: 1204 mutex_unlock(&clock_sync_mutex); 1205 return count; 1206 } 1207 1208 static SYSDEV_ATTR(online, 0600, etr_online_show, etr_online_store); 1209 1210 static ssize_t etr_stepping_control_show(struct sys_device *dev, 1211 struct sysdev_attribute *attr, 1212 char *buf) 1213 { 1214 return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ? 1215 etr_eacr.e0 : etr_eacr.e1); 1216 } 1217 1218 static SYSDEV_ATTR(stepping_control, 0400, etr_stepping_control_show, NULL); 1219 1220 static ssize_t etr_mode_code_show(struct sys_device *dev, 1221 struct sysdev_attribute *attr, char *buf) 1222 { 1223 if (!etr_port0_online && !etr_port1_online) 1224 /* Status word is not uptodate if both ports are offline. */ 1225 return -ENODATA; 1226 return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ? 1227 etr_port0.esw.psc0 : etr_port0.esw.psc1); 1228 } 1229 1230 static SYSDEV_ATTR(state_code, 0400, etr_mode_code_show, NULL); 1231 1232 static ssize_t etr_untuned_show(struct sys_device *dev, 1233 struct sysdev_attribute *attr, char *buf) 1234 { 1235 struct etr_aib *aib = etr_aib_from_dev(dev); 1236 1237 if (!aib || !aib->slsw.v1) 1238 return -ENODATA; 1239 return sprintf(buf, "%i\n", aib->edf1.u); 1240 } 1241 1242 static SYSDEV_ATTR(untuned, 0400, etr_untuned_show, NULL); 1243 1244 static ssize_t etr_network_id_show(struct sys_device *dev, 1245 struct sysdev_attribute *attr, char *buf) 1246 { 1247 struct etr_aib *aib = etr_aib_from_dev(dev); 1248 1249 if (!aib || !aib->slsw.v1) 1250 return -ENODATA; 1251 return sprintf(buf, "%i\n", aib->edf1.net_id); 1252 } 1253 1254 static SYSDEV_ATTR(network, 0400, etr_network_id_show, NULL); 1255 1256 static ssize_t etr_id_show(struct sys_device *dev, 1257 struct sysdev_attribute *attr, char *buf) 1258 { 1259 struct etr_aib *aib = etr_aib_from_dev(dev); 1260 1261 if (!aib || !aib->slsw.v1) 1262 return -ENODATA; 1263 return sprintf(buf, "%i\n", aib->edf1.etr_id); 1264 } 1265 1266 static SYSDEV_ATTR(id, 0400, etr_id_show, NULL); 1267 1268 static ssize_t etr_port_number_show(struct sys_device *dev, 1269 struct sysdev_attribute *attr, char *buf) 1270 { 1271 struct etr_aib *aib = etr_aib_from_dev(dev); 1272 1273 if (!aib || !aib->slsw.v1) 1274 return -ENODATA; 1275 return sprintf(buf, "%i\n", aib->edf1.etr_pn); 1276 } 1277 1278 static SYSDEV_ATTR(port, 0400, etr_port_number_show, NULL); 1279 1280 static ssize_t etr_coupled_show(struct sys_device *dev, 1281 struct sysdev_attribute *attr, char *buf) 1282 { 1283 struct etr_aib *aib = etr_aib_from_dev(dev); 1284 1285 if (!aib || !aib->slsw.v3) 1286 return -ENODATA; 1287 return sprintf(buf, "%i\n", aib->edf3.c); 1288 } 1289 1290 static SYSDEV_ATTR(coupled, 0400, etr_coupled_show, NULL); 1291 1292 static ssize_t etr_local_time_show(struct sys_device *dev, 1293 struct sysdev_attribute *attr, char *buf) 1294 { 1295 struct etr_aib *aib = etr_aib_from_dev(dev); 1296 1297 if (!aib || !aib->slsw.v3) 1298 return -ENODATA; 1299 return sprintf(buf, "%i\n", aib->edf3.blto); 1300 } 1301 1302 static SYSDEV_ATTR(local_time, 0400, etr_local_time_show, NULL); 1303 1304 static ssize_t etr_utc_offset_show(struct sys_device *dev, 1305 struct sysdev_attribute *attr, char *buf) 1306 { 1307 struct etr_aib *aib = etr_aib_from_dev(dev); 1308 1309 if (!aib || !aib->slsw.v3) 1310 return -ENODATA; 1311 return sprintf(buf, "%i\n", aib->edf3.buo); 1312 } 1313 1314 static SYSDEV_ATTR(utc_offset, 0400, etr_utc_offset_show, NULL); 1315 1316 static struct sysdev_attribute *etr_port_attributes[] = { 1317 &attr_online, 1318 &attr_stepping_control, 1319 &attr_state_code, 1320 &attr_untuned, 1321 &attr_network, 1322 &attr_id, 1323 &attr_port, 1324 &attr_coupled, 1325 &attr_local_time, 1326 &attr_utc_offset, 1327 NULL 1328 }; 1329 1330 static int __init etr_register_port(struct sys_device *dev) 1331 { 1332 struct sysdev_attribute **attr; 1333 int rc; 1334 1335 rc = sysdev_register(dev); 1336 if (rc) 1337 goto out; 1338 for (attr = etr_port_attributes; *attr; attr++) { 1339 rc = sysdev_create_file(dev, *attr); 1340 if (rc) 1341 goto out_unreg; 1342 } 1343 return 0; 1344 out_unreg: 1345 for (; attr >= etr_port_attributes; attr--) 1346 sysdev_remove_file(dev, *attr); 1347 sysdev_unregister(dev); 1348 out: 1349 return rc; 1350 } 1351 1352 static void __init etr_unregister_port(struct sys_device *dev) 1353 { 1354 struct sysdev_attribute **attr; 1355 1356 for (attr = etr_port_attributes; *attr; attr++) 1357 sysdev_remove_file(dev, *attr); 1358 sysdev_unregister(dev); 1359 } 1360 1361 static int __init etr_init_sysfs(void) 1362 { 1363 int rc; 1364 1365 rc = sysdev_class_register(&etr_sysclass); 1366 if (rc) 1367 goto out; 1368 rc = sysdev_class_create_file(&etr_sysclass, &attr_stepping_port); 1369 if (rc) 1370 goto out_unreg_class; 1371 rc = sysdev_class_create_file(&etr_sysclass, &attr_stepping_mode); 1372 if (rc) 1373 goto out_remove_stepping_port; 1374 rc = etr_register_port(&etr_port0_dev); 1375 if (rc) 1376 goto out_remove_stepping_mode; 1377 rc = etr_register_port(&etr_port1_dev); 1378 if (rc) 1379 goto out_remove_port0; 1380 return 0; 1381 1382 out_remove_port0: 1383 etr_unregister_port(&etr_port0_dev); 1384 out_remove_stepping_mode: 1385 sysdev_class_remove_file(&etr_sysclass, &attr_stepping_mode); 1386 out_remove_stepping_port: 1387 sysdev_class_remove_file(&etr_sysclass, &attr_stepping_port); 1388 out_unreg_class: 1389 sysdev_class_unregister(&etr_sysclass); 1390 out: 1391 return rc; 1392 } 1393 1394 device_initcall(etr_init_sysfs); 1395 1396 /* 1397 * Server Time Protocol (STP) code. 1398 */ 1399 static int stp_online; 1400 static struct stp_sstpi stp_info; 1401 static void *stp_page; 1402 1403 static void stp_work_fn(struct work_struct *work); 1404 static DEFINE_MUTEX(stp_work_mutex); 1405 static DECLARE_WORK(stp_work, stp_work_fn); 1406 static struct timer_list stp_timer; 1407 1408 static int __init early_parse_stp(char *p) 1409 { 1410 if (strncmp(p, "off", 3) == 0) 1411 stp_online = 0; 1412 else if (strncmp(p, "on", 2) == 0) 1413 stp_online = 1; 1414 return 0; 1415 } 1416 early_param("stp", early_parse_stp); 1417 1418 /* 1419 * Reset STP attachment. 1420 */ 1421 static void __init stp_reset(void) 1422 { 1423 int rc; 1424 1425 stp_page = (void *) get_zeroed_page(GFP_ATOMIC); 1426 rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000); 1427 if (rc == 0) 1428 set_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags); 1429 else if (stp_online) { 1430 pr_warning("The real or virtual hardware system does " 1431 "not provide an STP interface\n"); 1432 free_page((unsigned long) stp_page); 1433 stp_page = NULL; 1434 stp_online = 0; 1435 } 1436 } 1437 1438 static void stp_timeout(unsigned long dummy) 1439 { 1440 queue_work(time_sync_wq, &stp_work); 1441 } 1442 1443 static int __init stp_init(void) 1444 { 1445 if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags)) 1446 return 0; 1447 setup_timer(&stp_timer, stp_timeout, 0UL); 1448 time_init_wq(); 1449 if (!stp_online) 1450 return 0; 1451 queue_work(time_sync_wq, &stp_work); 1452 return 0; 1453 } 1454 1455 arch_initcall(stp_init); 1456 1457 /* 1458 * STP timing alert. There are three causes: 1459 * 1) timing status change 1460 * 2) link availability change 1461 * 3) time control parameter change 1462 * In all three cases we are only interested in the clock source state. 1463 * If a STP clock source is now available use it. 1464 */ 1465 static void stp_timing_alert(struct stp_irq_parm *intparm) 1466 { 1467 if (intparm->tsc || intparm->lac || intparm->tcpc) 1468 queue_work(time_sync_wq, &stp_work); 1469 } 1470 1471 /* 1472 * STP sync check machine check. This is called when the timing state 1473 * changes from the synchronized state to the unsynchronized state. 1474 * After a STP sync check the clock is not in sync. The machine check 1475 * is broadcasted to all cpus at the same time. 1476 */ 1477 void stp_sync_check(void) 1478 { 1479 disable_sync_clock(NULL); 1480 queue_work(time_sync_wq, &stp_work); 1481 } 1482 1483 /* 1484 * STP island condition machine check. This is called when an attached 1485 * server attempts to communicate over an STP link and the servers 1486 * have matching CTN ids and have a valid stratum-1 configuration 1487 * but the configurations do not match. 1488 */ 1489 void stp_island_check(void) 1490 { 1491 disable_sync_clock(NULL); 1492 queue_work(time_sync_wq, &stp_work); 1493 } 1494 1495 1496 static int stp_sync_clock(void *data) 1497 { 1498 static int first; 1499 unsigned long long old_clock, delta; 1500 struct clock_sync_data *stp_sync; 1501 int rc; 1502 1503 stp_sync = data; 1504 1505 if (xchg(&first, 1) == 1) { 1506 /* Slave */ 1507 clock_sync_cpu(stp_sync); 1508 return 0; 1509 } 1510 1511 /* Wait until all other cpus entered the sync function. */ 1512 while (atomic_read(&stp_sync->cpus) != 0) 1513 cpu_relax(); 1514 1515 enable_sync_clock(); 1516 1517 rc = 0; 1518 if (stp_info.todoff[0] || stp_info.todoff[1] || 1519 stp_info.todoff[2] || stp_info.todoff[3] || 1520 stp_info.tmd != 2) { 1521 old_clock = get_clock(); 1522 rc = chsc_sstpc(stp_page, STP_OP_SYNC, 0); 1523 if (rc == 0) { 1524 delta = adjust_time(old_clock, get_clock(), 0); 1525 fixup_clock_comparator(delta); 1526 rc = chsc_sstpi(stp_page, &stp_info, 1527 sizeof(struct stp_sstpi)); 1528 if (rc == 0 && stp_info.tmd != 2) 1529 rc = -EAGAIN; 1530 } 1531 } 1532 if (rc) { 1533 disable_sync_clock(NULL); 1534 stp_sync->in_sync = -EAGAIN; 1535 } else 1536 stp_sync->in_sync = 1; 1537 xchg(&first, 0); 1538 return 0; 1539 } 1540 1541 /* 1542 * STP work. Check for the STP state and take over the clock 1543 * synchronization if the STP clock source is usable. 1544 */ 1545 static void stp_work_fn(struct work_struct *work) 1546 { 1547 struct clock_sync_data stp_sync; 1548 int rc; 1549 1550 /* prevent multiple execution. */ 1551 mutex_lock(&stp_work_mutex); 1552 1553 if (!stp_online) { 1554 chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000); 1555 del_timer_sync(&stp_timer); 1556 goto out_unlock; 1557 } 1558 1559 rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0xb0e0); 1560 if (rc) 1561 goto out_unlock; 1562 1563 rc = chsc_sstpi(stp_page, &stp_info, sizeof(struct stp_sstpi)); 1564 if (rc || stp_info.c == 0) 1565 goto out_unlock; 1566 1567 /* Skip synchronization if the clock is already in sync. */ 1568 if (check_sync_clock()) 1569 goto out_unlock; 1570 1571 memset(&stp_sync, 0, sizeof(stp_sync)); 1572 get_online_cpus(); 1573 atomic_set(&stp_sync.cpus, num_online_cpus() - 1); 1574 stop_machine(stp_sync_clock, &stp_sync, &cpu_online_map); 1575 put_online_cpus(); 1576 1577 if (!check_sync_clock()) 1578 /* 1579 * There is a usable clock but the synchonization failed. 1580 * Retry after a second. 1581 */ 1582 mod_timer(&stp_timer, jiffies + HZ); 1583 1584 out_unlock: 1585 mutex_unlock(&stp_work_mutex); 1586 } 1587 1588 /* 1589 * STP class sysfs interface functions 1590 */ 1591 static struct sysdev_class stp_sysclass = { 1592 .name = "stp", 1593 }; 1594 1595 static ssize_t stp_ctn_id_show(struct sysdev_class *class, char *buf) 1596 { 1597 if (!stp_online) 1598 return -ENODATA; 1599 return sprintf(buf, "%016llx\n", 1600 *(unsigned long long *) stp_info.ctnid); 1601 } 1602 1603 static SYSDEV_CLASS_ATTR(ctn_id, 0400, stp_ctn_id_show, NULL); 1604 1605 static ssize_t stp_ctn_type_show(struct sysdev_class *class, char *buf) 1606 { 1607 if (!stp_online) 1608 return -ENODATA; 1609 return sprintf(buf, "%i\n", stp_info.ctn); 1610 } 1611 1612 static SYSDEV_CLASS_ATTR(ctn_type, 0400, stp_ctn_type_show, NULL); 1613 1614 static ssize_t stp_dst_offset_show(struct sysdev_class *class, char *buf) 1615 { 1616 if (!stp_online || !(stp_info.vbits & 0x2000)) 1617 return -ENODATA; 1618 return sprintf(buf, "%i\n", (int)(s16) stp_info.dsto); 1619 } 1620 1621 static SYSDEV_CLASS_ATTR(dst_offset, 0400, stp_dst_offset_show, NULL); 1622 1623 static ssize_t stp_leap_seconds_show(struct sysdev_class *class, char *buf) 1624 { 1625 if (!stp_online || !(stp_info.vbits & 0x8000)) 1626 return -ENODATA; 1627 return sprintf(buf, "%i\n", (int)(s16) stp_info.leaps); 1628 } 1629 1630 static SYSDEV_CLASS_ATTR(leap_seconds, 0400, stp_leap_seconds_show, NULL); 1631 1632 static ssize_t stp_stratum_show(struct sysdev_class *class, char *buf) 1633 { 1634 if (!stp_online) 1635 return -ENODATA; 1636 return sprintf(buf, "%i\n", (int)(s16) stp_info.stratum); 1637 } 1638 1639 static SYSDEV_CLASS_ATTR(stratum, 0400, stp_stratum_show, NULL); 1640 1641 static ssize_t stp_time_offset_show(struct sysdev_class *class, char *buf) 1642 { 1643 if (!stp_online || !(stp_info.vbits & 0x0800)) 1644 return -ENODATA; 1645 return sprintf(buf, "%i\n", (int) stp_info.tto); 1646 } 1647 1648 static SYSDEV_CLASS_ATTR(time_offset, 0400, stp_time_offset_show, NULL); 1649 1650 static ssize_t stp_time_zone_offset_show(struct sysdev_class *class, char *buf) 1651 { 1652 if (!stp_online || !(stp_info.vbits & 0x4000)) 1653 return -ENODATA; 1654 return sprintf(buf, "%i\n", (int)(s16) stp_info.tzo); 1655 } 1656 1657 static SYSDEV_CLASS_ATTR(time_zone_offset, 0400, 1658 stp_time_zone_offset_show, NULL); 1659 1660 static ssize_t stp_timing_mode_show(struct sysdev_class *class, char *buf) 1661 { 1662 if (!stp_online) 1663 return -ENODATA; 1664 return sprintf(buf, "%i\n", stp_info.tmd); 1665 } 1666 1667 static SYSDEV_CLASS_ATTR(timing_mode, 0400, stp_timing_mode_show, NULL); 1668 1669 static ssize_t stp_timing_state_show(struct sysdev_class *class, char *buf) 1670 { 1671 if (!stp_online) 1672 return -ENODATA; 1673 return sprintf(buf, "%i\n", stp_info.tst); 1674 } 1675 1676 static SYSDEV_CLASS_ATTR(timing_state, 0400, stp_timing_state_show, NULL); 1677 1678 static ssize_t stp_online_show(struct sysdev_class *class, char *buf) 1679 { 1680 return sprintf(buf, "%i\n", stp_online); 1681 } 1682 1683 static ssize_t stp_online_store(struct sysdev_class *class, 1684 const char *buf, size_t count) 1685 { 1686 unsigned int value; 1687 1688 value = simple_strtoul(buf, NULL, 0); 1689 if (value != 0 && value != 1) 1690 return -EINVAL; 1691 if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags)) 1692 return -EOPNOTSUPP; 1693 mutex_lock(&clock_sync_mutex); 1694 stp_online = value; 1695 if (stp_online) 1696 set_bit(CLOCK_SYNC_STP, &clock_sync_flags); 1697 else 1698 clear_bit(CLOCK_SYNC_STP, &clock_sync_flags); 1699 queue_work(time_sync_wq, &stp_work); 1700 mutex_unlock(&clock_sync_mutex); 1701 return count; 1702 } 1703 1704 /* 1705 * Can't use SYSDEV_CLASS_ATTR because the attribute should be named 1706 * stp/online but attr_online already exists in this file .. 1707 */ 1708 static struct sysdev_class_attribute attr_stp_online = { 1709 .attr = { .name = "online", .mode = 0600 }, 1710 .show = stp_online_show, 1711 .store = stp_online_store, 1712 }; 1713 1714 static struct sysdev_class_attribute *stp_attributes[] = { 1715 &attr_ctn_id, 1716 &attr_ctn_type, 1717 &attr_dst_offset, 1718 &attr_leap_seconds, 1719 &attr_stp_online, 1720 &attr_stratum, 1721 &attr_time_offset, 1722 &attr_time_zone_offset, 1723 &attr_timing_mode, 1724 &attr_timing_state, 1725 NULL 1726 }; 1727 1728 static int __init stp_init_sysfs(void) 1729 { 1730 struct sysdev_class_attribute **attr; 1731 int rc; 1732 1733 rc = sysdev_class_register(&stp_sysclass); 1734 if (rc) 1735 goto out; 1736 for (attr = stp_attributes; *attr; attr++) { 1737 rc = sysdev_class_create_file(&stp_sysclass, *attr); 1738 if (rc) 1739 goto out_unreg; 1740 } 1741 return 0; 1742 out_unreg: 1743 for (; attr >= stp_attributes; attr--) 1744 sysdev_class_remove_file(&stp_sysclass, *attr); 1745 sysdev_class_unregister(&stp_sysclass); 1746 out: 1747 return rc; 1748 } 1749 1750 device_initcall(stp_init_sysfs); 1751