1 /* 2 * SMP related functions 3 * 4 * Copyright IBM Corp. 1999, 2012 5 * Author(s): Denis Joseph Barrow, 6 * Martin Schwidefsky <schwidefsky@de.ibm.com>, 7 * Heiko Carstens <heiko.carstens@de.ibm.com>, 8 * 9 * based on other smp stuff by 10 * (c) 1995 Alan Cox, CymruNET Ltd <alan@cymru.net> 11 * (c) 1998 Ingo Molnar 12 * 13 * The code outside of smp.c uses logical cpu numbers, only smp.c does 14 * the translation of logical to physical cpu ids. All new code that 15 * operates on physical cpu numbers needs to go into smp.c. 16 */ 17 18 #define KMSG_COMPONENT "cpu" 19 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt 20 21 #include <linux/workqueue.h> 22 #include <linux/bootmem.h> 23 #include <linux/export.h> 24 #include <linux/init.h> 25 #include <linux/mm.h> 26 #include <linux/err.h> 27 #include <linux/spinlock.h> 28 #include <linux/kernel_stat.h> 29 #include <linux/delay.h> 30 #include <linux/interrupt.h> 31 #include <linux/irqflags.h> 32 #include <linux/cpu.h> 33 #include <linux/slab.h> 34 #include <linux/sched/hotplug.h> 35 #include <linux/sched/task_stack.h> 36 #include <linux/crash_dump.h> 37 #include <linux/memblock.h> 38 #include <asm/asm-offsets.h> 39 #include <asm/diag.h> 40 #include <asm/switch_to.h> 41 #include <asm/facility.h> 42 #include <asm/ipl.h> 43 #include <asm/setup.h> 44 #include <asm/irq.h> 45 #include <asm/tlbflush.h> 46 #include <asm/vtimer.h> 47 #include <asm/lowcore.h> 48 #include <asm/sclp.h> 49 #include <asm/vdso.h> 50 #include <asm/debug.h> 51 #include <asm/os_info.h> 52 #include <asm/sigp.h> 53 #include <asm/idle.h> 54 #include "entry.h" 55 56 enum { 57 ec_schedule = 0, 58 ec_call_function_single, 59 ec_stop_cpu, 60 }; 61 62 enum { 63 CPU_STATE_STANDBY, 64 CPU_STATE_CONFIGURED, 65 }; 66 67 static DEFINE_PER_CPU(struct cpu *, cpu_device); 68 69 struct pcpu { 70 struct lowcore *lowcore; /* lowcore page(s) for the cpu */ 71 unsigned long ec_mask; /* bit mask for ec_xxx functions */ 72 unsigned long ec_clk; /* sigp timestamp for ec_xxx */ 73 signed char state; /* physical cpu state */ 74 signed char polarization; /* physical polarization */ 75 u16 address; /* physical cpu address */ 76 }; 77 78 static u8 boot_core_type; 79 static struct pcpu pcpu_devices[NR_CPUS]; 80 81 unsigned int smp_cpu_mt_shift; 82 EXPORT_SYMBOL(smp_cpu_mt_shift); 83 84 unsigned int smp_cpu_mtid; 85 EXPORT_SYMBOL(smp_cpu_mtid); 86 87 #ifdef CONFIG_CRASH_DUMP 88 __vector128 __initdata boot_cpu_vector_save_area[__NUM_VXRS]; 89 #endif 90 91 static unsigned int smp_max_threads __initdata = -1U; 92 93 static int __init early_nosmt(char *s) 94 { 95 smp_max_threads = 1; 96 return 0; 97 } 98 early_param("nosmt", early_nosmt); 99 100 static int __init early_smt(char *s) 101 { 102 get_option(&s, &smp_max_threads); 103 return 0; 104 } 105 early_param("smt", early_smt); 106 107 /* 108 * The smp_cpu_state_mutex must be held when changing the state or polarization 109 * member of a pcpu data structure within the pcpu_devices arreay. 110 */ 111 DEFINE_MUTEX(smp_cpu_state_mutex); 112 113 /* 114 * Signal processor helper functions. 115 */ 116 static inline int __pcpu_sigp_relax(u16 addr, u8 order, unsigned long parm) 117 { 118 int cc; 119 120 while (1) { 121 cc = __pcpu_sigp(addr, order, parm, NULL); 122 if (cc != SIGP_CC_BUSY) 123 return cc; 124 cpu_relax(); 125 } 126 } 127 128 static int pcpu_sigp_retry(struct pcpu *pcpu, u8 order, u32 parm) 129 { 130 int cc, retry; 131 132 for (retry = 0; ; retry++) { 133 cc = __pcpu_sigp(pcpu->address, order, parm, NULL); 134 if (cc != SIGP_CC_BUSY) 135 break; 136 if (retry >= 3) 137 udelay(10); 138 } 139 return cc; 140 } 141 142 static inline int pcpu_stopped(struct pcpu *pcpu) 143 { 144 u32 uninitialized_var(status); 145 146 if (__pcpu_sigp(pcpu->address, SIGP_SENSE, 147 0, &status) != SIGP_CC_STATUS_STORED) 148 return 0; 149 return !!(status & (SIGP_STATUS_CHECK_STOP|SIGP_STATUS_STOPPED)); 150 } 151 152 static inline int pcpu_running(struct pcpu *pcpu) 153 { 154 if (__pcpu_sigp(pcpu->address, SIGP_SENSE_RUNNING, 155 0, NULL) != SIGP_CC_STATUS_STORED) 156 return 1; 157 /* Status stored condition code is equivalent to cpu not running. */ 158 return 0; 159 } 160 161 /* 162 * Find struct pcpu by cpu address. 163 */ 164 static struct pcpu *pcpu_find_address(const struct cpumask *mask, u16 address) 165 { 166 int cpu; 167 168 for_each_cpu(cpu, mask) 169 if (pcpu_devices[cpu].address == address) 170 return pcpu_devices + cpu; 171 return NULL; 172 } 173 174 static void pcpu_ec_call(struct pcpu *pcpu, int ec_bit) 175 { 176 int order; 177 178 if (test_and_set_bit(ec_bit, &pcpu->ec_mask)) 179 return; 180 order = pcpu_running(pcpu) ? SIGP_EXTERNAL_CALL : SIGP_EMERGENCY_SIGNAL; 181 pcpu->ec_clk = get_tod_clock_fast(); 182 pcpu_sigp_retry(pcpu, order, 0); 183 } 184 185 #define ASYNC_FRAME_OFFSET (ASYNC_SIZE - STACK_FRAME_OVERHEAD - __PT_SIZE) 186 #define PANIC_FRAME_OFFSET (PAGE_SIZE - STACK_FRAME_OVERHEAD - __PT_SIZE) 187 188 static int pcpu_alloc_lowcore(struct pcpu *pcpu, int cpu) 189 { 190 unsigned long async_stack, panic_stack; 191 struct lowcore *lc; 192 193 if (pcpu != &pcpu_devices[0]) { 194 pcpu->lowcore = (struct lowcore *) 195 __get_free_pages(GFP_KERNEL | GFP_DMA, LC_ORDER); 196 async_stack = __get_free_pages(GFP_KERNEL, ASYNC_ORDER); 197 panic_stack = __get_free_page(GFP_KERNEL); 198 if (!pcpu->lowcore || !panic_stack || !async_stack) 199 goto out; 200 } else { 201 async_stack = pcpu->lowcore->async_stack - ASYNC_FRAME_OFFSET; 202 panic_stack = pcpu->lowcore->panic_stack - PANIC_FRAME_OFFSET; 203 } 204 lc = pcpu->lowcore; 205 memcpy(lc, &S390_lowcore, 512); 206 memset((char *) lc + 512, 0, sizeof(*lc) - 512); 207 lc->async_stack = async_stack + ASYNC_FRAME_OFFSET; 208 lc->panic_stack = panic_stack + PANIC_FRAME_OFFSET; 209 lc->cpu_nr = cpu; 210 lc->spinlock_lockval = arch_spin_lockval(cpu); 211 if (MACHINE_HAS_VX) 212 lc->vector_save_area_addr = 213 (unsigned long) &lc->vector_save_area; 214 if (vdso_alloc_per_cpu(lc)) 215 goto out; 216 lowcore_ptr[cpu] = lc; 217 pcpu_sigp_retry(pcpu, SIGP_SET_PREFIX, (u32)(unsigned long) lc); 218 return 0; 219 out: 220 if (pcpu != &pcpu_devices[0]) { 221 free_page(panic_stack); 222 free_pages(async_stack, ASYNC_ORDER); 223 free_pages((unsigned long) pcpu->lowcore, LC_ORDER); 224 } 225 return -ENOMEM; 226 } 227 228 #ifdef CONFIG_HOTPLUG_CPU 229 230 static void pcpu_free_lowcore(struct pcpu *pcpu) 231 { 232 pcpu_sigp_retry(pcpu, SIGP_SET_PREFIX, 0); 233 lowcore_ptr[pcpu - pcpu_devices] = NULL; 234 vdso_free_per_cpu(pcpu->lowcore); 235 if (pcpu == &pcpu_devices[0]) 236 return; 237 free_page(pcpu->lowcore->panic_stack-PANIC_FRAME_OFFSET); 238 free_pages(pcpu->lowcore->async_stack-ASYNC_FRAME_OFFSET, ASYNC_ORDER); 239 free_pages((unsigned long) pcpu->lowcore, LC_ORDER); 240 } 241 242 #endif /* CONFIG_HOTPLUG_CPU */ 243 244 static void pcpu_prepare_secondary(struct pcpu *pcpu, int cpu) 245 { 246 struct lowcore *lc = pcpu->lowcore; 247 248 cpumask_set_cpu(cpu, &init_mm.context.cpu_attach_mask); 249 cpumask_set_cpu(cpu, mm_cpumask(&init_mm)); 250 lc->cpu_nr = cpu; 251 lc->spinlock_lockval = arch_spin_lockval(cpu); 252 lc->percpu_offset = __per_cpu_offset[cpu]; 253 lc->kernel_asce = S390_lowcore.kernel_asce; 254 lc->machine_flags = S390_lowcore.machine_flags; 255 lc->user_timer = lc->system_timer = lc->steal_timer = 0; 256 __ctl_store(lc->cregs_save_area, 0, 15); 257 save_access_regs((unsigned int *) lc->access_regs_save_area); 258 memcpy(lc->stfle_fac_list, S390_lowcore.stfle_fac_list, 259 MAX_FACILITY_BIT/8); 260 } 261 262 static void pcpu_attach_task(struct pcpu *pcpu, struct task_struct *tsk) 263 { 264 struct lowcore *lc = pcpu->lowcore; 265 266 lc->kernel_stack = (unsigned long) task_stack_page(tsk) 267 + THREAD_SIZE - STACK_FRAME_OVERHEAD - sizeof(struct pt_regs); 268 lc->current_task = (unsigned long) tsk; 269 lc->lpp = LPP_MAGIC; 270 lc->current_pid = tsk->pid; 271 lc->user_timer = tsk->thread.user_timer; 272 lc->system_timer = tsk->thread.system_timer; 273 lc->steal_timer = 0; 274 } 275 276 static void pcpu_start_fn(struct pcpu *pcpu, void (*func)(void *), void *data) 277 { 278 struct lowcore *lc = pcpu->lowcore; 279 280 lc->restart_stack = lc->kernel_stack; 281 lc->restart_fn = (unsigned long) func; 282 lc->restart_data = (unsigned long) data; 283 lc->restart_source = -1UL; 284 pcpu_sigp_retry(pcpu, SIGP_RESTART, 0); 285 } 286 287 /* 288 * Call function via PSW restart on pcpu and stop the current cpu. 289 */ 290 static void pcpu_delegate(struct pcpu *pcpu, void (*func)(void *), 291 void *data, unsigned long stack) 292 { 293 struct lowcore *lc = lowcore_ptr[pcpu - pcpu_devices]; 294 unsigned long source_cpu = stap(); 295 296 __load_psw_mask(PSW_KERNEL_BITS); 297 if (pcpu->address == source_cpu) 298 func(data); /* should not return */ 299 /* Stop target cpu (if func returns this stops the current cpu). */ 300 pcpu_sigp_retry(pcpu, SIGP_STOP, 0); 301 /* Restart func on the target cpu and stop the current cpu. */ 302 mem_assign_absolute(lc->restart_stack, stack); 303 mem_assign_absolute(lc->restart_fn, (unsigned long) func); 304 mem_assign_absolute(lc->restart_data, (unsigned long) data); 305 mem_assign_absolute(lc->restart_source, source_cpu); 306 asm volatile( 307 "0: sigp 0,%0,%2 # sigp restart to target cpu\n" 308 " brc 2,0b # busy, try again\n" 309 "1: sigp 0,%1,%3 # sigp stop to current cpu\n" 310 " brc 2,1b # busy, try again\n" 311 : : "d" (pcpu->address), "d" (source_cpu), 312 "K" (SIGP_RESTART), "K" (SIGP_STOP) 313 : "0", "1", "cc"); 314 for (;;) ; 315 } 316 317 /* 318 * Enable additional logical cpus for multi-threading. 319 */ 320 static int pcpu_set_smt(unsigned int mtid) 321 { 322 int cc; 323 324 if (smp_cpu_mtid == mtid) 325 return 0; 326 cc = __pcpu_sigp(0, SIGP_SET_MULTI_THREADING, mtid, NULL); 327 if (cc == 0) { 328 smp_cpu_mtid = mtid; 329 smp_cpu_mt_shift = 0; 330 while (smp_cpu_mtid >= (1U << smp_cpu_mt_shift)) 331 smp_cpu_mt_shift++; 332 pcpu_devices[0].address = stap(); 333 } 334 return cc; 335 } 336 337 /* 338 * Call function on an online CPU. 339 */ 340 void smp_call_online_cpu(void (*func)(void *), void *data) 341 { 342 struct pcpu *pcpu; 343 344 /* Use the current cpu if it is online. */ 345 pcpu = pcpu_find_address(cpu_online_mask, stap()); 346 if (!pcpu) 347 /* Use the first online cpu. */ 348 pcpu = pcpu_devices + cpumask_first(cpu_online_mask); 349 pcpu_delegate(pcpu, func, data, (unsigned long) restart_stack); 350 } 351 352 /* 353 * Call function on the ipl CPU. 354 */ 355 void smp_call_ipl_cpu(void (*func)(void *), void *data) 356 { 357 pcpu_delegate(&pcpu_devices[0], func, data, 358 pcpu_devices->lowcore->panic_stack - 359 PANIC_FRAME_OFFSET + PAGE_SIZE); 360 } 361 362 int smp_find_processor_id(u16 address) 363 { 364 int cpu; 365 366 for_each_present_cpu(cpu) 367 if (pcpu_devices[cpu].address == address) 368 return cpu; 369 return -1; 370 } 371 372 bool arch_vcpu_is_preempted(int cpu) 373 { 374 if (test_cpu_flag_of(CIF_ENABLED_WAIT, cpu)) 375 return false; 376 if (pcpu_running(pcpu_devices + cpu)) 377 return false; 378 return true; 379 } 380 EXPORT_SYMBOL(arch_vcpu_is_preempted); 381 382 void smp_yield_cpu(int cpu) 383 { 384 if (MACHINE_HAS_DIAG9C) { 385 diag_stat_inc_norecursion(DIAG_STAT_X09C); 386 asm volatile("diag %0,0,0x9c" 387 : : "d" (pcpu_devices[cpu].address)); 388 } else if (MACHINE_HAS_DIAG44) { 389 diag_stat_inc_norecursion(DIAG_STAT_X044); 390 asm volatile("diag 0,0,0x44"); 391 } 392 } 393 394 /* 395 * Send cpus emergency shutdown signal. This gives the cpus the 396 * opportunity to complete outstanding interrupts. 397 */ 398 static void smp_emergency_stop(cpumask_t *cpumask) 399 { 400 u64 end; 401 int cpu; 402 403 end = get_tod_clock() + (1000000UL << 12); 404 for_each_cpu(cpu, cpumask) { 405 struct pcpu *pcpu = pcpu_devices + cpu; 406 set_bit(ec_stop_cpu, &pcpu->ec_mask); 407 while (__pcpu_sigp(pcpu->address, SIGP_EMERGENCY_SIGNAL, 408 0, NULL) == SIGP_CC_BUSY && 409 get_tod_clock() < end) 410 cpu_relax(); 411 } 412 while (get_tod_clock() < end) { 413 for_each_cpu(cpu, cpumask) 414 if (pcpu_stopped(pcpu_devices + cpu)) 415 cpumask_clear_cpu(cpu, cpumask); 416 if (cpumask_empty(cpumask)) 417 break; 418 cpu_relax(); 419 } 420 } 421 422 /* 423 * Stop all cpus but the current one. 424 */ 425 void smp_send_stop(void) 426 { 427 cpumask_t cpumask; 428 int cpu; 429 430 /* Disable all interrupts/machine checks */ 431 __load_psw_mask(PSW_KERNEL_BITS | PSW_MASK_DAT); 432 trace_hardirqs_off(); 433 434 debug_set_critical(); 435 cpumask_copy(&cpumask, cpu_online_mask); 436 cpumask_clear_cpu(smp_processor_id(), &cpumask); 437 438 if (oops_in_progress) 439 smp_emergency_stop(&cpumask); 440 441 /* stop all processors */ 442 for_each_cpu(cpu, &cpumask) { 443 struct pcpu *pcpu = pcpu_devices + cpu; 444 pcpu_sigp_retry(pcpu, SIGP_STOP, 0); 445 while (!pcpu_stopped(pcpu)) 446 cpu_relax(); 447 } 448 } 449 450 /* 451 * This is the main routine where commands issued by other 452 * cpus are handled. 453 */ 454 static void smp_handle_ext_call(void) 455 { 456 unsigned long bits; 457 458 /* handle bit signal external calls */ 459 bits = xchg(&pcpu_devices[smp_processor_id()].ec_mask, 0); 460 if (test_bit(ec_stop_cpu, &bits)) 461 smp_stop_cpu(); 462 if (test_bit(ec_schedule, &bits)) 463 scheduler_ipi(); 464 if (test_bit(ec_call_function_single, &bits)) 465 generic_smp_call_function_single_interrupt(); 466 } 467 468 static void do_ext_call_interrupt(struct ext_code ext_code, 469 unsigned int param32, unsigned long param64) 470 { 471 inc_irq_stat(ext_code.code == 0x1202 ? IRQEXT_EXC : IRQEXT_EMS); 472 smp_handle_ext_call(); 473 } 474 475 void arch_send_call_function_ipi_mask(const struct cpumask *mask) 476 { 477 int cpu; 478 479 for_each_cpu(cpu, mask) 480 pcpu_ec_call(pcpu_devices + cpu, ec_call_function_single); 481 } 482 483 void arch_send_call_function_single_ipi(int cpu) 484 { 485 pcpu_ec_call(pcpu_devices + cpu, ec_call_function_single); 486 } 487 488 /* 489 * this function sends a 'reschedule' IPI to another CPU. 490 * it goes straight through and wastes no time serializing 491 * anything. Worst case is that we lose a reschedule ... 492 */ 493 void smp_send_reschedule(int cpu) 494 { 495 pcpu_ec_call(pcpu_devices + cpu, ec_schedule); 496 } 497 498 /* 499 * parameter area for the set/clear control bit callbacks 500 */ 501 struct ec_creg_mask_parms { 502 unsigned long orval; 503 unsigned long andval; 504 int cr; 505 }; 506 507 /* 508 * callback for setting/clearing control bits 509 */ 510 static void smp_ctl_bit_callback(void *info) 511 { 512 struct ec_creg_mask_parms *pp = info; 513 unsigned long cregs[16]; 514 515 __ctl_store(cregs, 0, 15); 516 cregs[pp->cr] = (cregs[pp->cr] & pp->andval) | pp->orval; 517 __ctl_load(cregs, 0, 15); 518 } 519 520 /* 521 * Set a bit in a control register of all cpus 522 */ 523 void smp_ctl_set_bit(int cr, int bit) 524 { 525 struct ec_creg_mask_parms parms = { 1UL << bit, -1UL, cr }; 526 527 on_each_cpu(smp_ctl_bit_callback, &parms, 1); 528 } 529 EXPORT_SYMBOL(smp_ctl_set_bit); 530 531 /* 532 * Clear a bit in a control register of all cpus 533 */ 534 void smp_ctl_clear_bit(int cr, int bit) 535 { 536 struct ec_creg_mask_parms parms = { 0, ~(1UL << bit), cr }; 537 538 on_each_cpu(smp_ctl_bit_callback, &parms, 1); 539 } 540 EXPORT_SYMBOL(smp_ctl_clear_bit); 541 542 #ifdef CONFIG_CRASH_DUMP 543 544 int smp_store_status(int cpu) 545 { 546 struct pcpu *pcpu = pcpu_devices + cpu; 547 unsigned long pa; 548 549 pa = __pa(&pcpu->lowcore->floating_pt_save_area); 550 if (__pcpu_sigp_relax(pcpu->address, SIGP_STORE_STATUS_AT_ADDRESS, 551 pa) != SIGP_CC_ORDER_CODE_ACCEPTED) 552 return -EIO; 553 if (!MACHINE_HAS_VX) 554 return 0; 555 pa = __pa(pcpu->lowcore->vector_save_area_addr); 556 if (__pcpu_sigp_relax(pcpu->address, SIGP_STORE_ADDITIONAL_STATUS, 557 pa) != SIGP_CC_ORDER_CODE_ACCEPTED) 558 return -EIO; 559 return 0; 560 } 561 562 /* 563 * Collect CPU state of the previous, crashed system. 564 * There are four cases: 565 * 1) standard zfcp dump 566 * condition: OLDMEM_BASE == NULL && ipl_info.type == IPL_TYPE_FCP_DUMP 567 * The state for all CPUs except the boot CPU needs to be collected 568 * with sigp stop-and-store-status. The boot CPU state is located in 569 * the absolute lowcore of the memory stored in the HSA. The zcore code 570 * will copy the boot CPU state from the HSA. 571 * 2) stand-alone kdump for SCSI (zfcp dump with swapped memory) 572 * condition: OLDMEM_BASE != NULL && ipl_info.type == IPL_TYPE_FCP_DUMP 573 * The state for all CPUs except the boot CPU needs to be collected 574 * with sigp stop-and-store-status. The firmware or the boot-loader 575 * stored the registers of the boot CPU in the absolute lowcore in the 576 * memory of the old system. 577 * 3) kdump and the old kernel did not store the CPU state, 578 * or stand-alone kdump for DASD 579 * condition: OLDMEM_BASE != NULL && !is_kdump_kernel() 580 * The state for all CPUs except the boot CPU needs to be collected 581 * with sigp stop-and-store-status. The kexec code or the boot-loader 582 * stored the registers of the boot CPU in the memory of the old system. 583 * 4) kdump and the old kernel stored the CPU state 584 * condition: OLDMEM_BASE != NULL && is_kdump_kernel() 585 * This case does not exist for s390 anymore, setup_arch explicitly 586 * deactivates the elfcorehdr= kernel parameter 587 */ 588 static __init void smp_save_cpu_vxrs(struct save_area *sa, u16 addr, 589 bool is_boot_cpu, unsigned long page) 590 { 591 __vector128 *vxrs = (__vector128 *) page; 592 593 if (is_boot_cpu) 594 vxrs = boot_cpu_vector_save_area; 595 else 596 __pcpu_sigp_relax(addr, SIGP_STORE_ADDITIONAL_STATUS, page); 597 save_area_add_vxrs(sa, vxrs); 598 } 599 600 static __init void smp_save_cpu_regs(struct save_area *sa, u16 addr, 601 bool is_boot_cpu, unsigned long page) 602 { 603 void *regs = (void *) page; 604 605 if (is_boot_cpu) 606 copy_oldmem_kernel(regs, (void *) __LC_FPREGS_SAVE_AREA, 512); 607 else 608 __pcpu_sigp_relax(addr, SIGP_STORE_STATUS_AT_ADDRESS, page); 609 save_area_add_regs(sa, regs); 610 } 611 612 void __init smp_save_dump_cpus(void) 613 { 614 int addr, boot_cpu_addr, max_cpu_addr; 615 struct save_area *sa; 616 unsigned long page; 617 bool is_boot_cpu; 618 619 if (!(OLDMEM_BASE || ipl_info.type == IPL_TYPE_FCP_DUMP)) 620 /* No previous system present, normal boot. */ 621 return; 622 /* Allocate a page as dumping area for the store status sigps */ 623 page = memblock_alloc_base(PAGE_SIZE, PAGE_SIZE, 1UL << 31); 624 /* Set multi-threading state to the previous system. */ 625 pcpu_set_smt(sclp.mtid_prev); 626 boot_cpu_addr = stap(); 627 max_cpu_addr = SCLP_MAX_CORES << sclp.mtid_prev; 628 for (addr = 0; addr <= max_cpu_addr; addr++) { 629 if (__pcpu_sigp_relax(addr, SIGP_SENSE, 0) == 630 SIGP_CC_NOT_OPERATIONAL) 631 continue; 632 is_boot_cpu = (addr == boot_cpu_addr); 633 /* Allocate save area */ 634 sa = save_area_alloc(is_boot_cpu); 635 if (!sa) 636 panic("could not allocate memory for save area\n"); 637 if (MACHINE_HAS_VX) 638 /* Get the vector registers */ 639 smp_save_cpu_vxrs(sa, addr, is_boot_cpu, page); 640 /* 641 * For a zfcp dump OLDMEM_BASE == NULL and the registers 642 * of the boot CPU are stored in the HSA. To retrieve 643 * these registers an SCLP request is required which is 644 * done by drivers/s390/char/zcore.c:init_cpu_info() 645 */ 646 if (!is_boot_cpu || OLDMEM_BASE) 647 /* Get the CPU registers */ 648 smp_save_cpu_regs(sa, addr, is_boot_cpu, page); 649 } 650 memblock_free(page, PAGE_SIZE); 651 diag308_reset(); 652 pcpu_set_smt(0); 653 } 654 #endif /* CONFIG_CRASH_DUMP */ 655 656 void smp_cpu_set_polarization(int cpu, int val) 657 { 658 pcpu_devices[cpu].polarization = val; 659 } 660 661 int smp_cpu_get_polarization(int cpu) 662 { 663 return pcpu_devices[cpu].polarization; 664 } 665 666 static void __ref smp_get_core_info(struct sclp_core_info *info, int early) 667 { 668 static int use_sigp_detection; 669 int address; 670 671 if (use_sigp_detection || sclp_get_core_info(info, early)) { 672 use_sigp_detection = 1; 673 for (address = 0; 674 address < (SCLP_MAX_CORES << smp_cpu_mt_shift); 675 address += (1U << smp_cpu_mt_shift)) { 676 if (__pcpu_sigp_relax(address, SIGP_SENSE, 0) == 677 SIGP_CC_NOT_OPERATIONAL) 678 continue; 679 info->core[info->configured].core_id = 680 address >> smp_cpu_mt_shift; 681 info->configured++; 682 } 683 info->combined = info->configured; 684 } 685 } 686 687 static int smp_add_present_cpu(int cpu); 688 689 static int __smp_rescan_cpus(struct sclp_core_info *info, int sysfs_add) 690 { 691 struct pcpu *pcpu; 692 cpumask_t avail; 693 int cpu, nr, i, j; 694 u16 address; 695 696 nr = 0; 697 cpumask_xor(&avail, cpu_possible_mask, cpu_present_mask); 698 cpu = cpumask_first(&avail); 699 for (i = 0; (i < info->combined) && (cpu < nr_cpu_ids); i++) { 700 if (sclp.has_core_type && info->core[i].type != boot_core_type) 701 continue; 702 address = info->core[i].core_id << smp_cpu_mt_shift; 703 for (j = 0; j <= smp_cpu_mtid; j++) { 704 if (pcpu_find_address(cpu_present_mask, address + j)) 705 continue; 706 pcpu = pcpu_devices + cpu; 707 pcpu->address = address + j; 708 pcpu->state = 709 (cpu >= info->configured*(smp_cpu_mtid + 1)) ? 710 CPU_STATE_STANDBY : CPU_STATE_CONFIGURED; 711 smp_cpu_set_polarization(cpu, POLARIZATION_UNKNOWN); 712 set_cpu_present(cpu, true); 713 if (sysfs_add && smp_add_present_cpu(cpu) != 0) 714 set_cpu_present(cpu, false); 715 else 716 nr++; 717 cpu = cpumask_next(cpu, &avail); 718 if (cpu >= nr_cpu_ids) 719 break; 720 } 721 } 722 return nr; 723 } 724 725 void __init smp_detect_cpus(void) 726 { 727 unsigned int cpu, mtid, c_cpus, s_cpus; 728 struct sclp_core_info *info; 729 u16 address; 730 731 /* Get CPU information */ 732 info = memblock_virt_alloc(sizeof(*info), 8); 733 smp_get_core_info(info, 1); 734 /* Find boot CPU type */ 735 if (sclp.has_core_type) { 736 address = stap(); 737 for (cpu = 0; cpu < info->combined; cpu++) 738 if (info->core[cpu].core_id == address) { 739 /* The boot cpu dictates the cpu type. */ 740 boot_core_type = info->core[cpu].type; 741 break; 742 } 743 if (cpu >= info->combined) 744 panic("Could not find boot CPU type"); 745 } 746 747 /* Set multi-threading state for the current system */ 748 mtid = boot_core_type ? sclp.mtid : sclp.mtid_cp; 749 mtid = (mtid < smp_max_threads) ? mtid : smp_max_threads - 1; 750 pcpu_set_smt(mtid); 751 752 /* Print number of CPUs */ 753 c_cpus = s_cpus = 0; 754 for (cpu = 0; cpu < info->combined; cpu++) { 755 if (sclp.has_core_type && 756 info->core[cpu].type != boot_core_type) 757 continue; 758 if (cpu < info->configured) 759 c_cpus += smp_cpu_mtid + 1; 760 else 761 s_cpus += smp_cpu_mtid + 1; 762 } 763 pr_info("%d configured CPUs, %d standby CPUs\n", c_cpus, s_cpus); 764 765 /* Add CPUs present at boot */ 766 get_online_cpus(); 767 __smp_rescan_cpus(info, 0); 768 put_online_cpus(); 769 memblock_free_early((unsigned long)info, sizeof(*info)); 770 } 771 772 /* 773 * Activate a secondary processor. 774 */ 775 static void smp_start_secondary(void *cpuvoid) 776 { 777 S390_lowcore.last_update_clock = get_tod_clock(); 778 S390_lowcore.restart_stack = (unsigned long) restart_stack; 779 S390_lowcore.restart_fn = (unsigned long) do_restart; 780 S390_lowcore.restart_data = 0; 781 S390_lowcore.restart_source = -1UL; 782 restore_access_regs(S390_lowcore.access_regs_save_area); 783 __ctl_load(S390_lowcore.cregs_save_area, 0, 15); 784 __load_psw_mask(PSW_KERNEL_BITS | PSW_MASK_DAT); 785 cpu_init(); 786 preempt_disable(); 787 init_cpu_timer(); 788 vtime_init(); 789 pfault_init(); 790 notify_cpu_starting(smp_processor_id()); 791 set_cpu_online(smp_processor_id(), true); 792 inc_irq_stat(CPU_RST); 793 local_irq_enable(); 794 cpu_startup_entry(CPUHP_AP_ONLINE_IDLE); 795 } 796 797 /* Upping and downing of CPUs */ 798 int __cpu_up(unsigned int cpu, struct task_struct *tidle) 799 { 800 struct pcpu *pcpu; 801 int base, i, rc; 802 803 pcpu = pcpu_devices + cpu; 804 if (pcpu->state != CPU_STATE_CONFIGURED) 805 return -EIO; 806 base = smp_get_base_cpu(cpu); 807 for (i = 0; i <= smp_cpu_mtid; i++) { 808 if (base + i < nr_cpu_ids) 809 if (cpu_online(base + i)) 810 break; 811 } 812 /* 813 * If this is the first CPU of the core to get online 814 * do an initial CPU reset. 815 */ 816 if (i > smp_cpu_mtid && 817 pcpu_sigp_retry(pcpu_devices + base, SIGP_INITIAL_CPU_RESET, 0) != 818 SIGP_CC_ORDER_CODE_ACCEPTED) 819 return -EIO; 820 821 rc = pcpu_alloc_lowcore(pcpu, cpu); 822 if (rc) 823 return rc; 824 pcpu_prepare_secondary(pcpu, cpu); 825 pcpu_attach_task(pcpu, tidle); 826 pcpu_start_fn(pcpu, smp_start_secondary, NULL); 827 /* Wait until cpu puts itself in the online & active maps */ 828 while (!cpu_online(cpu)) 829 cpu_relax(); 830 return 0; 831 } 832 833 static unsigned int setup_possible_cpus __initdata; 834 835 static int __init _setup_possible_cpus(char *s) 836 { 837 get_option(&s, &setup_possible_cpus); 838 return 0; 839 } 840 early_param("possible_cpus", _setup_possible_cpus); 841 842 #ifdef CONFIG_HOTPLUG_CPU 843 844 int __cpu_disable(void) 845 { 846 unsigned long cregs[16]; 847 848 /* Handle possible pending IPIs */ 849 smp_handle_ext_call(); 850 set_cpu_online(smp_processor_id(), false); 851 /* Disable pseudo page faults on this cpu. */ 852 pfault_fini(); 853 /* Disable interrupt sources via control register. */ 854 __ctl_store(cregs, 0, 15); 855 cregs[0] &= ~0x0000ee70UL; /* disable all external interrupts */ 856 cregs[6] &= ~0xff000000UL; /* disable all I/O interrupts */ 857 cregs[14] &= ~0x1f000000UL; /* disable most machine checks */ 858 __ctl_load(cregs, 0, 15); 859 clear_cpu_flag(CIF_NOHZ_DELAY); 860 return 0; 861 } 862 863 void __cpu_die(unsigned int cpu) 864 { 865 struct pcpu *pcpu; 866 867 /* Wait until target cpu is down */ 868 pcpu = pcpu_devices + cpu; 869 while (!pcpu_stopped(pcpu)) 870 cpu_relax(); 871 pcpu_free_lowcore(pcpu); 872 cpumask_clear_cpu(cpu, mm_cpumask(&init_mm)); 873 cpumask_clear_cpu(cpu, &init_mm.context.cpu_attach_mask); 874 } 875 876 void __noreturn cpu_die(void) 877 { 878 idle_task_exit(); 879 pcpu_sigp_retry(pcpu_devices + smp_processor_id(), SIGP_STOP, 0); 880 for (;;) ; 881 } 882 883 #endif /* CONFIG_HOTPLUG_CPU */ 884 885 void __init smp_fill_possible_mask(void) 886 { 887 unsigned int possible, sclp_max, cpu; 888 889 sclp_max = max(sclp.mtid, sclp.mtid_cp) + 1; 890 sclp_max = min(smp_max_threads, sclp_max); 891 sclp_max = (sclp.max_cores * sclp_max) ?: nr_cpu_ids; 892 possible = setup_possible_cpus ?: nr_cpu_ids; 893 possible = min(possible, sclp_max); 894 for (cpu = 0; cpu < possible && cpu < nr_cpu_ids; cpu++) 895 set_cpu_possible(cpu, true); 896 } 897 898 void __init smp_prepare_cpus(unsigned int max_cpus) 899 { 900 /* request the 0x1201 emergency signal external interrupt */ 901 if (register_external_irq(EXT_IRQ_EMERGENCY_SIG, do_ext_call_interrupt)) 902 panic("Couldn't request external interrupt 0x1201"); 903 /* request the 0x1202 external call external interrupt */ 904 if (register_external_irq(EXT_IRQ_EXTERNAL_CALL, do_ext_call_interrupt)) 905 panic("Couldn't request external interrupt 0x1202"); 906 } 907 908 void __init smp_prepare_boot_cpu(void) 909 { 910 struct pcpu *pcpu = pcpu_devices; 911 912 WARN_ON(!cpu_present(0) || !cpu_online(0)); 913 pcpu->state = CPU_STATE_CONFIGURED; 914 pcpu->lowcore = (struct lowcore *)(unsigned long) store_prefix(); 915 S390_lowcore.percpu_offset = __per_cpu_offset[0]; 916 smp_cpu_set_polarization(0, POLARIZATION_UNKNOWN); 917 } 918 919 void __init smp_cpus_done(unsigned int max_cpus) 920 { 921 } 922 923 void __init smp_setup_processor_id(void) 924 { 925 pcpu_devices[0].address = stap(); 926 S390_lowcore.cpu_nr = 0; 927 S390_lowcore.spinlock_lockval = arch_spin_lockval(0); 928 } 929 930 /* 931 * the frequency of the profiling timer can be changed 932 * by writing a multiplier value into /proc/profile. 933 * 934 * usually you want to run this on all CPUs ;) 935 */ 936 int setup_profiling_timer(unsigned int multiplier) 937 { 938 return 0; 939 } 940 941 #ifdef CONFIG_HOTPLUG_CPU 942 static ssize_t cpu_configure_show(struct device *dev, 943 struct device_attribute *attr, char *buf) 944 { 945 ssize_t count; 946 947 mutex_lock(&smp_cpu_state_mutex); 948 count = sprintf(buf, "%d\n", pcpu_devices[dev->id].state); 949 mutex_unlock(&smp_cpu_state_mutex); 950 return count; 951 } 952 953 static ssize_t cpu_configure_store(struct device *dev, 954 struct device_attribute *attr, 955 const char *buf, size_t count) 956 { 957 struct pcpu *pcpu; 958 int cpu, val, rc, i; 959 char delim; 960 961 if (sscanf(buf, "%d %c", &val, &delim) != 1) 962 return -EINVAL; 963 if (val != 0 && val != 1) 964 return -EINVAL; 965 get_online_cpus(); 966 mutex_lock(&smp_cpu_state_mutex); 967 rc = -EBUSY; 968 /* disallow configuration changes of online cpus and cpu 0 */ 969 cpu = dev->id; 970 cpu = smp_get_base_cpu(cpu); 971 if (cpu == 0) 972 goto out; 973 for (i = 0; i <= smp_cpu_mtid; i++) 974 if (cpu_online(cpu + i)) 975 goto out; 976 pcpu = pcpu_devices + cpu; 977 rc = 0; 978 switch (val) { 979 case 0: 980 if (pcpu->state != CPU_STATE_CONFIGURED) 981 break; 982 rc = sclp_core_deconfigure(pcpu->address >> smp_cpu_mt_shift); 983 if (rc) 984 break; 985 for (i = 0; i <= smp_cpu_mtid; i++) { 986 if (cpu + i >= nr_cpu_ids || !cpu_present(cpu + i)) 987 continue; 988 pcpu[i].state = CPU_STATE_STANDBY; 989 smp_cpu_set_polarization(cpu + i, 990 POLARIZATION_UNKNOWN); 991 } 992 topology_expect_change(); 993 break; 994 case 1: 995 if (pcpu->state != CPU_STATE_STANDBY) 996 break; 997 rc = sclp_core_configure(pcpu->address >> smp_cpu_mt_shift); 998 if (rc) 999 break; 1000 for (i = 0; i <= smp_cpu_mtid; i++) { 1001 if (cpu + i >= nr_cpu_ids || !cpu_present(cpu + i)) 1002 continue; 1003 pcpu[i].state = CPU_STATE_CONFIGURED; 1004 smp_cpu_set_polarization(cpu + i, 1005 POLARIZATION_UNKNOWN); 1006 } 1007 topology_expect_change(); 1008 break; 1009 default: 1010 break; 1011 } 1012 out: 1013 mutex_unlock(&smp_cpu_state_mutex); 1014 put_online_cpus(); 1015 return rc ? rc : count; 1016 } 1017 static DEVICE_ATTR(configure, 0644, cpu_configure_show, cpu_configure_store); 1018 #endif /* CONFIG_HOTPLUG_CPU */ 1019 1020 static ssize_t show_cpu_address(struct device *dev, 1021 struct device_attribute *attr, char *buf) 1022 { 1023 return sprintf(buf, "%d\n", pcpu_devices[dev->id].address); 1024 } 1025 static DEVICE_ATTR(address, 0444, show_cpu_address, NULL); 1026 1027 static struct attribute *cpu_common_attrs[] = { 1028 #ifdef CONFIG_HOTPLUG_CPU 1029 &dev_attr_configure.attr, 1030 #endif 1031 &dev_attr_address.attr, 1032 NULL, 1033 }; 1034 1035 static struct attribute_group cpu_common_attr_group = { 1036 .attrs = cpu_common_attrs, 1037 }; 1038 1039 static struct attribute *cpu_online_attrs[] = { 1040 &dev_attr_idle_count.attr, 1041 &dev_attr_idle_time_us.attr, 1042 NULL, 1043 }; 1044 1045 static struct attribute_group cpu_online_attr_group = { 1046 .attrs = cpu_online_attrs, 1047 }; 1048 1049 static int smp_cpu_online(unsigned int cpu) 1050 { 1051 struct device *s = &per_cpu(cpu_device, cpu)->dev; 1052 1053 return sysfs_create_group(&s->kobj, &cpu_online_attr_group); 1054 } 1055 static int smp_cpu_pre_down(unsigned int cpu) 1056 { 1057 struct device *s = &per_cpu(cpu_device, cpu)->dev; 1058 1059 sysfs_remove_group(&s->kobj, &cpu_online_attr_group); 1060 return 0; 1061 } 1062 1063 static int smp_add_present_cpu(int cpu) 1064 { 1065 struct device *s; 1066 struct cpu *c; 1067 int rc; 1068 1069 c = kzalloc(sizeof(*c), GFP_KERNEL); 1070 if (!c) 1071 return -ENOMEM; 1072 per_cpu(cpu_device, cpu) = c; 1073 s = &c->dev; 1074 c->hotpluggable = 1; 1075 rc = register_cpu(c, cpu); 1076 if (rc) 1077 goto out; 1078 rc = sysfs_create_group(&s->kobj, &cpu_common_attr_group); 1079 if (rc) 1080 goto out_cpu; 1081 rc = topology_cpu_init(c); 1082 if (rc) 1083 goto out_topology; 1084 return 0; 1085 1086 out_topology: 1087 sysfs_remove_group(&s->kobj, &cpu_common_attr_group); 1088 out_cpu: 1089 #ifdef CONFIG_HOTPLUG_CPU 1090 unregister_cpu(c); 1091 #endif 1092 out: 1093 return rc; 1094 } 1095 1096 #ifdef CONFIG_HOTPLUG_CPU 1097 1098 int __ref smp_rescan_cpus(void) 1099 { 1100 struct sclp_core_info *info; 1101 int nr; 1102 1103 info = kzalloc(sizeof(*info), GFP_KERNEL); 1104 if (!info) 1105 return -ENOMEM; 1106 smp_get_core_info(info, 0); 1107 get_online_cpus(); 1108 mutex_lock(&smp_cpu_state_mutex); 1109 nr = __smp_rescan_cpus(info, 1); 1110 mutex_unlock(&smp_cpu_state_mutex); 1111 put_online_cpus(); 1112 kfree(info); 1113 if (nr) 1114 topology_schedule_update(); 1115 return 0; 1116 } 1117 1118 static ssize_t __ref rescan_store(struct device *dev, 1119 struct device_attribute *attr, 1120 const char *buf, 1121 size_t count) 1122 { 1123 int rc; 1124 1125 rc = smp_rescan_cpus(); 1126 return rc ? rc : count; 1127 } 1128 static DEVICE_ATTR(rescan, 0200, NULL, rescan_store); 1129 #endif /* CONFIG_HOTPLUG_CPU */ 1130 1131 static int __init s390_smp_init(void) 1132 { 1133 int cpu, rc = 0; 1134 1135 #ifdef CONFIG_HOTPLUG_CPU 1136 rc = device_create_file(cpu_subsys.dev_root, &dev_attr_rescan); 1137 if (rc) 1138 return rc; 1139 #endif 1140 for_each_present_cpu(cpu) { 1141 rc = smp_add_present_cpu(cpu); 1142 if (rc) 1143 goto out; 1144 } 1145 1146 rc = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "s390/smp:online", 1147 smp_cpu_online, smp_cpu_pre_down); 1148 out: 1149 return rc; 1150 } 1151 subsys_initcall(s390_smp_init); 1152