1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * SMP related functions 4 * 5 * Copyright IBM Corp. 1999, 2012 6 * Author(s): Denis Joseph Barrow, 7 * Martin Schwidefsky <schwidefsky@de.ibm.com>, 8 * Heiko Carstens <heiko.carstens@de.ibm.com>, 9 * 10 * based on other smp stuff by 11 * (c) 1995 Alan Cox, CymruNET Ltd <alan@cymru.net> 12 * (c) 1998 Ingo Molnar 13 * 14 * The code outside of smp.c uses logical cpu numbers, only smp.c does 15 * the translation of logical to physical cpu ids. All new code that 16 * operates on physical cpu numbers needs to go into smp.c. 17 */ 18 19 #define KMSG_COMPONENT "cpu" 20 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt 21 22 #include <linux/workqueue.h> 23 #include <linux/memblock.h> 24 #include <linux/export.h> 25 #include <linux/init.h> 26 #include <linux/mm.h> 27 #include <linux/err.h> 28 #include <linux/spinlock.h> 29 #include <linux/kernel_stat.h> 30 #include <linux/delay.h> 31 #include <linux/interrupt.h> 32 #include <linux/irqflags.h> 33 #include <linux/cpu.h> 34 #include <linux/slab.h> 35 #include <linux/sched/hotplug.h> 36 #include <linux/sched/task_stack.h> 37 #include <linux/crash_dump.h> 38 #include <linux/kprobes.h> 39 #include <asm/asm-offsets.h> 40 #include <asm/diag.h> 41 #include <asm/switch_to.h> 42 #include <asm/facility.h> 43 #include <asm/ipl.h> 44 #include <asm/setup.h> 45 #include <asm/irq.h> 46 #include <asm/tlbflush.h> 47 #include <asm/vtimer.h> 48 #include <asm/lowcore.h> 49 #include <asm/sclp.h> 50 #include <asm/vdso.h> 51 #include <asm/debug.h> 52 #include <asm/os_info.h> 53 #include <asm/sigp.h> 54 #include <asm/idle.h> 55 #include <asm/nmi.h> 56 #include <asm/stacktrace.h> 57 #include <asm/topology.h> 58 #include "entry.h" 59 60 enum { 61 ec_schedule = 0, 62 ec_call_function_single, 63 ec_stop_cpu, 64 }; 65 66 enum { 67 CPU_STATE_STANDBY, 68 CPU_STATE_CONFIGURED, 69 }; 70 71 static DEFINE_PER_CPU(struct cpu *, cpu_device); 72 73 struct pcpu { 74 struct lowcore *lowcore; /* lowcore page(s) for the cpu */ 75 unsigned long ec_mask; /* bit mask for ec_xxx functions */ 76 unsigned long ec_clk; /* sigp timestamp for ec_xxx */ 77 signed char state; /* physical cpu state */ 78 signed char polarization; /* physical polarization */ 79 u16 address; /* physical cpu address */ 80 }; 81 82 static u8 boot_core_type; 83 static struct pcpu pcpu_devices[NR_CPUS]; 84 85 unsigned int smp_cpu_mt_shift; 86 EXPORT_SYMBOL(smp_cpu_mt_shift); 87 88 unsigned int smp_cpu_mtid; 89 EXPORT_SYMBOL(smp_cpu_mtid); 90 91 #ifdef CONFIG_CRASH_DUMP 92 __vector128 __initdata boot_cpu_vector_save_area[__NUM_VXRS]; 93 #endif 94 95 static unsigned int smp_max_threads __initdata = -1U; 96 97 static int __init early_nosmt(char *s) 98 { 99 smp_max_threads = 1; 100 return 0; 101 } 102 early_param("nosmt", early_nosmt); 103 104 static int __init early_smt(char *s) 105 { 106 get_option(&s, &smp_max_threads); 107 return 0; 108 } 109 early_param("smt", early_smt); 110 111 /* 112 * The smp_cpu_state_mutex must be held when changing the state or polarization 113 * member of a pcpu data structure within the pcpu_devices arreay. 114 */ 115 DEFINE_MUTEX(smp_cpu_state_mutex); 116 117 /* 118 * Signal processor helper functions. 119 */ 120 static inline int __pcpu_sigp_relax(u16 addr, u8 order, unsigned long parm) 121 { 122 int cc; 123 124 while (1) { 125 cc = __pcpu_sigp(addr, order, parm, NULL); 126 if (cc != SIGP_CC_BUSY) 127 return cc; 128 cpu_relax(); 129 } 130 } 131 132 static int pcpu_sigp_retry(struct pcpu *pcpu, u8 order, u32 parm) 133 { 134 int cc, retry; 135 136 for (retry = 0; ; retry++) { 137 cc = __pcpu_sigp(pcpu->address, order, parm, NULL); 138 if (cc != SIGP_CC_BUSY) 139 break; 140 if (retry >= 3) 141 udelay(10); 142 } 143 return cc; 144 } 145 146 static inline int pcpu_stopped(struct pcpu *pcpu) 147 { 148 u32 uninitialized_var(status); 149 150 if (__pcpu_sigp(pcpu->address, SIGP_SENSE, 151 0, &status) != SIGP_CC_STATUS_STORED) 152 return 0; 153 return !!(status & (SIGP_STATUS_CHECK_STOP|SIGP_STATUS_STOPPED)); 154 } 155 156 static inline int pcpu_running(struct pcpu *pcpu) 157 { 158 if (__pcpu_sigp(pcpu->address, SIGP_SENSE_RUNNING, 159 0, NULL) != SIGP_CC_STATUS_STORED) 160 return 1; 161 /* Status stored condition code is equivalent to cpu not running. */ 162 return 0; 163 } 164 165 /* 166 * Find struct pcpu by cpu address. 167 */ 168 static struct pcpu *pcpu_find_address(const struct cpumask *mask, u16 address) 169 { 170 int cpu; 171 172 for_each_cpu(cpu, mask) 173 if (pcpu_devices[cpu].address == address) 174 return pcpu_devices + cpu; 175 return NULL; 176 } 177 178 static void pcpu_ec_call(struct pcpu *pcpu, int ec_bit) 179 { 180 int order; 181 182 if (test_and_set_bit(ec_bit, &pcpu->ec_mask)) 183 return; 184 order = pcpu_running(pcpu) ? SIGP_EXTERNAL_CALL : SIGP_EMERGENCY_SIGNAL; 185 pcpu->ec_clk = get_tod_clock_fast(); 186 pcpu_sigp_retry(pcpu, order, 0); 187 } 188 189 static int pcpu_alloc_lowcore(struct pcpu *pcpu, int cpu) 190 { 191 unsigned long async_stack, nodat_stack; 192 struct lowcore *lc; 193 194 if (pcpu != &pcpu_devices[0]) { 195 pcpu->lowcore = (struct lowcore *) 196 __get_free_pages(GFP_KERNEL | GFP_DMA, LC_ORDER); 197 nodat_stack = __get_free_pages(GFP_KERNEL, THREAD_SIZE_ORDER); 198 if (!pcpu->lowcore || !nodat_stack) 199 goto out; 200 } else { 201 nodat_stack = pcpu->lowcore->nodat_stack - STACK_INIT_OFFSET; 202 } 203 async_stack = stack_alloc(); 204 if (!async_stack) 205 goto out; 206 lc = pcpu->lowcore; 207 memcpy(lc, &S390_lowcore, 512); 208 memset((char *) lc + 512, 0, sizeof(*lc) - 512); 209 lc->async_stack = async_stack + STACK_INIT_OFFSET; 210 lc->nodat_stack = nodat_stack + STACK_INIT_OFFSET; 211 lc->cpu_nr = cpu; 212 lc->spinlock_lockval = arch_spin_lockval(cpu); 213 lc->spinlock_index = 0; 214 lc->br_r1_trampoline = 0x07f1; /* br %r1 */ 215 if (nmi_alloc_per_cpu(lc)) 216 goto out_async; 217 if (vdso_alloc_per_cpu(lc)) 218 goto out_mcesa; 219 lowcore_ptr[cpu] = lc; 220 pcpu_sigp_retry(pcpu, SIGP_SET_PREFIX, (u32)(unsigned long) lc); 221 return 0; 222 223 out_mcesa: 224 nmi_free_per_cpu(lc); 225 out_async: 226 stack_free(async_stack); 227 out: 228 if (pcpu != &pcpu_devices[0]) { 229 free_pages(nodat_stack, THREAD_SIZE_ORDER); 230 free_pages((unsigned long) pcpu->lowcore, LC_ORDER); 231 } 232 return -ENOMEM; 233 } 234 235 #ifdef CONFIG_HOTPLUG_CPU 236 237 static void pcpu_free_lowcore(struct pcpu *pcpu) 238 { 239 unsigned long async_stack, nodat_stack, lowcore; 240 241 nodat_stack = pcpu->lowcore->nodat_stack - STACK_INIT_OFFSET; 242 async_stack = pcpu->lowcore->async_stack - STACK_INIT_OFFSET; 243 lowcore = (unsigned long) pcpu->lowcore; 244 245 pcpu_sigp_retry(pcpu, SIGP_SET_PREFIX, 0); 246 lowcore_ptr[pcpu - pcpu_devices] = NULL; 247 vdso_free_per_cpu(pcpu->lowcore); 248 nmi_free_per_cpu(pcpu->lowcore); 249 stack_free(async_stack); 250 if (pcpu == &pcpu_devices[0]) 251 return; 252 free_pages(nodat_stack, THREAD_SIZE_ORDER); 253 free_pages(lowcore, LC_ORDER); 254 } 255 256 #endif /* CONFIG_HOTPLUG_CPU */ 257 258 static void pcpu_prepare_secondary(struct pcpu *pcpu, int cpu) 259 { 260 struct lowcore *lc = pcpu->lowcore; 261 262 cpumask_set_cpu(cpu, &init_mm.context.cpu_attach_mask); 263 cpumask_set_cpu(cpu, mm_cpumask(&init_mm)); 264 lc->cpu_nr = cpu; 265 lc->spinlock_lockval = arch_spin_lockval(cpu); 266 lc->spinlock_index = 0; 267 lc->percpu_offset = __per_cpu_offset[cpu]; 268 lc->kernel_asce = S390_lowcore.kernel_asce; 269 lc->machine_flags = S390_lowcore.machine_flags; 270 lc->user_timer = lc->system_timer = 271 lc->steal_timer = lc->avg_steal_timer = 0; 272 __ctl_store(lc->cregs_save_area, 0, 15); 273 save_access_regs((unsigned int *) lc->access_regs_save_area); 274 memcpy(lc->stfle_fac_list, S390_lowcore.stfle_fac_list, 275 sizeof(lc->stfle_fac_list)); 276 memcpy(lc->alt_stfle_fac_list, S390_lowcore.alt_stfle_fac_list, 277 sizeof(lc->alt_stfle_fac_list)); 278 arch_spin_lock_setup(cpu); 279 } 280 281 static void pcpu_attach_task(struct pcpu *pcpu, struct task_struct *tsk) 282 { 283 struct lowcore *lc = pcpu->lowcore; 284 285 lc->kernel_stack = (unsigned long) task_stack_page(tsk) 286 + THREAD_SIZE - STACK_FRAME_OVERHEAD - sizeof(struct pt_regs); 287 lc->current_task = (unsigned long) tsk; 288 lc->lpp = LPP_MAGIC; 289 lc->current_pid = tsk->pid; 290 lc->user_timer = tsk->thread.user_timer; 291 lc->guest_timer = tsk->thread.guest_timer; 292 lc->system_timer = tsk->thread.system_timer; 293 lc->hardirq_timer = tsk->thread.hardirq_timer; 294 lc->softirq_timer = tsk->thread.softirq_timer; 295 lc->steal_timer = 0; 296 } 297 298 static void pcpu_start_fn(struct pcpu *pcpu, void (*func)(void *), void *data) 299 { 300 struct lowcore *lc = pcpu->lowcore; 301 302 lc->restart_stack = lc->nodat_stack; 303 lc->restart_fn = (unsigned long) func; 304 lc->restart_data = (unsigned long) data; 305 lc->restart_source = -1UL; 306 pcpu_sigp_retry(pcpu, SIGP_RESTART, 0); 307 } 308 309 /* 310 * Call function via PSW restart on pcpu and stop the current cpu. 311 */ 312 static void __pcpu_delegate(void (*func)(void*), void *data) 313 { 314 func(data); /* should not return */ 315 } 316 317 static void __no_sanitize_address pcpu_delegate(struct pcpu *pcpu, 318 void (*func)(void *), 319 void *data, unsigned long stack) 320 { 321 struct lowcore *lc = lowcore_ptr[pcpu - pcpu_devices]; 322 unsigned long source_cpu = stap(); 323 324 __load_psw_mask(PSW_KERNEL_BITS | PSW_MASK_DAT); 325 if (pcpu->address == source_cpu) 326 CALL_ON_STACK(__pcpu_delegate, stack, 2, func, data); 327 /* Stop target cpu (if func returns this stops the current cpu). */ 328 pcpu_sigp_retry(pcpu, SIGP_STOP, 0); 329 /* Restart func on the target cpu and stop the current cpu. */ 330 mem_assign_absolute(lc->restart_stack, stack); 331 mem_assign_absolute(lc->restart_fn, (unsigned long) func); 332 mem_assign_absolute(lc->restart_data, (unsigned long) data); 333 mem_assign_absolute(lc->restart_source, source_cpu); 334 __bpon(); 335 asm volatile( 336 "0: sigp 0,%0,%2 # sigp restart to target cpu\n" 337 " brc 2,0b # busy, try again\n" 338 "1: sigp 0,%1,%3 # sigp stop to current cpu\n" 339 " brc 2,1b # busy, try again\n" 340 : : "d" (pcpu->address), "d" (source_cpu), 341 "K" (SIGP_RESTART), "K" (SIGP_STOP) 342 : "0", "1", "cc"); 343 for (;;) ; 344 } 345 346 /* 347 * Enable additional logical cpus for multi-threading. 348 */ 349 static int pcpu_set_smt(unsigned int mtid) 350 { 351 int cc; 352 353 if (smp_cpu_mtid == mtid) 354 return 0; 355 cc = __pcpu_sigp(0, SIGP_SET_MULTI_THREADING, mtid, NULL); 356 if (cc == 0) { 357 smp_cpu_mtid = mtid; 358 smp_cpu_mt_shift = 0; 359 while (smp_cpu_mtid >= (1U << smp_cpu_mt_shift)) 360 smp_cpu_mt_shift++; 361 pcpu_devices[0].address = stap(); 362 } 363 return cc; 364 } 365 366 /* 367 * Call function on an online CPU. 368 */ 369 void smp_call_online_cpu(void (*func)(void *), void *data) 370 { 371 struct pcpu *pcpu; 372 373 /* Use the current cpu if it is online. */ 374 pcpu = pcpu_find_address(cpu_online_mask, stap()); 375 if (!pcpu) 376 /* Use the first online cpu. */ 377 pcpu = pcpu_devices + cpumask_first(cpu_online_mask); 378 pcpu_delegate(pcpu, func, data, (unsigned long) restart_stack); 379 } 380 381 /* 382 * Call function on the ipl CPU. 383 */ 384 void smp_call_ipl_cpu(void (*func)(void *), void *data) 385 { 386 struct lowcore *lc = pcpu_devices->lowcore; 387 388 if (pcpu_devices[0].address == stap()) 389 lc = &S390_lowcore; 390 391 pcpu_delegate(&pcpu_devices[0], func, data, 392 lc->nodat_stack); 393 } 394 395 int smp_find_processor_id(u16 address) 396 { 397 int cpu; 398 399 for_each_present_cpu(cpu) 400 if (pcpu_devices[cpu].address == address) 401 return cpu; 402 return -1; 403 } 404 405 bool arch_vcpu_is_preempted(int cpu) 406 { 407 if (test_cpu_flag_of(CIF_ENABLED_WAIT, cpu)) 408 return false; 409 if (pcpu_running(pcpu_devices + cpu)) 410 return false; 411 return true; 412 } 413 EXPORT_SYMBOL(arch_vcpu_is_preempted); 414 415 void smp_yield_cpu(int cpu) 416 { 417 if (MACHINE_HAS_DIAG9C) { 418 diag_stat_inc_norecursion(DIAG_STAT_X09C); 419 asm volatile("diag %0,0,0x9c" 420 : : "d" (pcpu_devices[cpu].address)); 421 } else if (MACHINE_HAS_DIAG44) { 422 diag_stat_inc_norecursion(DIAG_STAT_X044); 423 asm volatile("diag 0,0,0x44"); 424 } 425 } 426 427 /* 428 * Send cpus emergency shutdown signal. This gives the cpus the 429 * opportunity to complete outstanding interrupts. 430 */ 431 void notrace smp_emergency_stop(void) 432 { 433 cpumask_t cpumask; 434 u64 end; 435 int cpu; 436 437 cpumask_copy(&cpumask, cpu_online_mask); 438 cpumask_clear_cpu(smp_processor_id(), &cpumask); 439 440 end = get_tod_clock() + (1000000UL << 12); 441 for_each_cpu(cpu, &cpumask) { 442 struct pcpu *pcpu = pcpu_devices + cpu; 443 set_bit(ec_stop_cpu, &pcpu->ec_mask); 444 while (__pcpu_sigp(pcpu->address, SIGP_EMERGENCY_SIGNAL, 445 0, NULL) == SIGP_CC_BUSY && 446 get_tod_clock() < end) 447 cpu_relax(); 448 } 449 while (get_tod_clock() < end) { 450 for_each_cpu(cpu, &cpumask) 451 if (pcpu_stopped(pcpu_devices + cpu)) 452 cpumask_clear_cpu(cpu, &cpumask); 453 if (cpumask_empty(&cpumask)) 454 break; 455 cpu_relax(); 456 } 457 } 458 NOKPROBE_SYMBOL(smp_emergency_stop); 459 460 /* 461 * Stop all cpus but the current one. 462 */ 463 void smp_send_stop(void) 464 { 465 int cpu; 466 467 /* Disable all interrupts/machine checks */ 468 __load_psw_mask(PSW_KERNEL_BITS | PSW_MASK_DAT); 469 trace_hardirqs_off(); 470 471 debug_set_critical(); 472 473 if (oops_in_progress) 474 smp_emergency_stop(); 475 476 /* stop all processors */ 477 for_each_online_cpu(cpu) { 478 if (cpu == smp_processor_id()) 479 continue; 480 pcpu_sigp_retry(pcpu_devices + cpu, SIGP_STOP, 0); 481 while (!pcpu_stopped(pcpu_devices + cpu)) 482 cpu_relax(); 483 } 484 } 485 486 /* 487 * This is the main routine where commands issued by other 488 * cpus are handled. 489 */ 490 static void smp_handle_ext_call(void) 491 { 492 unsigned long bits; 493 494 /* handle bit signal external calls */ 495 bits = xchg(&pcpu_devices[smp_processor_id()].ec_mask, 0); 496 if (test_bit(ec_stop_cpu, &bits)) 497 smp_stop_cpu(); 498 if (test_bit(ec_schedule, &bits)) 499 scheduler_ipi(); 500 if (test_bit(ec_call_function_single, &bits)) 501 generic_smp_call_function_single_interrupt(); 502 } 503 504 static void do_ext_call_interrupt(struct ext_code ext_code, 505 unsigned int param32, unsigned long param64) 506 { 507 inc_irq_stat(ext_code.code == 0x1202 ? IRQEXT_EXC : IRQEXT_EMS); 508 smp_handle_ext_call(); 509 } 510 511 void arch_send_call_function_ipi_mask(const struct cpumask *mask) 512 { 513 int cpu; 514 515 for_each_cpu(cpu, mask) 516 pcpu_ec_call(pcpu_devices + cpu, ec_call_function_single); 517 } 518 519 void arch_send_call_function_single_ipi(int cpu) 520 { 521 pcpu_ec_call(pcpu_devices + cpu, ec_call_function_single); 522 } 523 524 /* 525 * this function sends a 'reschedule' IPI to another CPU. 526 * it goes straight through and wastes no time serializing 527 * anything. Worst case is that we lose a reschedule ... 528 */ 529 void smp_send_reschedule(int cpu) 530 { 531 pcpu_ec_call(pcpu_devices + cpu, ec_schedule); 532 } 533 534 /* 535 * parameter area for the set/clear control bit callbacks 536 */ 537 struct ec_creg_mask_parms { 538 unsigned long orval; 539 unsigned long andval; 540 int cr; 541 }; 542 543 /* 544 * callback for setting/clearing control bits 545 */ 546 static void smp_ctl_bit_callback(void *info) 547 { 548 struct ec_creg_mask_parms *pp = info; 549 unsigned long cregs[16]; 550 551 __ctl_store(cregs, 0, 15); 552 cregs[pp->cr] = (cregs[pp->cr] & pp->andval) | pp->orval; 553 __ctl_load(cregs, 0, 15); 554 } 555 556 /* 557 * Set a bit in a control register of all cpus 558 */ 559 void smp_ctl_set_bit(int cr, int bit) 560 { 561 struct ec_creg_mask_parms parms = { 1UL << bit, -1UL, cr }; 562 563 on_each_cpu(smp_ctl_bit_callback, &parms, 1); 564 } 565 EXPORT_SYMBOL(smp_ctl_set_bit); 566 567 /* 568 * Clear a bit in a control register of all cpus 569 */ 570 void smp_ctl_clear_bit(int cr, int bit) 571 { 572 struct ec_creg_mask_parms parms = { 0, ~(1UL << bit), cr }; 573 574 on_each_cpu(smp_ctl_bit_callback, &parms, 1); 575 } 576 EXPORT_SYMBOL(smp_ctl_clear_bit); 577 578 #ifdef CONFIG_CRASH_DUMP 579 580 int smp_store_status(int cpu) 581 { 582 struct pcpu *pcpu = pcpu_devices + cpu; 583 unsigned long pa; 584 585 pa = __pa(&pcpu->lowcore->floating_pt_save_area); 586 if (__pcpu_sigp_relax(pcpu->address, SIGP_STORE_STATUS_AT_ADDRESS, 587 pa) != SIGP_CC_ORDER_CODE_ACCEPTED) 588 return -EIO; 589 if (!MACHINE_HAS_VX && !MACHINE_HAS_GS) 590 return 0; 591 pa = __pa(pcpu->lowcore->mcesad & MCESA_ORIGIN_MASK); 592 if (MACHINE_HAS_GS) 593 pa |= pcpu->lowcore->mcesad & MCESA_LC_MASK; 594 if (__pcpu_sigp_relax(pcpu->address, SIGP_STORE_ADDITIONAL_STATUS, 595 pa) != SIGP_CC_ORDER_CODE_ACCEPTED) 596 return -EIO; 597 return 0; 598 } 599 600 /* 601 * Collect CPU state of the previous, crashed system. 602 * There are four cases: 603 * 1) standard zfcp dump 604 * condition: OLDMEM_BASE == NULL && ipl_info.type == IPL_TYPE_FCP_DUMP 605 * The state for all CPUs except the boot CPU needs to be collected 606 * with sigp stop-and-store-status. The boot CPU state is located in 607 * the absolute lowcore of the memory stored in the HSA. The zcore code 608 * will copy the boot CPU state from the HSA. 609 * 2) stand-alone kdump for SCSI (zfcp dump with swapped memory) 610 * condition: OLDMEM_BASE != NULL && ipl_info.type == IPL_TYPE_FCP_DUMP 611 * The state for all CPUs except the boot CPU needs to be collected 612 * with sigp stop-and-store-status. The firmware or the boot-loader 613 * stored the registers of the boot CPU in the absolute lowcore in the 614 * memory of the old system. 615 * 3) kdump and the old kernel did not store the CPU state, 616 * or stand-alone kdump for DASD 617 * condition: OLDMEM_BASE != NULL && !is_kdump_kernel() 618 * The state for all CPUs except the boot CPU needs to be collected 619 * with sigp stop-and-store-status. The kexec code or the boot-loader 620 * stored the registers of the boot CPU in the memory of the old system. 621 * 4) kdump and the old kernel stored the CPU state 622 * condition: OLDMEM_BASE != NULL && is_kdump_kernel() 623 * This case does not exist for s390 anymore, setup_arch explicitly 624 * deactivates the elfcorehdr= kernel parameter 625 */ 626 static __init void smp_save_cpu_vxrs(struct save_area *sa, u16 addr, 627 bool is_boot_cpu, unsigned long page) 628 { 629 __vector128 *vxrs = (__vector128 *) page; 630 631 if (is_boot_cpu) 632 vxrs = boot_cpu_vector_save_area; 633 else 634 __pcpu_sigp_relax(addr, SIGP_STORE_ADDITIONAL_STATUS, page); 635 save_area_add_vxrs(sa, vxrs); 636 } 637 638 static __init void smp_save_cpu_regs(struct save_area *sa, u16 addr, 639 bool is_boot_cpu, unsigned long page) 640 { 641 void *regs = (void *) page; 642 643 if (is_boot_cpu) 644 copy_oldmem_kernel(regs, (void *) __LC_FPREGS_SAVE_AREA, 512); 645 else 646 __pcpu_sigp_relax(addr, SIGP_STORE_STATUS_AT_ADDRESS, page); 647 save_area_add_regs(sa, regs); 648 } 649 650 void __init smp_save_dump_cpus(void) 651 { 652 int addr, boot_cpu_addr, max_cpu_addr; 653 struct save_area *sa; 654 unsigned long page; 655 bool is_boot_cpu; 656 657 if (!(OLDMEM_BASE || ipl_info.type == IPL_TYPE_FCP_DUMP)) 658 /* No previous system present, normal boot. */ 659 return; 660 /* Allocate a page as dumping area for the store status sigps */ 661 page = memblock_phys_alloc_range(PAGE_SIZE, PAGE_SIZE, 0, 1UL << 31); 662 if (!page) 663 panic("ERROR: Failed to allocate %lx bytes below %lx\n", 664 PAGE_SIZE, 1UL << 31); 665 666 /* Set multi-threading state to the previous system. */ 667 pcpu_set_smt(sclp.mtid_prev); 668 boot_cpu_addr = stap(); 669 max_cpu_addr = SCLP_MAX_CORES << sclp.mtid_prev; 670 for (addr = 0; addr <= max_cpu_addr; addr++) { 671 if (__pcpu_sigp_relax(addr, SIGP_SENSE, 0) == 672 SIGP_CC_NOT_OPERATIONAL) 673 continue; 674 is_boot_cpu = (addr == boot_cpu_addr); 675 /* Allocate save area */ 676 sa = save_area_alloc(is_boot_cpu); 677 if (!sa) 678 panic("could not allocate memory for save area\n"); 679 if (MACHINE_HAS_VX) 680 /* Get the vector registers */ 681 smp_save_cpu_vxrs(sa, addr, is_boot_cpu, page); 682 /* 683 * For a zfcp dump OLDMEM_BASE == NULL and the registers 684 * of the boot CPU are stored in the HSA. To retrieve 685 * these registers an SCLP request is required which is 686 * done by drivers/s390/char/zcore.c:init_cpu_info() 687 */ 688 if (!is_boot_cpu || OLDMEM_BASE) 689 /* Get the CPU registers */ 690 smp_save_cpu_regs(sa, addr, is_boot_cpu, page); 691 } 692 memblock_free(page, PAGE_SIZE); 693 diag_dma_ops.diag308_reset(); 694 pcpu_set_smt(0); 695 } 696 #endif /* CONFIG_CRASH_DUMP */ 697 698 void smp_cpu_set_polarization(int cpu, int val) 699 { 700 pcpu_devices[cpu].polarization = val; 701 } 702 703 int smp_cpu_get_polarization(int cpu) 704 { 705 return pcpu_devices[cpu].polarization; 706 } 707 708 static void __ref smp_get_core_info(struct sclp_core_info *info, int early) 709 { 710 static int use_sigp_detection; 711 int address; 712 713 if (use_sigp_detection || sclp_get_core_info(info, early)) { 714 use_sigp_detection = 1; 715 for (address = 0; 716 address < (SCLP_MAX_CORES << smp_cpu_mt_shift); 717 address += (1U << smp_cpu_mt_shift)) { 718 if (__pcpu_sigp_relax(address, SIGP_SENSE, 0) == 719 SIGP_CC_NOT_OPERATIONAL) 720 continue; 721 info->core[info->configured].core_id = 722 address >> smp_cpu_mt_shift; 723 info->configured++; 724 } 725 info->combined = info->configured; 726 } 727 } 728 729 static int smp_add_present_cpu(int cpu); 730 731 static int __smp_rescan_cpus(struct sclp_core_info *info, int sysfs_add) 732 { 733 struct pcpu *pcpu; 734 cpumask_t avail; 735 int cpu, nr, i, j; 736 u16 address; 737 738 nr = 0; 739 cpumask_xor(&avail, cpu_possible_mask, cpu_present_mask); 740 cpu = cpumask_first(&avail); 741 for (i = 0; (i < info->combined) && (cpu < nr_cpu_ids); i++) { 742 if (sclp.has_core_type && info->core[i].type != boot_core_type) 743 continue; 744 address = info->core[i].core_id << smp_cpu_mt_shift; 745 for (j = 0; j <= smp_cpu_mtid; j++) { 746 if (pcpu_find_address(cpu_present_mask, address + j)) 747 continue; 748 pcpu = pcpu_devices + cpu; 749 pcpu->address = address + j; 750 pcpu->state = 751 (cpu >= info->configured*(smp_cpu_mtid + 1)) ? 752 CPU_STATE_STANDBY : CPU_STATE_CONFIGURED; 753 smp_cpu_set_polarization(cpu, POLARIZATION_UNKNOWN); 754 set_cpu_present(cpu, true); 755 if (sysfs_add && smp_add_present_cpu(cpu) != 0) 756 set_cpu_present(cpu, false); 757 else 758 nr++; 759 cpu = cpumask_next(cpu, &avail); 760 if (cpu >= nr_cpu_ids) 761 break; 762 } 763 } 764 return nr; 765 } 766 767 void __init smp_detect_cpus(void) 768 { 769 unsigned int cpu, mtid, c_cpus, s_cpus; 770 struct sclp_core_info *info; 771 u16 address; 772 773 /* Get CPU information */ 774 info = memblock_alloc(sizeof(*info), 8); 775 if (!info) 776 panic("%s: Failed to allocate %zu bytes align=0x%x\n", 777 __func__, sizeof(*info), 8); 778 smp_get_core_info(info, 1); 779 /* Find boot CPU type */ 780 if (sclp.has_core_type) { 781 address = stap(); 782 for (cpu = 0; cpu < info->combined; cpu++) 783 if (info->core[cpu].core_id == address) { 784 /* The boot cpu dictates the cpu type. */ 785 boot_core_type = info->core[cpu].type; 786 break; 787 } 788 if (cpu >= info->combined) 789 panic("Could not find boot CPU type"); 790 } 791 792 /* Set multi-threading state for the current system */ 793 mtid = boot_core_type ? sclp.mtid : sclp.mtid_cp; 794 mtid = (mtid < smp_max_threads) ? mtid : smp_max_threads - 1; 795 pcpu_set_smt(mtid); 796 797 /* Print number of CPUs */ 798 c_cpus = s_cpus = 0; 799 for (cpu = 0; cpu < info->combined; cpu++) { 800 if (sclp.has_core_type && 801 info->core[cpu].type != boot_core_type) 802 continue; 803 if (cpu < info->configured) 804 c_cpus += smp_cpu_mtid + 1; 805 else 806 s_cpus += smp_cpu_mtid + 1; 807 } 808 pr_info("%d configured CPUs, %d standby CPUs\n", c_cpus, s_cpus); 809 810 /* Add CPUs present at boot */ 811 get_online_cpus(); 812 __smp_rescan_cpus(info, 0); 813 put_online_cpus(); 814 memblock_free_early((unsigned long)info, sizeof(*info)); 815 } 816 817 static void smp_init_secondary(void) 818 { 819 int cpu = smp_processor_id(); 820 821 S390_lowcore.last_update_clock = get_tod_clock(); 822 restore_access_regs(S390_lowcore.access_regs_save_area); 823 cpu_init(); 824 preempt_disable(); 825 init_cpu_timer(); 826 vtime_init(); 827 pfault_init(); 828 notify_cpu_starting(smp_processor_id()); 829 if (topology_cpu_dedicated(cpu)) 830 set_cpu_flag(CIF_DEDICATED_CPU); 831 else 832 clear_cpu_flag(CIF_DEDICATED_CPU); 833 set_cpu_online(smp_processor_id(), true); 834 inc_irq_stat(CPU_RST); 835 local_irq_enable(); 836 cpu_startup_entry(CPUHP_AP_ONLINE_IDLE); 837 } 838 839 /* 840 * Activate a secondary processor. 841 */ 842 static void __no_sanitize_address smp_start_secondary(void *cpuvoid) 843 { 844 S390_lowcore.restart_stack = (unsigned long) restart_stack; 845 S390_lowcore.restart_fn = (unsigned long) do_restart; 846 S390_lowcore.restart_data = 0; 847 S390_lowcore.restart_source = -1UL; 848 __ctl_load(S390_lowcore.cregs_save_area, 0, 15); 849 __load_psw_mask(PSW_KERNEL_BITS | PSW_MASK_DAT); 850 CALL_ON_STACK(smp_init_secondary, S390_lowcore.kernel_stack, 0); 851 } 852 853 /* Upping and downing of CPUs */ 854 int __cpu_up(unsigned int cpu, struct task_struct *tidle) 855 { 856 struct pcpu *pcpu; 857 int base, i, rc; 858 859 pcpu = pcpu_devices + cpu; 860 if (pcpu->state != CPU_STATE_CONFIGURED) 861 return -EIO; 862 base = smp_get_base_cpu(cpu); 863 for (i = 0; i <= smp_cpu_mtid; i++) { 864 if (base + i < nr_cpu_ids) 865 if (cpu_online(base + i)) 866 break; 867 } 868 /* 869 * If this is the first CPU of the core to get online 870 * do an initial CPU reset. 871 */ 872 if (i > smp_cpu_mtid && 873 pcpu_sigp_retry(pcpu_devices + base, SIGP_INITIAL_CPU_RESET, 0) != 874 SIGP_CC_ORDER_CODE_ACCEPTED) 875 return -EIO; 876 877 rc = pcpu_alloc_lowcore(pcpu, cpu); 878 if (rc) 879 return rc; 880 pcpu_prepare_secondary(pcpu, cpu); 881 pcpu_attach_task(pcpu, tidle); 882 pcpu_start_fn(pcpu, smp_start_secondary, NULL); 883 /* Wait until cpu puts itself in the online & active maps */ 884 while (!cpu_online(cpu)) 885 cpu_relax(); 886 return 0; 887 } 888 889 static unsigned int setup_possible_cpus __initdata; 890 891 static int __init _setup_possible_cpus(char *s) 892 { 893 get_option(&s, &setup_possible_cpus); 894 return 0; 895 } 896 early_param("possible_cpus", _setup_possible_cpus); 897 898 #ifdef CONFIG_HOTPLUG_CPU 899 900 int __cpu_disable(void) 901 { 902 unsigned long cregs[16]; 903 904 /* Handle possible pending IPIs */ 905 smp_handle_ext_call(); 906 set_cpu_online(smp_processor_id(), false); 907 /* Disable pseudo page faults on this cpu. */ 908 pfault_fini(); 909 /* Disable interrupt sources via control register. */ 910 __ctl_store(cregs, 0, 15); 911 cregs[0] &= ~0x0000ee70UL; /* disable all external interrupts */ 912 cregs[6] &= ~0xff000000UL; /* disable all I/O interrupts */ 913 cregs[14] &= ~0x1f000000UL; /* disable most machine checks */ 914 __ctl_load(cregs, 0, 15); 915 clear_cpu_flag(CIF_NOHZ_DELAY); 916 return 0; 917 } 918 919 void __cpu_die(unsigned int cpu) 920 { 921 struct pcpu *pcpu; 922 923 /* Wait until target cpu is down */ 924 pcpu = pcpu_devices + cpu; 925 while (!pcpu_stopped(pcpu)) 926 cpu_relax(); 927 pcpu_free_lowcore(pcpu); 928 cpumask_clear_cpu(cpu, mm_cpumask(&init_mm)); 929 cpumask_clear_cpu(cpu, &init_mm.context.cpu_attach_mask); 930 } 931 932 void __noreturn cpu_die(void) 933 { 934 idle_task_exit(); 935 __bpon(); 936 pcpu_sigp_retry(pcpu_devices + smp_processor_id(), SIGP_STOP, 0); 937 for (;;) ; 938 } 939 940 #endif /* CONFIG_HOTPLUG_CPU */ 941 942 void __init smp_fill_possible_mask(void) 943 { 944 unsigned int possible, sclp_max, cpu; 945 946 sclp_max = max(sclp.mtid, sclp.mtid_cp) + 1; 947 sclp_max = min(smp_max_threads, sclp_max); 948 sclp_max = (sclp.max_cores * sclp_max) ?: nr_cpu_ids; 949 possible = setup_possible_cpus ?: nr_cpu_ids; 950 possible = min(possible, sclp_max); 951 for (cpu = 0; cpu < possible && cpu < nr_cpu_ids; cpu++) 952 set_cpu_possible(cpu, true); 953 } 954 955 void __init smp_prepare_cpus(unsigned int max_cpus) 956 { 957 /* request the 0x1201 emergency signal external interrupt */ 958 if (register_external_irq(EXT_IRQ_EMERGENCY_SIG, do_ext_call_interrupt)) 959 panic("Couldn't request external interrupt 0x1201"); 960 /* request the 0x1202 external call external interrupt */ 961 if (register_external_irq(EXT_IRQ_EXTERNAL_CALL, do_ext_call_interrupt)) 962 panic("Couldn't request external interrupt 0x1202"); 963 } 964 965 void __init smp_prepare_boot_cpu(void) 966 { 967 struct pcpu *pcpu = pcpu_devices; 968 969 WARN_ON(!cpu_present(0) || !cpu_online(0)); 970 pcpu->state = CPU_STATE_CONFIGURED; 971 pcpu->lowcore = (struct lowcore *)(unsigned long) store_prefix(); 972 S390_lowcore.percpu_offset = __per_cpu_offset[0]; 973 smp_cpu_set_polarization(0, POLARIZATION_UNKNOWN); 974 } 975 976 void __init smp_cpus_done(unsigned int max_cpus) 977 { 978 } 979 980 void __init smp_setup_processor_id(void) 981 { 982 pcpu_devices[0].address = stap(); 983 S390_lowcore.cpu_nr = 0; 984 S390_lowcore.spinlock_lockval = arch_spin_lockval(0); 985 S390_lowcore.spinlock_index = 0; 986 } 987 988 /* 989 * the frequency of the profiling timer can be changed 990 * by writing a multiplier value into /proc/profile. 991 * 992 * usually you want to run this on all CPUs ;) 993 */ 994 int setup_profiling_timer(unsigned int multiplier) 995 { 996 return 0; 997 } 998 999 #ifdef CONFIG_HOTPLUG_CPU 1000 static ssize_t cpu_configure_show(struct device *dev, 1001 struct device_attribute *attr, char *buf) 1002 { 1003 ssize_t count; 1004 1005 mutex_lock(&smp_cpu_state_mutex); 1006 count = sprintf(buf, "%d\n", pcpu_devices[dev->id].state); 1007 mutex_unlock(&smp_cpu_state_mutex); 1008 return count; 1009 } 1010 1011 static ssize_t cpu_configure_store(struct device *dev, 1012 struct device_attribute *attr, 1013 const char *buf, size_t count) 1014 { 1015 struct pcpu *pcpu; 1016 int cpu, val, rc, i; 1017 char delim; 1018 1019 if (sscanf(buf, "%d %c", &val, &delim) != 1) 1020 return -EINVAL; 1021 if (val != 0 && val != 1) 1022 return -EINVAL; 1023 get_online_cpus(); 1024 mutex_lock(&smp_cpu_state_mutex); 1025 rc = -EBUSY; 1026 /* disallow configuration changes of online cpus and cpu 0 */ 1027 cpu = dev->id; 1028 cpu = smp_get_base_cpu(cpu); 1029 if (cpu == 0) 1030 goto out; 1031 for (i = 0; i <= smp_cpu_mtid; i++) 1032 if (cpu_online(cpu + i)) 1033 goto out; 1034 pcpu = pcpu_devices + cpu; 1035 rc = 0; 1036 switch (val) { 1037 case 0: 1038 if (pcpu->state != CPU_STATE_CONFIGURED) 1039 break; 1040 rc = sclp_core_deconfigure(pcpu->address >> smp_cpu_mt_shift); 1041 if (rc) 1042 break; 1043 for (i = 0; i <= smp_cpu_mtid; i++) { 1044 if (cpu + i >= nr_cpu_ids || !cpu_present(cpu + i)) 1045 continue; 1046 pcpu[i].state = CPU_STATE_STANDBY; 1047 smp_cpu_set_polarization(cpu + i, 1048 POLARIZATION_UNKNOWN); 1049 } 1050 topology_expect_change(); 1051 break; 1052 case 1: 1053 if (pcpu->state != CPU_STATE_STANDBY) 1054 break; 1055 rc = sclp_core_configure(pcpu->address >> smp_cpu_mt_shift); 1056 if (rc) 1057 break; 1058 for (i = 0; i <= smp_cpu_mtid; i++) { 1059 if (cpu + i >= nr_cpu_ids || !cpu_present(cpu + i)) 1060 continue; 1061 pcpu[i].state = CPU_STATE_CONFIGURED; 1062 smp_cpu_set_polarization(cpu + i, 1063 POLARIZATION_UNKNOWN); 1064 } 1065 topology_expect_change(); 1066 break; 1067 default: 1068 break; 1069 } 1070 out: 1071 mutex_unlock(&smp_cpu_state_mutex); 1072 put_online_cpus(); 1073 return rc ? rc : count; 1074 } 1075 static DEVICE_ATTR(configure, 0644, cpu_configure_show, cpu_configure_store); 1076 #endif /* CONFIG_HOTPLUG_CPU */ 1077 1078 static ssize_t show_cpu_address(struct device *dev, 1079 struct device_attribute *attr, char *buf) 1080 { 1081 return sprintf(buf, "%d\n", pcpu_devices[dev->id].address); 1082 } 1083 static DEVICE_ATTR(address, 0444, show_cpu_address, NULL); 1084 1085 static struct attribute *cpu_common_attrs[] = { 1086 #ifdef CONFIG_HOTPLUG_CPU 1087 &dev_attr_configure.attr, 1088 #endif 1089 &dev_attr_address.attr, 1090 NULL, 1091 }; 1092 1093 static struct attribute_group cpu_common_attr_group = { 1094 .attrs = cpu_common_attrs, 1095 }; 1096 1097 static struct attribute *cpu_online_attrs[] = { 1098 &dev_attr_idle_count.attr, 1099 &dev_attr_idle_time_us.attr, 1100 NULL, 1101 }; 1102 1103 static struct attribute_group cpu_online_attr_group = { 1104 .attrs = cpu_online_attrs, 1105 }; 1106 1107 static int smp_cpu_online(unsigned int cpu) 1108 { 1109 struct device *s = &per_cpu(cpu_device, cpu)->dev; 1110 1111 return sysfs_create_group(&s->kobj, &cpu_online_attr_group); 1112 } 1113 static int smp_cpu_pre_down(unsigned int cpu) 1114 { 1115 struct device *s = &per_cpu(cpu_device, cpu)->dev; 1116 1117 sysfs_remove_group(&s->kobj, &cpu_online_attr_group); 1118 return 0; 1119 } 1120 1121 static int smp_add_present_cpu(int cpu) 1122 { 1123 struct device *s; 1124 struct cpu *c; 1125 int rc; 1126 1127 c = kzalloc(sizeof(*c), GFP_KERNEL); 1128 if (!c) 1129 return -ENOMEM; 1130 per_cpu(cpu_device, cpu) = c; 1131 s = &c->dev; 1132 c->hotpluggable = 1; 1133 rc = register_cpu(c, cpu); 1134 if (rc) 1135 goto out; 1136 rc = sysfs_create_group(&s->kobj, &cpu_common_attr_group); 1137 if (rc) 1138 goto out_cpu; 1139 rc = topology_cpu_init(c); 1140 if (rc) 1141 goto out_topology; 1142 return 0; 1143 1144 out_topology: 1145 sysfs_remove_group(&s->kobj, &cpu_common_attr_group); 1146 out_cpu: 1147 #ifdef CONFIG_HOTPLUG_CPU 1148 unregister_cpu(c); 1149 #endif 1150 out: 1151 return rc; 1152 } 1153 1154 #ifdef CONFIG_HOTPLUG_CPU 1155 1156 int __ref smp_rescan_cpus(void) 1157 { 1158 struct sclp_core_info *info; 1159 int nr; 1160 1161 info = kzalloc(sizeof(*info), GFP_KERNEL); 1162 if (!info) 1163 return -ENOMEM; 1164 smp_get_core_info(info, 0); 1165 get_online_cpus(); 1166 mutex_lock(&smp_cpu_state_mutex); 1167 nr = __smp_rescan_cpus(info, 1); 1168 mutex_unlock(&smp_cpu_state_mutex); 1169 put_online_cpus(); 1170 kfree(info); 1171 if (nr) 1172 topology_schedule_update(); 1173 return 0; 1174 } 1175 1176 static ssize_t __ref rescan_store(struct device *dev, 1177 struct device_attribute *attr, 1178 const char *buf, 1179 size_t count) 1180 { 1181 int rc; 1182 1183 rc = lock_device_hotplug_sysfs(); 1184 if (rc) 1185 return rc; 1186 rc = smp_rescan_cpus(); 1187 unlock_device_hotplug(); 1188 return rc ? rc : count; 1189 } 1190 static DEVICE_ATTR_WO(rescan); 1191 #endif /* CONFIG_HOTPLUG_CPU */ 1192 1193 static int __init s390_smp_init(void) 1194 { 1195 int cpu, rc = 0; 1196 1197 #ifdef CONFIG_HOTPLUG_CPU 1198 rc = device_create_file(cpu_subsys.dev_root, &dev_attr_rescan); 1199 if (rc) 1200 return rc; 1201 #endif 1202 for_each_present_cpu(cpu) { 1203 rc = smp_add_present_cpu(cpu); 1204 if (rc) 1205 goto out; 1206 } 1207 1208 rc = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "s390/smp:online", 1209 smp_cpu_online, smp_cpu_pre_down); 1210 rc = rc <= 0 ? rc : 0; 1211 out: 1212 return rc; 1213 } 1214 subsys_initcall(s390_smp_init); 1215