1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * SMP related functions 4 * 5 * Copyright IBM Corp. 1999, 2012 6 * Author(s): Denis Joseph Barrow, 7 * Martin Schwidefsky <schwidefsky@de.ibm.com>, 8 * Heiko Carstens <heiko.carstens@de.ibm.com>, 9 * 10 * based on other smp stuff by 11 * (c) 1995 Alan Cox, CymruNET Ltd <alan@cymru.net> 12 * (c) 1998 Ingo Molnar 13 * 14 * The code outside of smp.c uses logical cpu numbers, only smp.c does 15 * the translation of logical to physical cpu ids. All new code that 16 * operates on physical cpu numbers needs to go into smp.c. 17 */ 18 19 #define KMSG_COMPONENT "cpu" 20 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt 21 22 #include <linux/workqueue.h> 23 #include <linux/bootmem.h> 24 #include <linux/export.h> 25 #include <linux/init.h> 26 #include <linux/mm.h> 27 #include <linux/err.h> 28 #include <linux/spinlock.h> 29 #include <linux/kernel_stat.h> 30 #include <linux/delay.h> 31 #include <linux/interrupt.h> 32 #include <linux/irqflags.h> 33 #include <linux/cpu.h> 34 #include <linux/slab.h> 35 #include <linux/sched/hotplug.h> 36 #include <linux/sched/task_stack.h> 37 #include <linux/crash_dump.h> 38 #include <linux/memblock.h> 39 #include <linux/kprobes.h> 40 #include <asm/asm-offsets.h> 41 #include <asm/diag.h> 42 #include <asm/switch_to.h> 43 #include <asm/facility.h> 44 #include <asm/ipl.h> 45 #include <asm/setup.h> 46 #include <asm/irq.h> 47 #include <asm/tlbflush.h> 48 #include <asm/vtimer.h> 49 #include <asm/lowcore.h> 50 #include <asm/sclp.h> 51 #include <asm/vdso.h> 52 #include <asm/debug.h> 53 #include <asm/os_info.h> 54 #include <asm/sigp.h> 55 #include <asm/idle.h> 56 #include <asm/nmi.h> 57 #include <asm/topology.h> 58 #include "entry.h" 59 60 enum { 61 ec_schedule = 0, 62 ec_call_function_single, 63 ec_stop_cpu, 64 }; 65 66 enum { 67 CPU_STATE_STANDBY, 68 CPU_STATE_CONFIGURED, 69 }; 70 71 static DEFINE_PER_CPU(struct cpu *, cpu_device); 72 73 struct pcpu { 74 struct lowcore *lowcore; /* lowcore page(s) for the cpu */ 75 unsigned long ec_mask; /* bit mask for ec_xxx functions */ 76 unsigned long ec_clk; /* sigp timestamp for ec_xxx */ 77 signed char state; /* physical cpu state */ 78 signed char polarization; /* physical polarization */ 79 u16 address; /* physical cpu address */ 80 }; 81 82 static u8 boot_core_type; 83 static struct pcpu pcpu_devices[NR_CPUS]; 84 85 unsigned int smp_cpu_mt_shift; 86 EXPORT_SYMBOL(smp_cpu_mt_shift); 87 88 unsigned int smp_cpu_mtid; 89 EXPORT_SYMBOL(smp_cpu_mtid); 90 91 #ifdef CONFIG_CRASH_DUMP 92 __vector128 __initdata boot_cpu_vector_save_area[__NUM_VXRS]; 93 #endif 94 95 static unsigned int smp_max_threads __initdata = -1U; 96 97 static int __init early_nosmt(char *s) 98 { 99 smp_max_threads = 1; 100 return 0; 101 } 102 early_param("nosmt", early_nosmt); 103 104 static int __init early_smt(char *s) 105 { 106 get_option(&s, &smp_max_threads); 107 return 0; 108 } 109 early_param("smt", early_smt); 110 111 /* 112 * The smp_cpu_state_mutex must be held when changing the state or polarization 113 * member of a pcpu data structure within the pcpu_devices arreay. 114 */ 115 DEFINE_MUTEX(smp_cpu_state_mutex); 116 117 /* 118 * Signal processor helper functions. 119 */ 120 static inline int __pcpu_sigp_relax(u16 addr, u8 order, unsigned long parm) 121 { 122 int cc; 123 124 while (1) { 125 cc = __pcpu_sigp(addr, order, parm, NULL); 126 if (cc != SIGP_CC_BUSY) 127 return cc; 128 cpu_relax(); 129 } 130 } 131 132 static int pcpu_sigp_retry(struct pcpu *pcpu, u8 order, u32 parm) 133 { 134 int cc, retry; 135 136 for (retry = 0; ; retry++) { 137 cc = __pcpu_sigp(pcpu->address, order, parm, NULL); 138 if (cc != SIGP_CC_BUSY) 139 break; 140 if (retry >= 3) 141 udelay(10); 142 } 143 return cc; 144 } 145 146 static inline int pcpu_stopped(struct pcpu *pcpu) 147 { 148 u32 uninitialized_var(status); 149 150 if (__pcpu_sigp(pcpu->address, SIGP_SENSE, 151 0, &status) != SIGP_CC_STATUS_STORED) 152 return 0; 153 return !!(status & (SIGP_STATUS_CHECK_STOP|SIGP_STATUS_STOPPED)); 154 } 155 156 static inline int pcpu_running(struct pcpu *pcpu) 157 { 158 if (__pcpu_sigp(pcpu->address, SIGP_SENSE_RUNNING, 159 0, NULL) != SIGP_CC_STATUS_STORED) 160 return 1; 161 /* Status stored condition code is equivalent to cpu not running. */ 162 return 0; 163 } 164 165 /* 166 * Find struct pcpu by cpu address. 167 */ 168 static struct pcpu *pcpu_find_address(const struct cpumask *mask, u16 address) 169 { 170 int cpu; 171 172 for_each_cpu(cpu, mask) 173 if (pcpu_devices[cpu].address == address) 174 return pcpu_devices + cpu; 175 return NULL; 176 } 177 178 static void pcpu_ec_call(struct pcpu *pcpu, int ec_bit) 179 { 180 int order; 181 182 if (test_and_set_bit(ec_bit, &pcpu->ec_mask)) 183 return; 184 order = pcpu_running(pcpu) ? SIGP_EXTERNAL_CALL : SIGP_EMERGENCY_SIGNAL; 185 pcpu->ec_clk = get_tod_clock_fast(); 186 pcpu_sigp_retry(pcpu, order, 0); 187 } 188 189 static int pcpu_alloc_lowcore(struct pcpu *pcpu, int cpu) 190 { 191 unsigned long async_stack, nodat_stack; 192 struct lowcore *lc; 193 194 if (pcpu != &pcpu_devices[0]) { 195 pcpu->lowcore = (struct lowcore *) 196 __get_free_pages(GFP_KERNEL | GFP_DMA, LC_ORDER); 197 nodat_stack = __get_free_pages(GFP_KERNEL, THREAD_SIZE_ORDER); 198 if (!pcpu->lowcore || !nodat_stack) 199 goto out; 200 } else { 201 nodat_stack = pcpu->lowcore->nodat_stack - STACK_INIT_OFFSET; 202 } 203 async_stack = stack_alloc(); 204 if (!async_stack) 205 goto out; 206 lc = pcpu->lowcore; 207 memcpy(lc, &S390_lowcore, 512); 208 memset((char *) lc + 512, 0, sizeof(*lc) - 512); 209 lc->async_stack = async_stack + STACK_INIT_OFFSET; 210 lc->nodat_stack = nodat_stack + STACK_INIT_OFFSET; 211 lc->cpu_nr = cpu; 212 lc->spinlock_lockval = arch_spin_lockval(cpu); 213 lc->spinlock_index = 0; 214 lc->br_r1_trampoline = 0x07f1; /* br %r1 */ 215 if (nmi_alloc_per_cpu(lc)) 216 goto out_async; 217 if (vdso_alloc_per_cpu(lc)) 218 goto out_mcesa; 219 lowcore_ptr[cpu] = lc; 220 pcpu_sigp_retry(pcpu, SIGP_SET_PREFIX, (u32)(unsigned long) lc); 221 return 0; 222 223 out_mcesa: 224 nmi_free_per_cpu(lc); 225 out_async: 226 stack_free(async_stack); 227 out: 228 if (pcpu != &pcpu_devices[0]) { 229 free_pages(nodat_stack, THREAD_SIZE_ORDER); 230 free_pages((unsigned long) pcpu->lowcore, LC_ORDER); 231 } 232 return -ENOMEM; 233 } 234 235 #ifdef CONFIG_HOTPLUG_CPU 236 237 static void pcpu_free_lowcore(struct pcpu *pcpu) 238 { 239 unsigned long async_stack, nodat_stack, lowcore; 240 241 nodat_stack = pcpu->lowcore->nodat_stack - STACK_INIT_OFFSET; 242 async_stack = pcpu->lowcore->async_stack - STACK_INIT_OFFSET; 243 lowcore = (unsigned long) pcpu->lowcore; 244 245 pcpu_sigp_retry(pcpu, SIGP_SET_PREFIX, 0); 246 lowcore_ptr[pcpu - pcpu_devices] = NULL; 247 vdso_free_per_cpu(pcpu->lowcore); 248 nmi_free_per_cpu(pcpu->lowcore); 249 stack_free(async_stack); 250 if (pcpu == &pcpu_devices[0]) 251 return; 252 free_pages(nodat_stack, THREAD_SIZE_ORDER); 253 free_pages(lowcore, LC_ORDER); 254 } 255 256 #endif /* CONFIG_HOTPLUG_CPU */ 257 258 static void pcpu_prepare_secondary(struct pcpu *pcpu, int cpu) 259 { 260 struct lowcore *lc = pcpu->lowcore; 261 262 cpumask_set_cpu(cpu, &init_mm.context.cpu_attach_mask); 263 cpumask_set_cpu(cpu, mm_cpumask(&init_mm)); 264 lc->cpu_nr = cpu; 265 lc->spinlock_lockval = arch_spin_lockval(cpu); 266 lc->spinlock_index = 0; 267 lc->percpu_offset = __per_cpu_offset[cpu]; 268 lc->kernel_asce = S390_lowcore.kernel_asce; 269 lc->machine_flags = S390_lowcore.machine_flags; 270 lc->user_timer = lc->system_timer = lc->steal_timer = 0; 271 __ctl_store(lc->cregs_save_area, 0, 15); 272 save_access_regs((unsigned int *) lc->access_regs_save_area); 273 memcpy(lc->stfle_fac_list, S390_lowcore.stfle_fac_list, 274 sizeof(lc->stfle_fac_list)); 275 memcpy(lc->alt_stfle_fac_list, S390_lowcore.alt_stfle_fac_list, 276 sizeof(lc->alt_stfle_fac_list)); 277 arch_spin_lock_setup(cpu); 278 } 279 280 static void pcpu_attach_task(struct pcpu *pcpu, struct task_struct *tsk) 281 { 282 struct lowcore *lc = pcpu->lowcore; 283 284 lc->kernel_stack = (unsigned long) task_stack_page(tsk) 285 + THREAD_SIZE - STACK_FRAME_OVERHEAD - sizeof(struct pt_regs); 286 lc->current_task = (unsigned long) tsk; 287 lc->lpp = LPP_MAGIC; 288 lc->current_pid = tsk->pid; 289 lc->user_timer = tsk->thread.user_timer; 290 lc->guest_timer = tsk->thread.guest_timer; 291 lc->system_timer = tsk->thread.system_timer; 292 lc->hardirq_timer = tsk->thread.hardirq_timer; 293 lc->softirq_timer = tsk->thread.softirq_timer; 294 lc->steal_timer = 0; 295 } 296 297 static void pcpu_start_fn(struct pcpu *pcpu, void (*func)(void *), void *data) 298 { 299 struct lowcore *lc = pcpu->lowcore; 300 301 lc->restart_stack = lc->nodat_stack; 302 lc->restart_fn = (unsigned long) func; 303 lc->restart_data = (unsigned long) data; 304 lc->restart_source = -1UL; 305 pcpu_sigp_retry(pcpu, SIGP_RESTART, 0); 306 } 307 308 /* 309 * Call function via PSW restart on pcpu and stop the current cpu. 310 */ 311 static void __pcpu_delegate(void (*func)(void*), void *data) 312 { 313 func(data); /* should not return */ 314 } 315 316 static void __no_sanitize_address pcpu_delegate(struct pcpu *pcpu, 317 void (*func)(void *), 318 void *data, unsigned long stack) 319 { 320 struct lowcore *lc = lowcore_ptr[pcpu - pcpu_devices]; 321 unsigned long source_cpu = stap(); 322 323 __load_psw_mask(PSW_KERNEL_BITS | PSW_MASK_DAT); 324 if (pcpu->address == source_cpu) 325 CALL_ON_STACK(__pcpu_delegate, stack, 2, func, data); 326 /* Stop target cpu (if func returns this stops the current cpu). */ 327 pcpu_sigp_retry(pcpu, SIGP_STOP, 0); 328 /* Restart func on the target cpu and stop the current cpu. */ 329 mem_assign_absolute(lc->restart_stack, stack); 330 mem_assign_absolute(lc->restart_fn, (unsigned long) func); 331 mem_assign_absolute(lc->restart_data, (unsigned long) data); 332 mem_assign_absolute(lc->restart_source, source_cpu); 333 __bpon(); 334 asm volatile( 335 "0: sigp 0,%0,%2 # sigp restart to target cpu\n" 336 " brc 2,0b # busy, try again\n" 337 "1: sigp 0,%1,%3 # sigp stop to current cpu\n" 338 " brc 2,1b # busy, try again\n" 339 : : "d" (pcpu->address), "d" (source_cpu), 340 "K" (SIGP_RESTART), "K" (SIGP_STOP) 341 : "0", "1", "cc"); 342 for (;;) ; 343 } 344 345 /* 346 * Enable additional logical cpus for multi-threading. 347 */ 348 static int pcpu_set_smt(unsigned int mtid) 349 { 350 int cc; 351 352 if (smp_cpu_mtid == mtid) 353 return 0; 354 cc = __pcpu_sigp(0, SIGP_SET_MULTI_THREADING, mtid, NULL); 355 if (cc == 0) { 356 smp_cpu_mtid = mtid; 357 smp_cpu_mt_shift = 0; 358 while (smp_cpu_mtid >= (1U << smp_cpu_mt_shift)) 359 smp_cpu_mt_shift++; 360 pcpu_devices[0].address = stap(); 361 } 362 return cc; 363 } 364 365 /* 366 * Call function on an online CPU. 367 */ 368 void smp_call_online_cpu(void (*func)(void *), void *data) 369 { 370 struct pcpu *pcpu; 371 372 /* Use the current cpu if it is online. */ 373 pcpu = pcpu_find_address(cpu_online_mask, stap()); 374 if (!pcpu) 375 /* Use the first online cpu. */ 376 pcpu = pcpu_devices + cpumask_first(cpu_online_mask); 377 pcpu_delegate(pcpu, func, data, (unsigned long) restart_stack); 378 } 379 380 /* 381 * Call function on the ipl CPU. 382 */ 383 void smp_call_ipl_cpu(void (*func)(void *), void *data) 384 { 385 pcpu_delegate(&pcpu_devices[0], func, data, 386 pcpu_devices->lowcore->nodat_stack); 387 } 388 389 int smp_find_processor_id(u16 address) 390 { 391 int cpu; 392 393 for_each_present_cpu(cpu) 394 if (pcpu_devices[cpu].address == address) 395 return cpu; 396 return -1; 397 } 398 399 bool arch_vcpu_is_preempted(int cpu) 400 { 401 if (test_cpu_flag_of(CIF_ENABLED_WAIT, cpu)) 402 return false; 403 if (pcpu_running(pcpu_devices + cpu)) 404 return false; 405 return true; 406 } 407 EXPORT_SYMBOL(arch_vcpu_is_preempted); 408 409 void smp_yield_cpu(int cpu) 410 { 411 if (MACHINE_HAS_DIAG9C) { 412 diag_stat_inc_norecursion(DIAG_STAT_X09C); 413 asm volatile("diag %0,0,0x9c" 414 : : "d" (pcpu_devices[cpu].address)); 415 } else if (MACHINE_HAS_DIAG44) { 416 diag_stat_inc_norecursion(DIAG_STAT_X044); 417 asm volatile("diag 0,0,0x44"); 418 } 419 } 420 421 /* 422 * Send cpus emergency shutdown signal. This gives the cpus the 423 * opportunity to complete outstanding interrupts. 424 */ 425 void notrace smp_emergency_stop(void) 426 { 427 cpumask_t cpumask; 428 u64 end; 429 int cpu; 430 431 cpumask_copy(&cpumask, cpu_online_mask); 432 cpumask_clear_cpu(smp_processor_id(), &cpumask); 433 434 end = get_tod_clock() + (1000000UL << 12); 435 for_each_cpu(cpu, &cpumask) { 436 struct pcpu *pcpu = pcpu_devices + cpu; 437 set_bit(ec_stop_cpu, &pcpu->ec_mask); 438 while (__pcpu_sigp(pcpu->address, SIGP_EMERGENCY_SIGNAL, 439 0, NULL) == SIGP_CC_BUSY && 440 get_tod_clock() < end) 441 cpu_relax(); 442 } 443 while (get_tod_clock() < end) { 444 for_each_cpu(cpu, &cpumask) 445 if (pcpu_stopped(pcpu_devices + cpu)) 446 cpumask_clear_cpu(cpu, &cpumask); 447 if (cpumask_empty(&cpumask)) 448 break; 449 cpu_relax(); 450 } 451 } 452 NOKPROBE_SYMBOL(smp_emergency_stop); 453 454 /* 455 * Stop all cpus but the current one. 456 */ 457 void smp_send_stop(void) 458 { 459 int cpu; 460 461 /* Disable all interrupts/machine checks */ 462 __load_psw_mask(PSW_KERNEL_BITS | PSW_MASK_DAT); 463 trace_hardirqs_off(); 464 465 debug_set_critical(); 466 467 if (oops_in_progress) 468 smp_emergency_stop(); 469 470 /* stop all processors */ 471 for_each_online_cpu(cpu) { 472 if (cpu == smp_processor_id()) 473 continue; 474 pcpu_sigp_retry(pcpu_devices + cpu, SIGP_STOP, 0); 475 while (!pcpu_stopped(pcpu_devices + cpu)) 476 cpu_relax(); 477 } 478 } 479 480 /* 481 * This is the main routine where commands issued by other 482 * cpus are handled. 483 */ 484 static void smp_handle_ext_call(void) 485 { 486 unsigned long bits; 487 488 /* handle bit signal external calls */ 489 bits = xchg(&pcpu_devices[smp_processor_id()].ec_mask, 0); 490 if (test_bit(ec_stop_cpu, &bits)) 491 smp_stop_cpu(); 492 if (test_bit(ec_schedule, &bits)) 493 scheduler_ipi(); 494 if (test_bit(ec_call_function_single, &bits)) 495 generic_smp_call_function_single_interrupt(); 496 } 497 498 static void do_ext_call_interrupt(struct ext_code ext_code, 499 unsigned int param32, unsigned long param64) 500 { 501 inc_irq_stat(ext_code.code == 0x1202 ? IRQEXT_EXC : IRQEXT_EMS); 502 smp_handle_ext_call(); 503 } 504 505 void arch_send_call_function_ipi_mask(const struct cpumask *mask) 506 { 507 int cpu; 508 509 for_each_cpu(cpu, mask) 510 pcpu_ec_call(pcpu_devices + cpu, ec_call_function_single); 511 } 512 513 void arch_send_call_function_single_ipi(int cpu) 514 { 515 pcpu_ec_call(pcpu_devices + cpu, ec_call_function_single); 516 } 517 518 /* 519 * this function sends a 'reschedule' IPI to another CPU. 520 * it goes straight through and wastes no time serializing 521 * anything. Worst case is that we lose a reschedule ... 522 */ 523 void smp_send_reschedule(int cpu) 524 { 525 pcpu_ec_call(pcpu_devices + cpu, ec_schedule); 526 } 527 528 /* 529 * parameter area for the set/clear control bit callbacks 530 */ 531 struct ec_creg_mask_parms { 532 unsigned long orval; 533 unsigned long andval; 534 int cr; 535 }; 536 537 /* 538 * callback for setting/clearing control bits 539 */ 540 static void smp_ctl_bit_callback(void *info) 541 { 542 struct ec_creg_mask_parms *pp = info; 543 unsigned long cregs[16]; 544 545 __ctl_store(cregs, 0, 15); 546 cregs[pp->cr] = (cregs[pp->cr] & pp->andval) | pp->orval; 547 __ctl_load(cregs, 0, 15); 548 } 549 550 /* 551 * Set a bit in a control register of all cpus 552 */ 553 void smp_ctl_set_bit(int cr, int bit) 554 { 555 struct ec_creg_mask_parms parms = { 1UL << bit, -1UL, cr }; 556 557 on_each_cpu(smp_ctl_bit_callback, &parms, 1); 558 } 559 EXPORT_SYMBOL(smp_ctl_set_bit); 560 561 /* 562 * Clear a bit in a control register of all cpus 563 */ 564 void smp_ctl_clear_bit(int cr, int bit) 565 { 566 struct ec_creg_mask_parms parms = { 0, ~(1UL << bit), cr }; 567 568 on_each_cpu(smp_ctl_bit_callback, &parms, 1); 569 } 570 EXPORT_SYMBOL(smp_ctl_clear_bit); 571 572 #ifdef CONFIG_CRASH_DUMP 573 574 int smp_store_status(int cpu) 575 { 576 struct pcpu *pcpu = pcpu_devices + cpu; 577 unsigned long pa; 578 579 pa = __pa(&pcpu->lowcore->floating_pt_save_area); 580 if (__pcpu_sigp_relax(pcpu->address, SIGP_STORE_STATUS_AT_ADDRESS, 581 pa) != SIGP_CC_ORDER_CODE_ACCEPTED) 582 return -EIO; 583 if (!MACHINE_HAS_VX && !MACHINE_HAS_GS) 584 return 0; 585 pa = __pa(pcpu->lowcore->mcesad & MCESA_ORIGIN_MASK); 586 if (MACHINE_HAS_GS) 587 pa |= pcpu->lowcore->mcesad & MCESA_LC_MASK; 588 if (__pcpu_sigp_relax(pcpu->address, SIGP_STORE_ADDITIONAL_STATUS, 589 pa) != SIGP_CC_ORDER_CODE_ACCEPTED) 590 return -EIO; 591 return 0; 592 } 593 594 /* 595 * Collect CPU state of the previous, crashed system. 596 * There are four cases: 597 * 1) standard zfcp dump 598 * condition: OLDMEM_BASE == NULL && ipl_info.type == IPL_TYPE_FCP_DUMP 599 * The state for all CPUs except the boot CPU needs to be collected 600 * with sigp stop-and-store-status. The boot CPU state is located in 601 * the absolute lowcore of the memory stored in the HSA. The zcore code 602 * will copy the boot CPU state from the HSA. 603 * 2) stand-alone kdump for SCSI (zfcp dump with swapped memory) 604 * condition: OLDMEM_BASE != NULL && ipl_info.type == IPL_TYPE_FCP_DUMP 605 * The state for all CPUs except the boot CPU needs to be collected 606 * with sigp stop-and-store-status. The firmware or the boot-loader 607 * stored the registers of the boot CPU in the absolute lowcore in the 608 * memory of the old system. 609 * 3) kdump and the old kernel did not store the CPU state, 610 * or stand-alone kdump for DASD 611 * condition: OLDMEM_BASE != NULL && !is_kdump_kernel() 612 * The state for all CPUs except the boot CPU needs to be collected 613 * with sigp stop-and-store-status. The kexec code or the boot-loader 614 * stored the registers of the boot CPU in the memory of the old system. 615 * 4) kdump and the old kernel stored the CPU state 616 * condition: OLDMEM_BASE != NULL && is_kdump_kernel() 617 * This case does not exist for s390 anymore, setup_arch explicitly 618 * deactivates the elfcorehdr= kernel parameter 619 */ 620 static __init void smp_save_cpu_vxrs(struct save_area *sa, u16 addr, 621 bool is_boot_cpu, unsigned long page) 622 { 623 __vector128 *vxrs = (__vector128 *) page; 624 625 if (is_boot_cpu) 626 vxrs = boot_cpu_vector_save_area; 627 else 628 __pcpu_sigp_relax(addr, SIGP_STORE_ADDITIONAL_STATUS, page); 629 save_area_add_vxrs(sa, vxrs); 630 } 631 632 static __init void smp_save_cpu_regs(struct save_area *sa, u16 addr, 633 bool is_boot_cpu, unsigned long page) 634 { 635 void *regs = (void *) page; 636 637 if (is_boot_cpu) 638 copy_oldmem_kernel(regs, (void *) __LC_FPREGS_SAVE_AREA, 512); 639 else 640 __pcpu_sigp_relax(addr, SIGP_STORE_STATUS_AT_ADDRESS, page); 641 save_area_add_regs(sa, regs); 642 } 643 644 void __init smp_save_dump_cpus(void) 645 { 646 int addr, boot_cpu_addr, max_cpu_addr; 647 struct save_area *sa; 648 unsigned long page; 649 bool is_boot_cpu; 650 651 if (!(OLDMEM_BASE || ipl_info.type == IPL_TYPE_FCP_DUMP)) 652 /* No previous system present, normal boot. */ 653 return; 654 /* Allocate a page as dumping area for the store status sigps */ 655 page = memblock_alloc_base(PAGE_SIZE, PAGE_SIZE, 1UL << 31); 656 /* Set multi-threading state to the previous system. */ 657 pcpu_set_smt(sclp.mtid_prev); 658 boot_cpu_addr = stap(); 659 max_cpu_addr = SCLP_MAX_CORES << sclp.mtid_prev; 660 for (addr = 0; addr <= max_cpu_addr; addr++) { 661 if (__pcpu_sigp_relax(addr, SIGP_SENSE, 0) == 662 SIGP_CC_NOT_OPERATIONAL) 663 continue; 664 is_boot_cpu = (addr == boot_cpu_addr); 665 /* Allocate save area */ 666 sa = save_area_alloc(is_boot_cpu); 667 if (!sa) 668 panic("could not allocate memory for save area\n"); 669 if (MACHINE_HAS_VX) 670 /* Get the vector registers */ 671 smp_save_cpu_vxrs(sa, addr, is_boot_cpu, page); 672 /* 673 * For a zfcp dump OLDMEM_BASE == NULL and the registers 674 * of the boot CPU are stored in the HSA. To retrieve 675 * these registers an SCLP request is required which is 676 * done by drivers/s390/char/zcore.c:init_cpu_info() 677 */ 678 if (!is_boot_cpu || OLDMEM_BASE) 679 /* Get the CPU registers */ 680 smp_save_cpu_regs(sa, addr, is_boot_cpu, page); 681 } 682 memblock_free(page, PAGE_SIZE); 683 diag308_reset(); 684 pcpu_set_smt(0); 685 } 686 #endif /* CONFIG_CRASH_DUMP */ 687 688 void smp_cpu_set_polarization(int cpu, int val) 689 { 690 pcpu_devices[cpu].polarization = val; 691 } 692 693 int smp_cpu_get_polarization(int cpu) 694 { 695 return pcpu_devices[cpu].polarization; 696 } 697 698 static void __ref smp_get_core_info(struct sclp_core_info *info, int early) 699 { 700 static int use_sigp_detection; 701 int address; 702 703 if (use_sigp_detection || sclp_get_core_info(info, early)) { 704 use_sigp_detection = 1; 705 for (address = 0; 706 address < (SCLP_MAX_CORES << smp_cpu_mt_shift); 707 address += (1U << smp_cpu_mt_shift)) { 708 if (__pcpu_sigp_relax(address, SIGP_SENSE, 0) == 709 SIGP_CC_NOT_OPERATIONAL) 710 continue; 711 info->core[info->configured].core_id = 712 address >> smp_cpu_mt_shift; 713 info->configured++; 714 } 715 info->combined = info->configured; 716 } 717 } 718 719 static int smp_add_present_cpu(int cpu); 720 721 static int __smp_rescan_cpus(struct sclp_core_info *info, int sysfs_add) 722 { 723 struct pcpu *pcpu; 724 cpumask_t avail; 725 int cpu, nr, i, j; 726 u16 address; 727 728 nr = 0; 729 cpumask_xor(&avail, cpu_possible_mask, cpu_present_mask); 730 cpu = cpumask_first(&avail); 731 for (i = 0; (i < info->combined) && (cpu < nr_cpu_ids); i++) { 732 if (sclp.has_core_type && info->core[i].type != boot_core_type) 733 continue; 734 address = info->core[i].core_id << smp_cpu_mt_shift; 735 for (j = 0; j <= smp_cpu_mtid; j++) { 736 if (pcpu_find_address(cpu_present_mask, address + j)) 737 continue; 738 pcpu = pcpu_devices + cpu; 739 pcpu->address = address + j; 740 pcpu->state = 741 (cpu >= info->configured*(smp_cpu_mtid + 1)) ? 742 CPU_STATE_STANDBY : CPU_STATE_CONFIGURED; 743 smp_cpu_set_polarization(cpu, POLARIZATION_UNKNOWN); 744 set_cpu_present(cpu, true); 745 if (sysfs_add && smp_add_present_cpu(cpu) != 0) 746 set_cpu_present(cpu, false); 747 else 748 nr++; 749 cpu = cpumask_next(cpu, &avail); 750 if (cpu >= nr_cpu_ids) 751 break; 752 } 753 } 754 return nr; 755 } 756 757 void __init smp_detect_cpus(void) 758 { 759 unsigned int cpu, mtid, c_cpus, s_cpus; 760 struct sclp_core_info *info; 761 u16 address; 762 763 /* Get CPU information */ 764 info = memblock_virt_alloc(sizeof(*info), 8); 765 smp_get_core_info(info, 1); 766 /* Find boot CPU type */ 767 if (sclp.has_core_type) { 768 address = stap(); 769 for (cpu = 0; cpu < info->combined; cpu++) 770 if (info->core[cpu].core_id == address) { 771 /* The boot cpu dictates the cpu type. */ 772 boot_core_type = info->core[cpu].type; 773 break; 774 } 775 if (cpu >= info->combined) 776 panic("Could not find boot CPU type"); 777 } 778 779 /* Set multi-threading state for the current system */ 780 mtid = boot_core_type ? sclp.mtid : sclp.mtid_cp; 781 mtid = (mtid < smp_max_threads) ? mtid : smp_max_threads - 1; 782 pcpu_set_smt(mtid); 783 784 /* Print number of CPUs */ 785 c_cpus = s_cpus = 0; 786 for (cpu = 0; cpu < info->combined; cpu++) { 787 if (sclp.has_core_type && 788 info->core[cpu].type != boot_core_type) 789 continue; 790 if (cpu < info->configured) 791 c_cpus += smp_cpu_mtid + 1; 792 else 793 s_cpus += smp_cpu_mtid + 1; 794 } 795 pr_info("%d configured CPUs, %d standby CPUs\n", c_cpus, s_cpus); 796 797 /* Add CPUs present at boot */ 798 get_online_cpus(); 799 __smp_rescan_cpus(info, 0); 800 put_online_cpus(); 801 memblock_free_early((unsigned long)info, sizeof(*info)); 802 } 803 804 static void smp_init_secondary(void) 805 { 806 int cpu = smp_processor_id(); 807 808 S390_lowcore.last_update_clock = get_tod_clock(); 809 restore_access_regs(S390_lowcore.access_regs_save_area); 810 cpu_init(); 811 preempt_disable(); 812 init_cpu_timer(); 813 vtime_init(); 814 pfault_init(); 815 notify_cpu_starting(smp_processor_id()); 816 if (topology_cpu_dedicated(cpu)) 817 set_cpu_flag(CIF_DEDICATED_CPU); 818 else 819 clear_cpu_flag(CIF_DEDICATED_CPU); 820 set_cpu_online(smp_processor_id(), true); 821 inc_irq_stat(CPU_RST); 822 local_irq_enable(); 823 cpu_startup_entry(CPUHP_AP_ONLINE_IDLE); 824 } 825 826 /* 827 * Activate a secondary processor. 828 */ 829 static void __no_sanitize_address smp_start_secondary(void *cpuvoid) 830 { 831 S390_lowcore.restart_stack = (unsigned long) restart_stack; 832 S390_lowcore.restart_fn = (unsigned long) do_restart; 833 S390_lowcore.restart_data = 0; 834 S390_lowcore.restart_source = -1UL; 835 __ctl_load(S390_lowcore.cregs_save_area, 0, 15); 836 __load_psw_mask(PSW_KERNEL_BITS | PSW_MASK_DAT); 837 CALL_ON_STACK(smp_init_secondary, S390_lowcore.kernel_stack, 0); 838 } 839 840 /* Upping and downing of CPUs */ 841 int __cpu_up(unsigned int cpu, struct task_struct *tidle) 842 { 843 struct pcpu *pcpu; 844 int base, i, rc; 845 846 pcpu = pcpu_devices + cpu; 847 if (pcpu->state != CPU_STATE_CONFIGURED) 848 return -EIO; 849 base = smp_get_base_cpu(cpu); 850 for (i = 0; i <= smp_cpu_mtid; i++) { 851 if (base + i < nr_cpu_ids) 852 if (cpu_online(base + i)) 853 break; 854 } 855 /* 856 * If this is the first CPU of the core to get online 857 * do an initial CPU reset. 858 */ 859 if (i > smp_cpu_mtid && 860 pcpu_sigp_retry(pcpu_devices + base, SIGP_INITIAL_CPU_RESET, 0) != 861 SIGP_CC_ORDER_CODE_ACCEPTED) 862 return -EIO; 863 864 rc = pcpu_alloc_lowcore(pcpu, cpu); 865 if (rc) 866 return rc; 867 pcpu_prepare_secondary(pcpu, cpu); 868 pcpu_attach_task(pcpu, tidle); 869 pcpu_start_fn(pcpu, smp_start_secondary, NULL); 870 /* Wait until cpu puts itself in the online & active maps */ 871 while (!cpu_online(cpu)) 872 cpu_relax(); 873 return 0; 874 } 875 876 static unsigned int setup_possible_cpus __initdata; 877 878 static int __init _setup_possible_cpus(char *s) 879 { 880 get_option(&s, &setup_possible_cpus); 881 return 0; 882 } 883 early_param("possible_cpus", _setup_possible_cpus); 884 885 #ifdef CONFIG_HOTPLUG_CPU 886 887 int __cpu_disable(void) 888 { 889 unsigned long cregs[16]; 890 891 /* Handle possible pending IPIs */ 892 smp_handle_ext_call(); 893 set_cpu_online(smp_processor_id(), false); 894 /* Disable pseudo page faults on this cpu. */ 895 pfault_fini(); 896 /* Disable interrupt sources via control register. */ 897 __ctl_store(cregs, 0, 15); 898 cregs[0] &= ~0x0000ee70UL; /* disable all external interrupts */ 899 cregs[6] &= ~0xff000000UL; /* disable all I/O interrupts */ 900 cregs[14] &= ~0x1f000000UL; /* disable most machine checks */ 901 __ctl_load(cregs, 0, 15); 902 clear_cpu_flag(CIF_NOHZ_DELAY); 903 return 0; 904 } 905 906 void __cpu_die(unsigned int cpu) 907 { 908 struct pcpu *pcpu; 909 910 /* Wait until target cpu is down */ 911 pcpu = pcpu_devices + cpu; 912 while (!pcpu_stopped(pcpu)) 913 cpu_relax(); 914 pcpu_free_lowcore(pcpu); 915 cpumask_clear_cpu(cpu, mm_cpumask(&init_mm)); 916 cpumask_clear_cpu(cpu, &init_mm.context.cpu_attach_mask); 917 } 918 919 void __noreturn cpu_die(void) 920 { 921 idle_task_exit(); 922 __bpon(); 923 pcpu_sigp_retry(pcpu_devices + smp_processor_id(), SIGP_STOP, 0); 924 for (;;) ; 925 } 926 927 #endif /* CONFIG_HOTPLUG_CPU */ 928 929 void __init smp_fill_possible_mask(void) 930 { 931 unsigned int possible, sclp_max, cpu; 932 933 sclp_max = max(sclp.mtid, sclp.mtid_cp) + 1; 934 sclp_max = min(smp_max_threads, sclp_max); 935 sclp_max = (sclp.max_cores * sclp_max) ?: nr_cpu_ids; 936 possible = setup_possible_cpus ?: nr_cpu_ids; 937 possible = min(possible, sclp_max); 938 for (cpu = 0; cpu < possible && cpu < nr_cpu_ids; cpu++) 939 set_cpu_possible(cpu, true); 940 } 941 942 void __init smp_prepare_cpus(unsigned int max_cpus) 943 { 944 /* request the 0x1201 emergency signal external interrupt */ 945 if (register_external_irq(EXT_IRQ_EMERGENCY_SIG, do_ext_call_interrupt)) 946 panic("Couldn't request external interrupt 0x1201"); 947 /* request the 0x1202 external call external interrupt */ 948 if (register_external_irq(EXT_IRQ_EXTERNAL_CALL, do_ext_call_interrupt)) 949 panic("Couldn't request external interrupt 0x1202"); 950 } 951 952 void __init smp_prepare_boot_cpu(void) 953 { 954 struct pcpu *pcpu = pcpu_devices; 955 956 WARN_ON(!cpu_present(0) || !cpu_online(0)); 957 pcpu->state = CPU_STATE_CONFIGURED; 958 pcpu->lowcore = (struct lowcore *)(unsigned long) store_prefix(); 959 S390_lowcore.percpu_offset = __per_cpu_offset[0]; 960 smp_cpu_set_polarization(0, POLARIZATION_UNKNOWN); 961 } 962 963 void __init smp_cpus_done(unsigned int max_cpus) 964 { 965 } 966 967 void __init smp_setup_processor_id(void) 968 { 969 pcpu_devices[0].address = stap(); 970 S390_lowcore.cpu_nr = 0; 971 S390_lowcore.spinlock_lockval = arch_spin_lockval(0); 972 S390_lowcore.spinlock_index = 0; 973 } 974 975 /* 976 * the frequency of the profiling timer can be changed 977 * by writing a multiplier value into /proc/profile. 978 * 979 * usually you want to run this on all CPUs ;) 980 */ 981 int setup_profiling_timer(unsigned int multiplier) 982 { 983 return 0; 984 } 985 986 #ifdef CONFIG_HOTPLUG_CPU 987 static ssize_t cpu_configure_show(struct device *dev, 988 struct device_attribute *attr, char *buf) 989 { 990 ssize_t count; 991 992 mutex_lock(&smp_cpu_state_mutex); 993 count = sprintf(buf, "%d\n", pcpu_devices[dev->id].state); 994 mutex_unlock(&smp_cpu_state_mutex); 995 return count; 996 } 997 998 static ssize_t cpu_configure_store(struct device *dev, 999 struct device_attribute *attr, 1000 const char *buf, size_t count) 1001 { 1002 struct pcpu *pcpu; 1003 int cpu, val, rc, i; 1004 char delim; 1005 1006 if (sscanf(buf, "%d %c", &val, &delim) != 1) 1007 return -EINVAL; 1008 if (val != 0 && val != 1) 1009 return -EINVAL; 1010 get_online_cpus(); 1011 mutex_lock(&smp_cpu_state_mutex); 1012 rc = -EBUSY; 1013 /* disallow configuration changes of online cpus and cpu 0 */ 1014 cpu = dev->id; 1015 cpu = smp_get_base_cpu(cpu); 1016 if (cpu == 0) 1017 goto out; 1018 for (i = 0; i <= smp_cpu_mtid; i++) 1019 if (cpu_online(cpu + i)) 1020 goto out; 1021 pcpu = pcpu_devices + cpu; 1022 rc = 0; 1023 switch (val) { 1024 case 0: 1025 if (pcpu->state != CPU_STATE_CONFIGURED) 1026 break; 1027 rc = sclp_core_deconfigure(pcpu->address >> smp_cpu_mt_shift); 1028 if (rc) 1029 break; 1030 for (i = 0; i <= smp_cpu_mtid; i++) { 1031 if (cpu + i >= nr_cpu_ids || !cpu_present(cpu + i)) 1032 continue; 1033 pcpu[i].state = CPU_STATE_STANDBY; 1034 smp_cpu_set_polarization(cpu + i, 1035 POLARIZATION_UNKNOWN); 1036 } 1037 topology_expect_change(); 1038 break; 1039 case 1: 1040 if (pcpu->state != CPU_STATE_STANDBY) 1041 break; 1042 rc = sclp_core_configure(pcpu->address >> smp_cpu_mt_shift); 1043 if (rc) 1044 break; 1045 for (i = 0; i <= smp_cpu_mtid; i++) { 1046 if (cpu + i >= nr_cpu_ids || !cpu_present(cpu + i)) 1047 continue; 1048 pcpu[i].state = CPU_STATE_CONFIGURED; 1049 smp_cpu_set_polarization(cpu + i, 1050 POLARIZATION_UNKNOWN); 1051 } 1052 topology_expect_change(); 1053 break; 1054 default: 1055 break; 1056 } 1057 out: 1058 mutex_unlock(&smp_cpu_state_mutex); 1059 put_online_cpus(); 1060 return rc ? rc : count; 1061 } 1062 static DEVICE_ATTR(configure, 0644, cpu_configure_show, cpu_configure_store); 1063 #endif /* CONFIG_HOTPLUG_CPU */ 1064 1065 static ssize_t show_cpu_address(struct device *dev, 1066 struct device_attribute *attr, char *buf) 1067 { 1068 return sprintf(buf, "%d\n", pcpu_devices[dev->id].address); 1069 } 1070 static DEVICE_ATTR(address, 0444, show_cpu_address, NULL); 1071 1072 static struct attribute *cpu_common_attrs[] = { 1073 #ifdef CONFIG_HOTPLUG_CPU 1074 &dev_attr_configure.attr, 1075 #endif 1076 &dev_attr_address.attr, 1077 NULL, 1078 }; 1079 1080 static struct attribute_group cpu_common_attr_group = { 1081 .attrs = cpu_common_attrs, 1082 }; 1083 1084 static struct attribute *cpu_online_attrs[] = { 1085 &dev_attr_idle_count.attr, 1086 &dev_attr_idle_time_us.attr, 1087 NULL, 1088 }; 1089 1090 static struct attribute_group cpu_online_attr_group = { 1091 .attrs = cpu_online_attrs, 1092 }; 1093 1094 static int smp_cpu_online(unsigned int cpu) 1095 { 1096 struct device *s = &per_cpu(cpu_device, cpu)->dev; 1097 1098 return sysfs_create_group(&s->kobj, &cpu_online_attr_group); 1099 } 1100 static int smp_cpu_pre_down(unsigned int cpu) 1101 { 1102 struct device *s = &per_cpu(cpu_device, cpu)->dev; 1103 1104 sysfs_remove_group(&s->kobj, &cpu_online_attr_group); 1105 return 0; 1106 } 1107 1108 static int smp_add_present_cpu(int cpu) 1109 { 1110 struct device *s; 1111 struct cpu *c; 1112 int rc; 1113 1114 c = kzalloc(sizeof(*c), GFP_KERNEL); 1115 if (!c) 1116 return -ENOMEM; 1117 per_cpu(cpu_device, cpu) = c; 1118 s = &c->dev; 1119 c->hotpluggable = 1; 1120 rc = register_cpu(c, cpu); 1121 if (rc) 1122 goto out; 1123 rc = sysfs_create_group(&s->kobj, &cpu_common_attr_group); 1124 if (rc) 1125 goto out_cpu; 1126 rc = topology_cpu_init(c); 1127 if (rc) 1128 goto out_topology; 1129 return 0; 1130 1131 out_topology: 1132 sysfs_remove_group(&s->kobj, &cpu_common_attr_group); 1133 out_cpu: 1134 #ifdef CONFIG_HOTPLUG_CPU 1135 unregister_cpu(c); 1136 #endif 1137 out: 1138 return rc; 1139 } 1140 1141 #ifdef CONFIG_HOTPLUG_CPU 1142 1143 int __ref smp_rescan_cpus(void) 1144 { 1145 struct sclp_core_info *info; 1146 int nr; 1147 1148 info = kzalloc(sizeof(*info), GFP_KERNEL); 1149 if (!info) 1150 return -ENOMEM; 1151 smp_get_core_info(info, 0); 1152 get_online_cpus(); 1153 mutex_lock(&smp_cpu_state_mutex); 1154 nr = __smp_rescan_cpus(info, 1); 1155 mutex_unlock(&smp_cpu_state_mutex); 1156 put_online_cpus(); 1157 kfree(info); 1158 if (nr) 1159 topology_schedule_update(); 1160 return 0; 1161 } 1162 1163 static ssize_t __ref rescan_store(struct device *dev, 1164 struct device_attribute *attr, 1165 const char *buf, 1166 size_t count) 1167 { 1168 int rc; 1169 1170 rc = smp_rescan_cpus(); 1171 return rc ? rc : count; 1172 } 1173 static DEVICE_ATTR_WO(rescan); 1174 #endif /* CONFIG_HOTPLUG_CPU */ 1175 1176 static int __init s390_smp_init(void) 1177 { 1178 int cpu, rc = 0; 1179 1180 #ifdef CONFIG_HOTPLUG_CPU 1181 rc = device_create_file(cpu_subsys.dev_root, &dev_attr_rescan); 1182 if (rc) 1183 return rc; 1184 #endif 1185 for_each_present_cpu(cpu) { 1186 rc = smp_add_present_cpu(cpu); 1187 if (rc) 1188 goto out; 1189 } 1190 1191 rc = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "s390/smp:online", 1192 smp_cpu_online, smp_cpu_pre_down); 1193 rc = rc <= 0 ? rc : 0; 1194 out: 1195 return rc; 1196 } 1197 subsys_initcall(s390_smp_init); 1198