1f5daba1dSHeiko Carstens /* 2f5daba1dSHeiko Carstens * Machine check handler 3f5daba1dSHeiko Carstens * 4f5daba1dSHeiko Carstens * Copyright IBM Corp. 2000, 2009 5f5daba1dSHeiko Carstens * Author(s): Ingo Adlung <adlung@de.ibm.com>, 6f5daba1dSHeiko Carstens * Martin Schwidefsky <schwidefsky@de.ibm.com>, 7f5daba1dSHeiko Carstens * Cornelia Huck <cornelia.huck@de.ibm.com>, 8f5daba1dSHeiko Carstens * Heiko Carstens <heiko.carstens@de.ibm.com>, 9f5daba1dSHeiko Carstens */ 10f5daba1dSHeiko Carstens 11052ff461SHeiko Carstens #include <linux/kernel_stat.h> 12f5daba1dSHeiko Carstens #include <linux/init.h> 13f5daba1dSHeiko Carstens #include <linux/errno.h> 1481f64b87SHeiko Carstens #include <linux/hardirq.h> 15f5daba1dSHeiko Carstens #include <linux/time.h> 16f5daba1dSHeiko Carstens #include <linux/module.h> 17f5daba1dSHeiko Carstens #include <asm/lowcore.h> 18f5daba1dSHeiko Carstens #include <asm/smp.h> 19*fd5ada04SMartin Schwidefsky #include <asm/stp.h> 2076d4e00aSMartin Schwidefsky #include <asm/cputime.h> 21f5daba1dSHeiko Carstens #include <asm/nmi.h> 22f5daba1dSHeiko Carstens #include <asm/crw.h> 2380703617SMartin Schwidefsky #include <asm/switch_to.h> 24cad49cfcSHeiko Carstens #include <asm/ctl_reg.h> 25f5daba1dSHeiko Carstens 26f5daba1dSHeiko Carstens struct mcck_struct { 2736324963SHeiko Carstens unsigned int kill_task : 1; 2836324963SHeiko Carstens unsigned int channel_report : 1; 2936324963SHeiko Carstens unsigned int warning : 1; 3029b0a825SHeiko Carstens unsigned int stp_queue : 1; 31dc6e1555SHeiko Carstens unsigned long mcck_code; 32f5daba1dSHeiko Carstens }; 33f5daba1dSHeiko Carstens 34f5daba1dSHeiko Carstens static DEFINE_PER_CPU(struct mcck_struct, cpu_mcck); 35f5daba1dSHeiko Carstens 363d68286aSHeiko Carstens static void s390_handle_damage(void) 37f5daba1dSHeiko Carstens { 38f5daba1dSHeiko Carstens smp_send_stop(); 39f5daba1dSHeiko Carstens disabled_wait((unsigned long) __builtin_return_address(0)); 40f5daba1dSHeiko Carstens while (1); 41f5daba1dSHeiko Carstens } 42f5daba1dSHeiko Carstens 43f5daba1dSHeiko Carstens /* 44f5daba1dSHeiko Carstens * Main machine check handler function. Will be called with interrupts enabled 45f5daba1dSHeiko Carstens * or disabled and machine checks enabled or disabled. 46f5daba1dSHeiko Carstens */ 47f5daba1dSHeiko Carstens void s390_handle_mcck(void) 48f5daba1dSHeiko Carstens { 49f5daba1dSHeiko Carstens unsigned long flags; 50f5daba1dSHeiko Carstens struct mcck_struct mcck; 51f5daba1dSHeiko Carstens 52f5daba1dSHeiko Carstens /* 53f5daba1dSHeiko Carstens * Disable machine checks and get the current state of accumulated 54f5daba1dSHeiko Carstens * machine checks. Afterwards delete the old state and enable machine 55f5daba1dSHeiko Carstens * checks again. 56f5daba1dSHeiko Carstens */ 57f5daba1dSHeiko Carstens local_irq_save(flags); 58f5daba1dSHeiko Carstens local_mcck_disable(); 592cb4a182SSebastian Ott mcck = *this_cpu_ptr(&cpu_mcck); 602cb4a182SSebastian Ott memset(this_cpu_ptr(&cpu_mcck), 0, sizeof(mcck)); 61d3a73acbSMartin Schwidefsky clear_cpu_flag(CIF_MCCK_PENDING); 62f5daba1dSHeiko Carstens local_mcck_enable(); 63f5daba1dSHeiko Carstens local_irq_restore(flags); 64f5daba1dSHeiko Carstens 65f5daba1dSHeiko Carstens if (mcck.channel_report) 66f5daba1dSHeiko Carstens crw_handle_channel_report(); 67f5daba1dSHeiko Carstens /* 687b886416SHeiko Carstens * A warning may remain for a prolonged period on the bare iron. 697b886416SHeiko Carstens * (actually until the machine is powered off, or the problem is gone) 707b886416SHeiko Carstens * So we just stop listening for the WARNING MCH and avoid continuously 71f5daba1dSHeiko Carstens * being interrupted. One caveat is however, that we must do this per 72f5daba1dSHeiko Carstens * processor and cannot use the smp version of ctl_clear_bit(). 73f5daba1dSHeiko Carstens * On VM we only get one interrupt per virtally presented machinecheck. 747b886416SHeiko Carstens * Though one suffices, we may get one interrupt per (virtual) cpu. 75f5daba1dSHeiko Carstens */ 76f5daba1dSHeiko Carstens if (mcck.warning) { /* WARNING pending ? */ 77f5daba1dSHeiko Carstens static int mchchk_wng_posted = 0; 787b886416SHeiko Carstens 797b886416SHeiko Carstens /* Use single cpu clear, as we cannot handle smp here. */ 80f5daba1dSHeiko Carstens __ctl_clear_bit(14, 24); /* Disable WARNING MCH */ 81f5daba1dSHeiko Carstens if (xchg(&mchchk_wng_posted, 1) == 0) 82f5daba1dSHeiko Carstens kill_cad_pid(SIGPWR, 1); 83f5daba1dSHeiko Carstens } 8429b0a825SHeiko Carstens if (mcck.stp_queue) 8529b0a825SHeiko Carstens stp_queue_work(); 86f5daba1dSHeiko Carstens if (mcck.kill_task) { 87f5daba1dSHeiko Carstens local_irq_enable(); 88f5daba1dSHeiko Carstens printk(KERN_EMERG "mcck: Terminating task because of machine " 89dc6e1555SHeiko Carstens "malfunction (code 0x%016lx).\n", mcck.mcck_code); 90f5daba1dSHeiko Carstens printk(KERN_EMERG "mcck: task: %s, pid: %d.\n", 91f5daba1dSHeiko Carstens current->comm, current->pid); 92f5daba1dSHeiko Carstens do_exit(SIGSEGV); 93f5daba1dSHeiko Carstens } 94f5daba1dSHeiko Carstens } 95f5daba1dSHeiko Carstens EXPORT_SYMBOL_GPL(s390_handle_mcck); 96f5daba1dSHeiko Carstens 97f5daba1dSHeiko Carstens /* 98f5daba1dSHeiko Carstens * returns 0 if all registers could be validated 99f5daba1dSHeiko Carstens * returns 1 otherwise 100f5daba1dSHeiko Carstens */ 101975be635SHeiko Carstens static int notrace s390_validate_registers(union mci mci) 102f5daba1dSHeiko Carstens { 103f5daba1dSHeiko Carstens int kill_task; 104f5daba1dSHeiko Carstens u64 zero; 105f5daba1dSHeiko Carstens void *fpt_save_area, *fpt_creg_save_area; 106f5daba1dSHeiko Carstens 107f5daba1dSHeiko Carstens kill_task = 0; 108f5daba1dSHeiko Carstens zero = 0; 109f5daba1dSHeiko Carstens 110dc6e1555SHeiko Carstens if (!mci.gr) { 111f5daba1dSHeiko Carstens /* 112f5daba1dSHeiko Carstens * General purpose registers couldn't be restored and have 113f5daba1dSHeiko Carstens * unknown contents. Process needs to be terminated. 114f5daba1dSHeiko Carstens */ 115f5daba1dSHeiko Carstens kill_task = 1; 116f5daba1dSHeiko Carstens } 117dc6e1555SHeiko Carstens if (!mci.fp) { 118f5daba1dSHeiko Carstens /* 119f5daba1dSHeiko Carstens * Floating point registers can't be restored and 120f5daba1dSHeiko Carstens * therefore the process needs to be terminated. 121f5daba1dSHeiko Carstens */ 122f5daba1dSHeiko Carstens kill_task = 1; 123f5daba1dSHeiko Carstens } 124f5daba1dSHeiko Carstens fpt_save_area = &S390_lowcore.floating_pt_save_area; 125f5daba1dSHeiko Carstens fpt_creg_save_area = &S390_lowcore.fpt_creg_save_area; 126dc6e1555SHeiko Carstens if (!mci.fc) { 127f5daba1dSHeiko Carstens /* 128f5daba1dSHeiko Carstens * Floating point control register can't be restored. 129f5daba1dSHeiko Carstens * Task will be terminated. 130f5daba1dSHeiko Carstens */ 131f5daba1dSHeiko Carstens asm volatile("lfpc 0(%0)" : : "a" (&zero), "m" (zero)); 132f5daba1dSHeiko Carstens kill_task = 1; 133f5daba1dSHeiko Carstens } else 134f5daba1dSHeiko Carstens asm volatile("lfpc 0(%0)" : : "a" (fpt_creg_save_area)); 135f5daba1dSHeiko Carstens 136cad49cfcSHeiko Carstens if (!MACHINE_HAS_VX) { 137975be635SHeiko Carstens /* Validate floating point registers */ 138f5daba1dSHeiko Carstens asm volatile( 139f5daba1dSHeiko Carstens " ld 0,0(%0)\n" 140f5daba1dSHeiko Carstens " ld 1,8(%0)\n" 141f5daba1dSHeiko Carstens " ld 2,16(%0)\n" 142f5daba1dSHeiko Carstens " ld 3,24(%0)\n" 143f5daba1dSHeiko Carstens " ld 4,32(%0)\n" 144f5daba1dSHeiko Carstens " ld 5,40(%0)\n" 145f5daba1dSHeiko Carstens " ld 6,48(%0)\n" 146f5daba1dSHeiko Carstens " ld 7,56(%0)\n" 147f5daba1dSHeiko Carstens " ld 8,64(%0)\n" 148f5daba1dSHeiko Carstens " ld 9,72(%0)\n" 149f5daba1dSHeiko Carstens " ld 10,80(%0)\n" 150f5daba1dSHeiko Carstens " ld 11,88(%0)\n" 151f5daba1dSHeiko Carstens " ld 12,96(%0)\n" 152f5daba1dSHeiko Carstens " ld 13,104(%0)\n" 153f5daba1dSHeiko Carstens " ld 14,112(%0)\n" 154f5daba1dSHeiko Carstens " ld 15,120(%0)\n" 155f5daba1dSHeiko Carstens : : "a" (fpt_save_area)); 156cad49cfcSHeiko Carstens } else { 157975be635SHeiko Carstens /* Validate vector registers */ 158cad49cfcSHeiko Carstens union ctlreg0 cr0; 159cad49cfcSHeiko Carstens 160dc6e1555SHeiko Carstens if (!mci.vr) { 16180703617SMartin Schwidefsky /* 16280703617SMartin Schwidefsky * Vector registers can't be restored and therefore 16380703617SMartin Schwidefsky * the process needs to be terminated. 16480703617SMartin Schwidefsky */ 16580703617SMartin Schwidefsky kill_task = 1; 16680703617SMartin Schwidefsky } 167cad49cfcSHeiko Carstens cr0.val = S390_lowcore.cregs_save_area[0]; 168cad49cfcSHeiko Carstens cr0.afp = cr0.vx = 1; 169cad49cfcSHeiko Carstens __ctl_load(cr0.val, 0, 0); 1709977e886SHendrik Brueckner asm volatile( 1719977e886SHendrik Brueckner " la 1,%0\n" 1729977e886SHendrik Brueckner " .word 0xe70f,0x1000,0x0036\n" /* vlm 0,15,0(1) */ 1739977e886SHendrik Brueckner " .word 0xe70f,0x1100,0x0c36\n" /* vlm 16,31,256(1) */ 1749977e886SHendrik Brueckner : : "Q" (*(struct vx_array *) 1759977e886SHendrik Brueckner &S390_lowcore.vector_save_area) : "1"); 176cad49cfcSHeiko Carstens __ctl_load(S390_lowcore.cregs_save_area[0], 0, 0); 17780703617SMartin Schwidefsky } 178975be635SHeiko Carstens /* Validate access registers */ 179f5daba1dSHeiko Carstens asm volatile( 180f5daba1dSHeiko Carstens " lam 0,15,0(%0)" 181f5daba1dSHeiko Carstens : : "a" (&S390_lowcore.access_regs_save_area)); 182dc6e1555SHeiko Carstens if (!mci.ar) { 183f5daba1dSHeiko Carstens /* 184f5daba1dSHeiko Carstens * Access registers have unknown contents. 185f5daba1dSHeiko Carstens * Terminating task. 186f5daba1dSHeiko Carstens */ 187f5daba1dSHeiko Carstens kill_task = 1; 188f5daba1dSHeiko Carstens } 189975be635SHeiko Carstens /* Validate control registers */ 190dc6e1555SHeiko Carstens if (!mci.cr) { 191f5daba1dSHeiko Carstens /* 192f5daba1dSHeiko Carstens * Control registers have unknown contents. 193f5daba1dSHeiko Carstens * Can't recover and therefore stopping machine. 194f5daba1dSHeiko Carstens */ 1953d68286aSHeiko Carstens s390_handle_damage(); 196f5daba1dSHeiko Carstens } else { 197f5daba1dSHeiko Carstens asm volatile( 198f5daba1dSHeiko Carstens " lctlg 0,15,0(%0)" 199f5daba1dSHeiko Carstens : : "a" (&S390_lowcore.cregs_save_area)); 200f5daba1dSHeiko Carstens } 201f5daba1dSHeiko Carstens /* 202975be635SHeiko Carstens * We don't even try to validate the TOD register, since we simply 203f5daba1dSHeiko Carstens * can't write something sensible into that register. 204f5daba1dSHeiko Carstens */ 205f5daba1dSHeiko Carstens /* 206975be635SHeiko Carstens * See if we can validate the TOD programmable register with its 207f5daba1dSHeiko Carstens * old contents (should be zero) otherwise set it to zero. 208f5daba1dSHeiko Carstens */ 209dc6e1555SHeiko Carstens if (!mci.pr) 210f5daba1dSHeiko Carstens asm volatile( 211f5daba1dSHeiko Carstens " sr 0,0\n" 212f5daba1dSHeiko Carstens " sckpf" 213f5daba1dSHeiko Carstens : : : "0", "cc"); 214f5daba1dSHeiko Carstens else 215f5daba1dSHeiko Carstens asm volatile( 216f5daba1dSHeiko Carstens " l 0,0(%0)\n" 217f5daba1dSHeiko Carstens " sckpf" 218f5daba1dSHeiko Carstens : : "a" (&S390_lowcore.tod_progreg_save_area) 219f5daba1dSHeiko Carstens : "0", "cc"); 220975be635SHeiko Carstens /* Validate clock comparator register */ 221e8129c64SHeiko Carstens set_clock_comparator(S390_lowcore.clock_comparator); 222f5daba1dSHeiko Carstens /* Check if old PSW is valid */ 223dc6e1555SHeiko Carstens if (!mci.wp) 224f5daba1dSHeiko Carstens /* 225f5daba1dSHeiko Carstens * Can't tell if we come from user or kernel mode 226f5daba1dSHeiko Carstens * -> stopping machine. 227f5daba1dSHeiko Carstens */ 2283d68286aSHeiko Carstens s390_handle_damage(); 229f5daba1dSHeiko Carstens 230dc6e1555SHeiko Carstens if (!mci.ms || !mci.pm || !mci.ia) 231f5daba1dSHeiko Carstens kill_task = 1; 232f5daba1dSHeiko Carstens 233f5daba1dSHeiko Carstens return kill_task; 234f5daba1dSHeiko Carstens } 235f5daba1dSHeiko Carstens 236f5daba1dSHeiko Carstens #define MAX_IPD_COUNT 29 237f5daba1dSHeiko Carstens #define MAX_IPD_TIME (5 * 60 * USEC_PER_SEC) /* 5 minutes */ 238f5daba1dSHeiko Carstens 239f5daba1dSHeiko Carstens #define ED_STP_ISLAND 6 /* External damage STP island check */ 240f5daba1dSHeiko Carstens #define ED_STP_SYNC 7 /* External damage STP sync check */ 241f5daba1dSHeiko Carstens 242f5daba1dSHeiko Carstens /* 243f5daba1dSHeiko Carstens * machine check handler. 244f5daba1dSHeiko Carstens */ 245f5daba1dSHeiko Carstens void notrace s390_do_machine_check(struct pt_regs *regs) 246f5daba1dSHeiko Carstens { 247f5daba1dSHeiko Carstens static int ipd_count; 248f5daba1dSHeiko Carstens static DEFINE_SPINLOCK(ipd_lock); 249f5daba1dSHeiko Carstens static unsigned long long last_ipd; 250f5daba1dSHeiko Carstens struct mcck_struct *mcck; 251f5daba1dSHeiko Carstens unsigned long long tmp; 252dc6e1555SHeiko Carstens union mci mci; 253f5daba1dSHeiko Carstens int umode; 254f5daba1dSHeiko Carstens 25581f64b87SHeiko Carstens nmi_enter(); 256420f42ecSHeiko Carstens inc_irq_stat(NMI_NMI); 257dc6e1555SHeiko Carstens mci.val = S390_lowcore.mcck_interruption_code; 258eb7e7d76SChristoph Lameter mcck = this_cpu_ptr(&cpu_mcck); 259f5daba1dSHeiko Carstens umode = user_mode(regs); 260f5daba1dSHeiko Carstens 261dc6e1555SHeiko Carstens if (mci.sd) { 262f5daba1dSHeiko Carstens /* System damage -> stopping machine */ 2633d68286aSHeiko Carstens s390_handle_damage(); 264f5daba1dSHeiko Carstens } 265dc6e1555SHeiko Carstens if (mci.pd) { 266dc6e1555SHeiko Carstens if (mci.b) { 267f5daba1dSHeiko Carstens /* Processing backup -> verify if we can survive this */ 268f5daba1dSHeiko Carstens u64 z_mcic, o_mcic, t_mcic; 269f5daba1dSHeiko Carstens z_mcic = (1ULL<<63 | 1ULL<<59 | 1ULL<<29); 270f5daba1dSHeiko Carstens o_mcic = (1ULL<<43 | 1ULL<<42 | 1ULL<<41 | 1ULL<<40 | 271f5daba1dSHeiko Carstens 1ULL<<36 | 1ULL<<35 | 1ULL<<34 | 1ULL<<32 | 272f5daba1dSHeiko Carstens 1ULL<<30 | 1ULL<<21 | 1ULL<<20 | 1ULL<<17 | 273f5daba1dSHeiko Carstens 1ULL<<16); 274dc6e1555SHeiko Carstens t_mcic = mci.val; 275f5daba1dSHeiko Carstens 276f5daba1dSHeiko Carstens if (((t_mcic & z_mcic) != 0) || 277f5daba1dSHeiko Carstens ((t_mcic & o_mcic) != o_mcic)) { 2783d68286aSHeiko Carstens s390_handle_damage(); 279f5daba1dSHeiko Carstens } 280f5daba1dSHeiko Carstens 281f5daba1dSHeiko Carstens /* 282f5daba1dSHeiko Carstens * Nullifying exigent condition, therefore we might 283f5daba1dSHeiko Carstens * retry this instruction. 284f5daba1dSHeiko Carstens */ 285f5daba1dSHeiko Carstens spin_lock(&ipd_lock); 2861aae0560SHeiko Carstens tmp = get_tod_clock(); 287f5daba1dSHeiko Carstens if (((tmp - last_ipd) >> 12) < MAX_IPD_TIME) 288f5daba1dSHeiko Carstens ipd_count++; 289f5daba1dSHeiko Carstens else 290f5daba1dSHeiko Carstens ipd_count = 1; 291f5daba1dSHeiko Carstens last_ipd = tmp; 292f5daba1dSHeiko Carstens if (ipd_count == MAX_IPD_COUNT) 2933d68286aSHeiko Carstens s390_handle_damage(); 294f5daba1dSHeiko Carstens spin_unlock(&ipd_lock); 295f5daba1dSHeiko Carstens } else { 296f5daba1dSHeiko Carstens /* Processing damage -> stopping machine */ 2973d68286aSHeiko Carstens s390_handle_damage(); 298f5daba1dSHeiko Carstens } 299f5daba1dSHeiko Carstens } 300975be635SHeiko Carstens if (s390_validate_registers(mci)) { 301f5daba1dSHeiko Carstens if (umode) { 302f5daba1dSHeiko Carstens /* 303f5daba1dSHeiko Carstens * Couldn't restore all register contents while in 304f5daba1dSHeiko Carstens * user mode -> mark task for termination. 305f5daba1dSHeiko Carstens */ 306f5daba1dSHeiko Carstens mcck->kill_task = 1; 307dc6e1555SHeiko Carstens mcck->mcck_code = mci.val; 308d3a73acbSMartin Schwidefsky set_cpu_flag(CIF_MCCK_PENDING); 309f5daba1dSHeiko Carstens } else { 310f5daba1dSHeiko Carstens /* 311f5daba1dSHeiko Carstens * Couldn't restore all register contents while in 312f5daba1dSHeiko Carstens * kernel mode -> stopping machine. 313f5daba1dSHeiko Carstens */ 3143d68286aSHeiko Carstens s390_handle_damage(); 315f5daba1dSHeiko Carstens } 316f5daba1dSHeiko Carstens } 317dc6e1555SHeiko Carstens if (mci.cd) { 318f5daba1dSHeiko Carstens /* Timing facility damage */ 3193d68286aSHeiko Carstens s390_handle_damage(); 320f5daba1dSHeiko Carstens } 321dc6e1555SHeiko Carstens if (mci.ed && mci.ec) { 322f5daba1dSHeiko Carstens /* External damage */ 323f5daba1dSHeiko Carstens if (S390_lowcore.external_damage_code & (1U << ED_STP_SYNC)) 32429b0a825SHeiko Carstens mcck->stp_queue |= stp_sync_check(); 325f5daba1dSHeiko Carstens if (S390_lowcore.external_damage_code & (1U << ED_STP_ISLAND)) 32629b0a825SHeiko Carstens mcck->stp_queue |= stp_island_check(); 327*fd5ada04SMartin Schwidefsky if (mcck->stp_queue) 32829b0a825SHeiko Carstens set_cpu_flag(CIF_MCCK_PENDING); 329f5daba1dSHeiko Carstens } 330dc6e1555SHeiko Carstens if (mci.se) 331f5daba1dSHeiko Carstens /* Storage error uncorrected */ 3323d68286aSHeiko Carstens s390_handle_damage(); 333dc6e1555SHeiko Carstens if (mci.ke) 334f5daba1dSHeiko Carstens /* Storage key-error uncorrected */ 3353d68286aSHeiko Carstens s390_handle_damage(); 336dc6e1555SHeiko Carstens if (mci.ds && mci.fa) 337f5daba1dSHeiko Carstens /* Storage degradation */ 3383d68286aSHeiko Carstens s390_handle_damage(); 339dc6e1555SHeiko Carstens if (mci.cp) { 340f5daba1dSHeiko Carstens /* Channel report word pending */ 341f5daba1dSHeiko Carstens mcck->channel_report = 1; 342d3a73acbSMartin Schwidefsky set_cpu_flag(CIF_MCCK_PENDING); 343f5daba1dSHeiko Carstens } 344dc6e1555SHeiko Carstens if (mci.w) { 345f5daba1dSHeiko Carstens /* Warning pending */ 346f5daba1dSHeiko Carstens mcck->warning = 1; 347d3a73acbSMartin Schwidefsky set_cpu_flag(CIF_MCCK_PENDING); 348f5daba1dSHeiko Carstens } 34981f64b87SHeiko Carstens nmi_exit(); 350f5daba1dSHeiko Carstens } 351f5daba1dSHeiko Carstens 352f5daba1dSHeiko Carstens static int __init machine_check_init(void) 353f5daba1dSHeiko Carstens { 354f5daba1dSHeiko Carstens ctl_set_bit(14, 25); /* enable external damage MCH */ 355f5daba1dSHeiko Carstens ctl_set_bit(14, 27); /* enable system recovery MCH */ 356f5daba1dSHeiko Carstens ctl_set_bit(14, 24); /* enable warning MCH */ 357f5daba1dSHeiko Carstens return 0; 358f5daba1dSHeiko Carstens } 35924d05ff8SHeiko Carstens early_initcall(machine_check_init); 360