xref: /linux/arch/s390/kernel/irq.c (revision b889fcf63cb62e7fdb7816565e28f44dbe4a76a5)
1 /*
2  *    Copyright IBM Corp. 2004, 2011
3  *    Author(s): Martin Schwidefsky <schwidefsky@de.ibm.com>,
4  *		 Holger Smolinski <Holger.Smolinski@de.ibm.com>,
5  *		 Thomas Spatzier <tspat@de.ibm.com>,
6  *
7  * This file contains interrupt related functions.
8  */
9 
10 #include <linux/kernel_stat.h>
11 #include <linux/interrupt.h>
12 #include <linux/seq_file.h>
13 #include <linux/proc_fs.h>
14 #include <linux/profile.h>
15 #include <linux/module.h>
16 #include <linux/kernel.h>
17 #include <linux/ftrace.h>
18 #include <linux/errno.h>
19 #include <linux/slab.h>
20 #include <linux/cpu.h>
21 #include <asm/irq_regs.h>
22 #include <asm/cputime.h>
23 #include <asm/lowcore.h>
24 #include <asm/irq.h>
25 #include "entry.h"
26 
27 struct irq_class {
28 	char *name;
29 	char *desc;
30 };
31 
32 static const struct irq_class intrclass_names[] = {
33 	[EXTERNAL_INTERRUPT] = {.name = "EXT"},
34 	[IO_INTERRUPT]	     = {.name = "I/O"},
35 	[EXTINT_CLK] = {.name = "CLK", .desc = "[EXT] Clock Comparator"},
36 	[EXTINT_EXC] = {.name = "EXC", .desc = "[EXT] External Call"},
37 	[EXTINT_EMS] = {.name = "EMS", .desc = "[EXT] Emergency Signal"},
38 	[EXTINT_TMR] = {.name = "TMR", .desc = "[EXT] CPU Timer"},
39 	[EXTINT_TLA] = {.name = "TAL", .desc = "[EXT] Timing Alert"},
40 	[EXTINT_PFL] = {.name = "PFL", .desc = "[EXT] Pseudo Page Fault"},
41 	[EXTINT_DSD] = {.name = "DSD", .desc = "[EXT] DASD Diag"},
42 	[EXTINT_VRT] = {.name = "VRT", .desc = "[EXT] Virtio"},
43 	[EXTINT_SCP] = {.name = "SCP", .desc = "[EXT] Service Call"},
44 	[EXTINT_IUC] = {.name = "IUC", .desc = "[EXT] IUCV"},
45 	[EXTINT_CMS] = {.name = "CMS", .desc = "[EXT] CPU-Measurement: Sampling"},
46 	[EXTINT_CMC] = {.name = "CMC", .desc = "[EXT] CPU-Measurement: Counter"},
47 	[EXTINT_CMR] = {.name = "CMR", .desc = "[EXT] CPU-Measurement: RI"},
48 	[IOINT_CIO]  = {.name = "CIO", .desc = "[I/O] Common I/O Layer Interrupt"},
49 	[IOINT_QAI]  = {.name = "QAI", .desc = "[I/O] QDIO Adapter Interrupt"},
50 	[IOINT_DAS]  = {.name = "DAS", .desc = "[I/O] DASD"},
51 	[IOINT_C15]  = {.name = "C15", .desc = "[I/O] 3215"},
52 	[IOINT_C70]  = {.name = "C70", .desc = "[I/O] 3270"},
53 	[IOINT_TAP]  = {.name = "TAP", .desc = "[I/O] Tape"},
54 	[IOINT_VMR]  = {.name = "VMR", .desc = "[I/O] Unit Record Devices"},
55 	[IOINT_LCS]  = {.name = "LCS", .desc = "[I/O] LCS"},
56 	[IOINT_CLW]  = {.name = "CLW", .desc = "[I/O] CLAW"},
57 	[IOINT_CTC]  = {.name = "CTC", .desc = "[I/O] CTC"},
58 	[IOINT_APB]  = {.name = "APB", .desc = "[I/O] AP Bus"},
59 	[IOINT_ADM]  = {.name = "ADM", .desc = "[I/O] EADM Subchannel"},
60 	[IOINT_CSC]  = {.name = "CSC", .desc = "[I/O] CHSC Subchannel"},
61 	[IOINT_PCI]  = {.name = "PCI", .desc = "[I/O] PCI Interrupt" },
62 	[IOINT_MSI] =  {.name = "MSI", .desc = "[I/O] MSI Interrupt" },
63 	[NMI_NMI]    = {.name = "NMI", .desc = "[NMI] Machine Check"},
64 };
65 
66 /*
67  * show_interrupts is needed by /proc/interrupts.
68  */
69 int show_interrupts(struct seq_file *p, void *v)
70 {
71 	int i = *(loff_t *) v, j;
72 
73 	get_online_cpus();
74 	if (i == 0) {
75 		seq_puts(p, "           ");
76 		for_each_online_cpu(j)
77 			seq_printf(p, "CPU%d       ",j);
78 		seq_putc(p, '\n');
79 	}
80 
81 	if (i < NR_IRQS) {
82 		seq_printf(p, "%s: ", intrclass_names[i].name);
83 #ifndef CONFIG_SMP
84 		seq_printf(p, "%10u ", kstat_irqs(i));
85 #else
86 		for_each_online_cpu(j)
87 			seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
88 #endif
89 		if (intrclass_names[i].desc)
90 			seq_printf(p, "  %s", intrclass_names[i].desc);
91                 seq_putc(p, '\n');
92         }
93 	put_online_cpus();
94         return 0;
95 }
96 
97 /*
98  * Switch to the asynchronous interrupt stack for softirq execution.
99  */
100 asmlinkage void do_softirq(void)
101 {
102 	unsigned long flags, old, new;
103 
104 	if (in_interrupt())
105 		return;
106 
107 	local_irq_save(flags);
108 
109 	if (local_softirq_pending()) {
110 		/* Get current stack pointer. */
111 		asm volatile("la %0,0(15)" : "=a" (old));
112 		/* Check against async. stack address range. */
113 		new = S390_lowcore.async_stack;
114 		if (((new - old) >> (PAGE_SHIFT + THREAD_ORDER)) != 0) {
115 			/* Need to switch to the async. stack. */
116 			new -= STACK_FRAME_OVERHEAD;
117 			((struct stack_frame *) new)->back_chain = old;
118 
119 			asm volatile("   la    15,0(%0)\n"
120 				     "   basr  14,%2\n"
121 				     "   la    15,0(%1)\n"
122 				     : : "a" (new), "a" (old),
123 				         "a" (__do_softirq)
124 				     : "0", "1", "2", "3", "4", "5", "14",
125 				       "cc", "memory" );
126 		} else {
127 			/* We are already on the async stack. */
128 			__do_softirq();
129 		}
130 	}
131 
132 	local_irq_restore(flags);
133 }
134 
135 #ifdef CONFIG_PROC_FS
136 void init_irq_proc(void)
137 {
138 	struct proc_dir_entry *root_irq_dir;
139 
140 	root_irq_dir = proc_mkdir("irq", NULL);
141 	create_prof_cpu_mask(root_irq_dir);
142 }
143 #endif
144 
145 /*
146  * ext_int_hash[index] is the list head for all external interrupts that hash
147  * to this index.
148  */
149 static struct list_head ext_int_hash[256];
150 
151 struct ext_int_info {
152 	ext_int_handler_t handler;
153 	u16 code;
154 	struct list_head entry;
155 	struct rcu_head rcu;
156 };
157 
158 /* ext_int_hash_lock protects the handler lists for external interrupts */
159 DEFINE_SPINLOCK(ext_int_hash_lock);
160 
161 static void __init init_external_interrupts(void)
162 {
163 	int idx;
164 
165 	for (idx = 0; idx < ARRAY_SIZE(ext_int_hash); idx++)
166 		INIT_LIST_HEAD(&ext_int_hash[idx]);
167 }
168 
169 static inline int ext_hash(u16 code)
170 {
171 	return (code + (code >> 9)) & 0xff;
172 }
173 
174 int register_external_interrupt(u16 code, ext_int_handler_t handler)
175 {
176 	struct ext_int_info *p;
177 	unsigned long flags;
178 	int index;
179 
180 	p = kmalloc(sizeof(*p), GFP_ATOMIC);
181 	if (!p)
182 		return -ENOMEM;
183 	p->code = code;
184 	p->handler = handler;
185 	index = ext_hash(code);
186 
187 	spin_lock_irqsave(&ext_int_hash_lock, flags);
188 	list_add_rcu(&p->entry, &ext_int_hash[index]);
189 	spin_unlock_irqrestore(&ext_int_hash_lock, flags);
190 	return 0;
191 }
192 EXPORT_SYMBOL(register_external_interrupt);
193 
194 int unregister_external_interrupt(u16 code, ext_int_handler_t handler)
195 {
196 	struct ext_int_info *p;
197 	unsigned long flags;
198 	int index = ext_hash(code);
199 
200 	spin_lock_irqsave(&ext_int_hash_lock, flags);
201 	list_for_each_entry_rcu(p, &ext_int_hash[index], entry) {
202 		if (p->code == code && p->handler == handler) {
203 			list_del_rcu(&p->entry);
204 			kfree_rcu(p, rcu);
205 		}
206 	}
207 	spin_unlock_irqrestore(&ext_int_hash_lock, flags);
208 	return 0;
209 }
210 EXPORT_SYMBOL(unregister_external_interrupt);
211 
212 void __irq_entry do_extint(struct pt_regs *regs, struct ext_code ext_code,
213 			   unsigned int param32, unsigned long param64)
214 {
215 	struct pt_regs *old_regs;
216 	struct ext_int_info *p;
217 	int index;
218 
219 	old_regs = set_irq_regs(regs);
220 	irq_enter();
221 	if (S390_lowcore.int_clock >= S390_lowcore.clock_comparator) {
222 		/* Serve timer interrupts first. */
223 		clock_comparator_work();
224 	}
225 	kstat_cpu(smp_processor_id()).irqs[EXTERNAL_INTERRUPT]++;
226 	if (ext_code.code != 0x1004)
227 		__get_cpu_var(s390_idle).nohz_delay = 1;
228 
229 	index = ext_hash(ext_code.code);
230 	rcu_read_lock();
231 	list_for_each_entry_rcu(p, &ext_int_hash[index], entry)
232 		if (likely(p->code == ext_code.code))
233 			p->handler(ext_code, param32, param64);
234 	rcu_read_unlock();
235 	irq_exit();
236 	set_irq_regs(old_regs);
237 }
238 
239 void __init init_IRQ(void)
240 {
241 	init_external_interrupts();
242 }
243 
244 static DEFINE_SPINLOCK(sc_irq_lock);
245 static int sc_irq_refcount;
246 
247 void service_subclass_irq_register(void)
248 {
249 	spin_lock(&sc_irq_lock);
250 	if (!sc_irq_refcount)
251 		ctl_set_bit(0, 9);
252 	sc_irq_refcount++;
253 	spin_unlock(&sc_irq_lock);
254 }
255 EXPORT_SYMBOL(service_subclass_irq_register);
256 
257 void service_subclass_irq_unregister(void)
258 {
259 	spin_lock(&sc_irq_lock);
260 	sc_irq_refcount--;
261 	if (!sc_irq_refcount)
262 		ctl_clear_bit(0, 9);
263 	spin_unlock(&sc_irq_lock);
264 }
265 EXPORT_SYMBOL(service_subclass_irq_unregister);
266 
267 static DEFINE_SPINLOCK(ma_subclass_lock);
268 static int ma_subclass_refcount;
269 
270 void measurement_alert_subclass_register(void)
271 {
272 	spin_lock(&ma_subclass_lock);
273 	if (!ma_subclass_refcount)
274 		ctl_set_bit(0, 5);
275 	ma_subclass_refcount++;
276 	spin_unlock(&ma_subclass_lock);
277 }
278 EXPORT_SYMBOL(measurement_alert_subclass_register);
279 
280 void measurement_alert_subclass_unregister(void)
281 {
282 	spin_lock(&ma_subclass_lock);
283 	ma_subclass_refcount--;
284 	if (!ma_subclass_refcount)
285 		ctl_clear_bit(0, 5);
286 	spin_unlock(&ma_subclass_lock);
287 }
288 EXPORT_SYMBOL(measurement_alert_subclass_unregister);
289