1/* 2 * Copyright IBM Corp. 1999, 2010 3 * 4 * Author(s): Hartmut Penner <hp@de.ibm.com> 5 * Martin Schwidefsky <schwidefsky@de.ibm.com> 6 * Rob van der Heij <rvdhei@iae.nl> 7 * Heiko Carstens <heiko.carstens@de.ibm.com> 8 * 9 */ 10 11#include <linux/init.h> 12#include <linux/linkage.h> 13#include <asm/asm-offsets.h> 14#include <asm/thread_info.h> 15#include <asm/page.h> 16 17__HEAD 18ENTRY(startup_continue) 19 tm __LC_STFLE_FAC_LIST+5,0x80 # LPP available ? 20 jz 0f 21 xc __LC_LPP+1(7,0),__LC_LPP+1 # clear lpp and current_pid 22 mvi __LC_LPP,0x80 # and set LPP_MAGIC 23 .insn s,0xb2800000,__LC_LPP # load program parameter 240: larl %r1,sched_clock_base_cc 25 mvc 0(8,%r1),__LC_LAST_UPDATE_CLOCK 26 larl %r13,.LPG1 # get base 27 lctlg %c0,%c15,.Lctl-.LPG1(%r13) # load control registers 28 lg %r12,.Lparmaddr-.LPG1(%r13) # pointer to parameter area 29 # move IPL device to lowcore 30 lghi %r0,__LC_PASTE 31 stg %r0,__LC_VDSO_PER_CPU 32# 33# Setup stack 34# 35 larl %r14,init_task 36 stg %r14,__LC_CURRENT 37 larl %r15,init_thread_union 38 aghi %r15,1<<(PAGE_SHIFT+THREAD_SIZE_ORDER) # init_task_union + THREAD_SIZE 39 stg %r15,__LC_KERNEL_STACK # set end of kernel stack 40 aghi %r15,-160 41# 42# Save ipl parameters, clear bss memory, initialize storage key for kernel pages, 43# and create a kernel NSS if the SAVESYS= parm is defined 44# 45 brasl %r14,startup_init 46 lpswe .Lentry-.LPG1(13) # jump to _stext in primary-space, 47 # virtual and never return ... 48 .align 16 49.LPG1: 50.Lentry:.quad 0x0000000180000000,_stext 51.Lctl: .quad 0x04040000 # cr0: AFP registers & secondary space 52 .quad 0 # cr1: primary space segment table 53 .quad .Lduct # cr2: dispatchable unit control table 54 .quad 0 # cr3: instruction authorization 55 .quad 0xffff # cr4: instruction authorization 56 .quad .Lduct # cr5: primary-aste origin 57 .quad 0 # cr6: I/O interrupts 58 .quad 0 # cr7: secondary space segment table 59 .quad 0 # cr8: access registers translation 60 .quad 0 # cr9: tracing off 61 .quad 0 # cr10: tracing off 62 .quad 0 # cr11: tracing off 63 .quad 0 # cr12: tracing off 64 .quad 0 # cr13: home space segment table 65 .quad 0xc0000000 # cr14: machine check handling off 66 .quad .Llinkage_stack # cr15: linkage stack operations 67.Lpcmsk:.quad 0x0000000180000000 68.L4malign:.quad 0xffffffffffc00000 69.Lscan2g:.quad 0x80000000 + 0x20000 - 8 # 2GB + 128K - 8 70.Lnop: .long 0x07000700 71.Lparmaddr: 72 .quad PARMAREA 73 .align 64 74.Lduct: .long 0,.Laste,.Laste,0,.Lduald,0,0,0 75 .long 0,0,0,0,0,0,0,0 76.Laste: .quad 0,0xffffffffffffffff,0,0,0,0,0,0 77 .align 128 78.Lduald:.rept 8 79 .long 0x80000000,0,0,0 # invalid access-list entries 80 .endr 81.Llinkage_stack: 82 .long 0,0,0x89000000,0,0,0,0x8a000000,0 83 84ENTRY(_ehead) 85 86 .org 0x100000 - 0x11000 # head.o ends at 0x11000 87# 88# startup-code, running in absolute addressing mode 89# 90ENTRY(_stext) 91 basr %r13,0 # get base 92.LPG3: 93# check control registers 94 stctg %c0,%c15,0(%r15) 95 oi 6(%r15),0x60 # enable sigp emergency & external call 96 oi 4(%r15),0x10 # switch on low address proctection 97 lctlg %c0,%c15,0(%r15) 98 99 lam 0,15,.Laregs-.LPG3(%r13) # load acrs needed by uaccess 100 brasl %r14,start_kernel # go to C code 101# 102# We returned from start_kernel ?!? PANIK 103# 104 basr %r13,0 105 lpswe .Ldw-.(%r13) # load disabled wait psw 106 107 .align 8 108.Ldw: .quad 0x0002000180000000,0x0000000000000000 109.Laregs:.long 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 110