xref: /linux/arch/s390/kernel/entry.S (revision e58e871becec2d3b04ed91c0c16fe8deac9c9dfa) 
1/*
2 *    S390 low-level entry points.
3 *
4 *    Copyright IBM Corp. 1999, 2012
5 *    Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
6 *		 Hartmut Penner (hp@de.ibm.com),
7 *		 Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
8 *		 Heiko Carstens <heiko.carstens@de.ibm.com>
9 */
10
11#include <linux/init.h>
12#include <linux/linkage.h>
13#include <asm/processor.h>
14#include <asm/cache.h>
15#include <asm/errno.h>
16#include <asm/ptrace.h>
17#include <asm/thread_info.h>
18#include <asm/asm-offsets.h>
19#include <asm/unistd.h>
20#include <asm/page.h>
21#include <asm/sigp.h>
22#include <asm/irq.h>
23#include <asm/vx-insn.h>
24#include <asm/setup.h>
25#include <asm/nmi.h>
26#include <asm/export.h>
27
28__PT_R0      =	__PT_GPRS
29__PT_R1      =	__PT_GPRS + 8
30__PT_R2      =	__PT_GPRS + 16
31__PT_R3      =	__PT_GPRS + 24
32__PT_R4      =	__PT_GPRS + 32
33__PT_R5      =	__PT_GPRS + 40
34__PT_R6      =	__PT_GPRS + 48
35__PT_R7      =	__PT_GPRS + 56
36__PT_R8      =	__PT_GPRS + 64
37__PT_R9      =	__PT_GPRS + 72
38__PT_R10     =	__PT_GPRS + 80
39__PT_R11     =	__PT_GPRS + 88
40__PT_R12     =	__PT_GPRS + 96
41__PT_R13     =	__PT_GPRS + 104
42__PT_R14     =	__PT_GPRS + 112
43__PT_R15     =	__PT_GPRS + 120
44
45STACK_SHIFT = PAGE_SHIFT + THREAD_SIZE_ORDER
46STACK_SIZE  = 1 << STACK_SHIFT
47STACK_INIT = STACK_SIZE - STACK_FRAME_OVERHEAD - __PT_SIZE
48
49_TIF_WORK	= (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \
50		   _TIF_UPROBE | _TIF_GUARDED_STORAGE | _TIF_PATCH_PENDING)
51_TIF_TRACE	= (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT | _TIF_SECCOMP | \
52		   _TIF_SYSCALL_TRACEPOINT)
53_CIF_WORK	= (_CIF_MCCK_PENDING | _CIF_ASCE_PRIMARY | \
54		   _CIF_ASCE_SECONDARY | _CIF_FPU)
55_PIF_WORK	= (_PIF_PER_TRAP)
56
57#define BASED(name) name-cleanup_critical(%r13)
58
59	.macro	TRACE_IRQS_ON
60#ifdef CONFIG_TRACE_IRQFLAGS
61	basr	%r2,%r0
62	brasl	%r14,trace_hardirqs_on_caller
63#endif
64	.endm
65
66	.macro	TRACE_IRQS_OFF
67#ifdef CONFIG_TRACE_IRQFLAGS
68	basr	%r2,%r0
69	brasl	%r14,trace_hardirqs_off_caller
70#endif
71	.endm
72
73	.macro	LOCKDEP_SYS_EXIT
74#ifdef CONFIG_LOCKDEP
75	tm	__PT_PSW+1(%r11),0x01	# returning to user ?
76	jz	.+10
77	brasl	%r14,lockdep_sys_exit
78#endif
79	.endm
80
81	.macro	CHECK_STACK stacksize,savearea
82#ifdef CONFIG_CHECK_STACK
83	tml	%r15,\stacksize - CONFIG_STACK_GUARD
84	lghi	%r14,\savearea
85	jz	stack_overflow
86#endif
87	.endm
88
89	.macro	SWITCH_ASYNC savearea,timer
90	tmhh	%r8,0x0001		# interrupting from user ?
91	jnz	1f
92	lgr	%r14,%r9
93	slg	%r14,BASED(.Lcritical_start)
94	clg	%r14,BASED(.Lcritical_length)
95	jhe	0f
96	lghi	%r11,\savearea		# inside critical section, do cleanup
97	brasl	%r14,cleanup_critical
98	tmhh	%r8,0x0001		# retest problem state after cleanup
99	jnz	1f
1000:	lg	%r14,__LC_ASYNC_STACK	# are we already on the async stack?
101	slgr	%r14,%r15
102	srag	%r14,%r14,STACK_SHIFT
103	jnz	2f
104	CHECK_STACK 1<<STACK_SHIFT,\savearea
105	aghi	%r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
106	j	3f
1071:	UPDATE_VTIME %r14,%r15,\timer
1082:	lg	%r15,__LC_ASYNC_STACK	# load async stack
1093:	la	%r11,STACK_FRAME_OVERHEAD(%r15)
110	.endm
111
112	.macro UPDATE_VTIME w1,w2,enter_timer
113	lg	\w1,__LC_EXIT_TIMER
114	lg	\w2,__LC_LAST_UPDATE_TIMER
115	slg	\w1,\enter_timer
116	slg	\w2,__LC_EXIT_TIMER
117	alg	\w1,__LC_USER_TIMER
118	alg	\w2,__LC_SYSTEM_TIMER
119	stg	\w1,__LC_USER_TIMER
120	stg	\w2,__LC_SYSTEM_TIMER
121	mvc	__LC_LAST_UPDATE_TIMER(8),\enter_timer
122	.endm
123
124	.macro REENABLE_IRQS
125	stg	%r8,__LC_RETURN_PSW
126	ni	__LC_RETURN_PSW,0xbf
127	ssm	__LC_RETURN_PSW
128	.endm
129
130	.macro STCK savearea
131#ifdef CONFIG_HAVE_MARCH_Z9_109_FEATURES
132	.insn	s,0xb27c0000,\savearea		# store clock fast
133#else
134	.insn	s,0xb2050000,\savearea		# store clock
135#endif
136	.endm
137
138	/*
139	 * The TSTMSK macro generates a test-under-mask instruction by
140	 * calculating the memory offset for the specified mask value.
141	 * Mask value can be any constant.  The macro shifts the mask
142	 * value to calculate the memory offset for the test-under-mask
143	 * instruction.
144	 */
145	.macro TSTMSK addr, mask, size=8, bytepos=0
146		.if (\bytepos < \size) && (\mask >> 8)
147			.if (\mask & 0xff)
148				.error "Mask exceeds byte boundary"
149			.endif
150			TSTMSK \addr, "(\mask >> 8)", \size, "(\bytepos + 1)"
151			.exitm
152		.endif
153		.ifeq \mask
154			.error "Mask must not be zero"
155		.endif
156		off = \size - \bytepos - 1
157		tm	off+\addr, \mask
158	.endm
159
160	.section .kprobes.text, "ax"
161.Ldummy:
162	/*
163	 * This nop exists only in order to avoid that __switch_to starts at
164	 * the beginning of the kprobes text section. In that case we would
165	 * have several symbols at the same address. E.g. objdump would take
166	 * an arbitrary symbol name when disassembling this code.
167	 * With the added nop in between the __switch_to symbol is unique
168	 * again.
169	 */
170	nop	0
171
172/*
173 * Scheduler resume function, called by switch_to
174 *  gpr2 = (task_struct *) prev
175 *  gpr3 = (task_struct *) next
176 * Returns:
177 *  gpr2 = prev
178 */
179ENTRY(__switch_to)
180	stmg	%r6,%r15,__SF_GPRS(%r15)	# store gprs of prev task
181	lgr	%r1,%r2
182	aghi	%r1,__TASK_thread		# thread_struct of prev task
183	lg	%r5,__TASK_stack(%r3)		# start of kernel stack of next
184	stg	%r15,__THREAD_ksp(%r1)		# store kernel stack of prev
185	lgr	%r1,%r3
186	aghi	%r1,__TASK_thread		# thread_struct of next task
187	lgr	%r15,%r5
188	aghi	%r15,STACK_INIT			# end of kernel stack of next
189	stg	%r3,__LC_CURRENT		# store task struct of next
190	stg	%r15,__LC_KERNEL_STACK		# store end of kernel stack
191	lg	%r15,__THREAD_ksp(%r1)		# load kernel stack of next
192	mvc	__LC_CURRENT_PID(4,%r0),__TASK_pid(%r3) # store pid of next
193	lmg	%r6,%r15,__SF_GPRS(%r15)	# load gprs of next task
194	TSTMSK	__LC_MACHINE_FLAGS,MACHINE_FLAG_LPP
195	bzr	%r14
196	.insn	s,0xb2800000,__LC_LPP		# set program parameter
197	br	%r14
198
199.L__critical_start:
200
201#if IS_ENABLED(CONFIG_KVM)
202/*
203 * sie64a calling convention:
204 * %r2 pointer to sie control block
205 * %r3 guest register save area
206 */
207ENTRY(sie64a)
208	stmg	%r6,%r14,__SF_GPRS(%r15)	# save kernel registers
209	stg	%r2,__SF_EMPTY(%r15)		# save control block pointer
210	stg	%r3,__SF_EMPTY+8(%r15)		# save guest register save area
211	xc	__SF_EMPTY+16(8,%r15),__SF_EMPTY+16(%r15) # reason code = 0
212	TSTMSK	__LC_CPU_FLAGS,_CIF_FPU		# load guest fp/vx registers ?
213	jno	.Lsie_load_guest_gprs
214	brasl	%r14,load_fpu_regs		# load guest fp/vx regs
215.Lsie_load_guest_gprs:
216	lmg	%r0,%r13,0(%r3)			# load guest gprs 0-13
217	lg	%r14,__LC_GMAP			# get gmap pointer
218	ltgr	%r14,%r14
219	jz	.Lsie_gmap
220	lctlg	%c1,%c1,__GMAP_ASCE(%r14)	# load primary asce
221.Lsie_gmap:
222	lg	%r14,__SF_EMPTY(%r15)		# get control block pointer
223	oi	__SIE_PROG0C+3(%r14),1		# we are going into SIE now
224	tm	__SIE_PROG20+3(%r14),3		# last exit...
225	jnz	.Lsie_skip
226	TSTMSK	__LC_CPU_FLAGS,_CIF_FPU
227	jo	.Lsie_skip			# exit if fp/vx regs changed
228	sie	0(%r14)
229.Lsie_skip:
230	ni	__SIE_PROG0C+3(%r14),0xfe	# no longer in SIE
231	lctlg	%c1,%c1,__LC_USER_ASCE		# load primary asce
232.Lsie_done:
233# some program checks are suppressing. C code (e.g. do_protection_exception)
234# will rewind the PSW by the ILC, which is 4 bytes in case of SIE. Other
235# instructions between sie64a and .Lsie_done should not cause program
236# interrupts. So lets use a nop (47 00 00 00) as a landing pad.
237# See also .Lcleanup_sie
238.Lrewind_pad:
239	nop	0
240	.globl sie_exit
241sie_exit:
242	lg	%r14,__SF_EMPTY+8(%r15)		# load guest register save area
243	stmg	%r0,%r13,0(%r14)		# save guest gprs 0-13
244	lmg	%r6,%r14,__SF_GPRS(%r15)	# restore kernel registers
245	lg	%r2,__SF_EMPTY+16(%r15)		# return exit reason code
246	br	%r14
247.Lsie_fault:
248	lghi	%r14,-EFAULT
249	stg	%r14,__SF_EMPTY+16(%r15)	# set exit reason code
250	j	sie_exit
251
252	EX_TABLE(.Lrewind_pad,.Lsie_fault)
253	EX_TABLE(sie_exit,.Lsie_fault)
254EXPORT_SYMBOL(sie64a)
255EXPORT_SYMBOL(sie_exit)
256#endif
257
258/*
259 * SVC interrupt handler routine. System calls are synchronous events and
260 * are executed with interrupts enabled.
261 */
262
263ENTRY(system_call)
264	stpt	__LC_SYNC_ENTER_TIMER
265.Lsysc_stmg:
266	stmg	%r8,%r15,__LC_SAVE_AREA_SYNC
267	lg	%r12,__LC_CURRENT
268	lghi	%r13,__TASK_thread
269	lghi	%r14,_PIF_SYSCALL
270.Lsysc_per:
271	lg	%r15,__LC_KERNEL_STACK
272	la	%r11,STACK_FRAME_OVERHEAD(%r15)	# pointer to pt_regs
273.Lsysc_vtime:
274	UPDATE_VTIME %r8,%r9,__LC_SYNC_ENTER_TIMER
275	stmg	%r0,%r7,__PT_R0(%r11)
276	mvc	__PT_R8(64,%r11),__LC_SAVE_AREA_SYNC
277	mvc	__PT_PSW(16,%r11),__LC_SVC_OLD_PSW
278	mvc	__PT_INT_CODE(4,%r11),__LC_SVC_ILC
279	stg	%r14,__PT_FLAGS(%r11)
280.Lsysc_do_svc:
281	# load address of system call table
282	lg	%r10,__THREAD_sysc_table(%r13,%r12)
283	llgh	%r8,__PT_INT_CODE+2(%r11)
284	slag	%r8,%r8,2			# shift and test for svc 0
285	jnz	.Lsysc_nr_ok
286	# svc 0: system call number in %r1
287	llgfr	%r1,%r1				# clear high word in r1
288	cghi	%r1,NR_syscalls
289	jnl	.Lsysc_nr_ok
290	sth	%r1,__PT_INT_CODE+2(%r11)
291	slag	%r8,%r1,2
292.Lsysc_nr_ok:
293	xc	__SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
294	stg	%r2,__PT_ORIG_GPR2(%r11)
295	stg	%r7,STACK_FRAME_OVERHEAD(%r15)
296	lgf	%r9,0(%r8,%r10)			# get system call add.
297	TSTMSK	__TI_flags(%r12),_TIF_TRACE
298	jnz	.Lsysc_tracesys
299	basr	%r14,%r9			# call sys_xxxx
300	stg	%r2,__PT_R2(%r11)		# store return value
301
302.Lsysc_return:
303	LOCKDEP_SYS_EXIT
304.Lsysc_tif:
305	TSTMSK	__PT_FLAGS(%r11),_PIF_WORK
306	jnz	.Lsysc_work
307	TSTMSK	__TI_flags(%r12),_TIF_WORK
308	jnz	.Lsysc_work			# check for work
309	TSTMSK	__LC_CPU_FLAGS,_CIF_WORK
310	jnz	.Lsysc_work
311.Lsysc_restore:
312	lg	%r14,__LC_VDSO_PER_CPU
313	lmg	%r0,%r10,__PT_R0(%r11)
314	mvc	__LC_RETURN_PSW(16),__PT_PSW(%r11)
315.Lsysc_exit_timer:
316	stpt	__LC_EXIT_TIMER
317	mvc	__VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER
318	lmg	%r11,%r15,__PT_R11(%r11)
319	lpswe	__LC_RETURN_PSW
320.Lsysc_done:
321
322#
323# One of the work bits is on. Find out which one.
324#
325.Lsysc_work:
326	TSTMSK	__LC_CPU_FLAGS,_CIF_MCCK_PENDING
327	jo	.Lsysc_mcck_pending
328	TSTMSK	__TI_flags(%r12),_TIF_NEED_RESCHED
329	jo	.Lsysc_reschedule
330#ifdef CONFIG_UPROBES
331	TSTMSK	__TI_flags(%r12),_TIF_UPROBE
332	jo	.Lsysc_uprobe_notify
333#endif
334	TSTMSK	__TI_flags(%r12),_TIF_GUARDED_STORAGE
335	jo	.Lsysc_guarded_storage
336	TSTMSK	__PT_FLAGS(%r11),_PIF_PER_TRAP
337	jo	.Lsysc_singlestep
338#ifdef CONFIG_LIVEPATCH
339	TSTMSK	__TI_flags(%r12),_TIF_PATCH_PENDING
340	jo	.Lsysc_patch_pending	# handle live patching just before
341					# signals and possible syscall restart
342#endif
343	TSTMSK	__TI_flags(%r12),_TIF_SIGPENDING
344	jo	.Lsysc_sigpending
345	TSTMSK	__TI_flags(%r12),_TIF_NOTIFY_RESUME
346	jo	.Lsysc_notify_resume
347	TSTMSK	__LC_CPU_FLAGS,_CIF_FPU
348	jo	.Lsysc_vxrs
349	TSTMSK	__LC_CPU_FLAGS,(_CIF_ASCE_PRIMARY|_CIF_ASCE_SECONDARY)
350	jnz	.Lsysc_asce
351	j	.Lsysc_return		# beware of critical section cleanup
352
353#
354# _TIF_NEED_RESCHED is set, call schedule
355#
356.Lsysc_reschedule:
357	larl	%r14,.Lsysc_return
358	jg	schedule
359
360#
361# _CIF_MCCK_PENDING is set, call handler
362#
363.Lsysc_mcck_pending:
364	larl	%r14,.Lsysc_return
365	jg	s390_handle_mcck	# TIF bit will be cleared by handler
366
367#
368# _CIF_ASCE_PRIMARY and/or CIF_ASCE_SECONDARY set, load user space asce
369#
370.Lsysc_asce:
371	ni	__LC_CPU_FLAGS+7,255-_CIF_ASCE_PRIMARY
372	lctlg	%c1,%c1,__LC_USER_ASCE		# load primary asce
373	TSTMSK	__LC_CPU_FLAGS,_CIF_ASCE_SECONDARY
374	jz	.Lsysc_return
375	larl	%r14,.Lsysc_return
376	jg	set_fs_fixup
377
378#
379# CIF_FPU is set, restore floating-point controls and floating-point registers.
380#
381.Lsysc_vxrs:
382	larl	%r14,.Lsysc_return
383	jg	load_fpu_regs
384
385#
386# _TIF_SIGPENDING is set, call do_signal
387#
388.Lsysc_sigpending:
389	lgr	%r2,%r11		# pass pointer to pt_regs
390	brasl	%r14,do_signal
391	TSTMSK	__PT_FLAGS(%r11),_PIF_SYSCALL
392	jno	.Lsysc_return
393.Lsysc_do_syscall:
394	lghi	%r13,__TASK_thread
395	lmg	%r2,%r7,__PT_R2(%r11)	# load svc arguments
396	lghi	%r1,0			# svc 0 returns -ENOSYS
397	j	.Lsysc_do_svc
398
399#
400# _TIF_NOTIFY_RESUME is set, call do_notify_resume
401#
402.Lsysc_notify_resume:
403	lgr	%r2,%r11		# pass pointer to pt_regs
404	larl	%r14,.Lsysc_return
405	jg	do_notify_resume
406
407#
408# _TIF_UPROBE is set, call uprobe_notify_resume
409#
410#ifdef CONFIG_UPROBES
411.Lsysc_uprobe_notify:
412	lgr	%r2,%r11		# pass pointer to pt_regs
413	larl	%r14,.Lsysc_return
414	jg	uprobe_notify_resume
415#endif
416
417#
418# _TIF_GUARDED_STORAGE is set, call guarded_storage_load
419#
420.Lsysc_guarded_storage:
421	lgr	%r2,%r11		# pass pointer to pt_regs
422	larl	%r14,.Lsysc_return
423	jg	gs_load_bc_cb
424#
425# _TIF_PATCH_PENDING is set, call klp_update_patch_state
426#
427#ifdef CONFIG_LIVEPATCH
428.Lsysc_patch_pending:
429	lg	%r2,__LC_CURRENT	# pass pointer to task struct
430	larl	%r14,.Lsysc_return
431	jg	klp_update_patch_state
432#endif
433
434#
435# _PIF_PER_TRAP is set, call do_per_trap
436#
437.Lsysc_singlestep:
438	ni	__PT_FLAGS+7(%r11),255-_PIF_PER_TRAP
439	lgr	%r2,%r11		# pass pointer to pt_regs
440	larl	%r14,.Lsysc_return
441	jg	do_per_trap
442
443#
444# call tracehook_report_syscall_entry/tracehook_report_syscall_exit before
445# and after the system call
446#
447.Lsysc_tracesys:
448	lgr	%r2,%r11		# pass pointer to pt_regs
449	la	%r3,0
450	llgh	%r0,__PT_INT_CODE+2(%r11)
451	stg	%r0,__PT_R2(%r11)
452	brasl	%r14,do_syscall_trace_enter
453	lghi	%r0,NR_syscalls
454	clgr	%r0,%r2
455	jnh	.Lsysc_tracenogo
456	sllg	%r8,%r2,2
457	lgf	%r9,0(%r8,%r10)
458.Lsysc_tracego:
459	lmg	%r3,%r7,__PT_R3(%r11)
460	stg	%r7,STACK_FRAME_OVERHEAD(%r15)
461	lg	%r2,__PT_ORIG_GPR2(%r11)
462	basr	%r14,%r9		# call sys_xxx
463	stg	%r2,__PT_R2(%r11)	# store return value
464.Lsysc_tracenogo:
465	TSTMSK	__TI_flags(%r12),_TIF_TRACE
466	jz	.Lsysc_return
467	lgr	%r2,%r11		# pass pointer to pt_regs
468	larl	%r14,.Lsysc_return
469	jg	do_syscall_trace_exit
470
471#
472# a new process exits the kernel with ret_from_fork
473#
474ENTRY(ret_from_fork)
475	la	%r11,STACK_FRAME_OVERHEAD(%r15)
476	lg	%r12,__LC_CURRENT
477	brasl	%r14,schedule_tail
478	TRACE_IRQS_ON
479	ssm	__LC_SVC_NEW_PSW	# reenable interrupts
480	tm	__PT_PSW+1(%r11),0x01	# forking a kernel thread ?
481	jne	.Lsysc_tracenogo
482	# it's a kernel thread
483	lmg	%r9,%r10,__PT_R9(%r11)	# load gprs
484ENTRY(kernel_thread_starter)
485	la	%r2,0(%r10)
486	basr	%r14,%r9
487	j	.Lsysc_tracenogo
488
489/*
490 * Program check handler routine
491 */
492
493ENTRY(pgm_check_handler)
494	stpt	__LC_SYNC_ENTER_TIMER
495	stmg	%r8,%r15,__LC_SAVE_AREA_SYNC
496	lg	%r10,__LC_LAST_BREAK
497	lg	%r12,__LC_CURRENT
498	larl	%r13,cleanup_critical
499	lmg	%r8,%r9,__LC_PGM_OLD_PSW
500	tmhh	%r8,0x0001		# test problem state bit
501	jnz	2f			# -> fault in user space
502#if IS_ENABLED(CONFIG_KVM)
503	# cleanup critical section for sie64a
504	lgr	%r14,%r9
505	slg	%r14,BASED(.Lsie_critical_start)
506	clg	%r14,BASED(.Lsie_critical_length)
507	jhe	0f
508	brasl	%r14,.Lcleanup_sie
509#endif
5100:	tmhh	%r8,0x4000		# PER bit set in old PSW ?
511	jnz	1f			# -> enabled, can't be a double fault
512	tm	__LC_PGM_ILC+3,0x80	# check for per exception
513	jnz	.Lpgm_svcper		# -> single stepped svc
5141:	CHECK_STACK STACK_SIZE,__LC_SAVE_AREA_SYNC
515	aghi	%r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
516	j	4f
5172:	UPDATE_VTIME %r14,%r15,__LC_SYNC_ENTER_TIMER
518	lg	%r15,__LC_KERNEL_STACK
519	lgr	%r14,%r12
520	aghi	%r14,__TASK_thread	# pointer to thread_struct
521	lghi	%r13,__LC_PGM_TDB
522	tm	__LC_PGM_ILC+2,0x02	# check for transaction abort
523	jz	3f
524	mvc	__THREAD_trap_tdb(256,%r14),0(%r13)
5253:	stg	%r10,__THREAD_last_break(%r14)
5264:	la	%r11,STACK_FRAME_OVERHEAD(%r15)
527	stmg	%r0,%r7,__PT_R0(%r11)
528	mvc	__PT_R8(64,%r11),__LC_SAVE_AREA_SYNC
529	stmg	%r8,%r9,__PT_PSW(%r11)
530	mvc	__PT_INT_CODE(4,%r11),__LC_PGM_ILC
531	mvc	__PT_INT_PARM_LONG(8,%r11),__LC_TRANS_EXC_CODE
532	xc	__PT_FLAGS(8,%r11),__PT_FLAGS(%r11)
533	stg	%r10,__PT_ARGS(%r11)
534	tm	__LC_PGM_ILC+3,0x80	# check for per exception
535	jz	5f
536	tmhh	%r8,0x0001		# kernel per event ?
537	jz	.Lpgm_kprobe
538	oi	__PT_FLAGS+7(%r11),_PIF_PER_TRAP
539	mvc	__THREAD_per_address(8,%r14),__LC_PER_ADDRESS
540	mvc	__THREAD_per_cause(2,%r14),__LC_PER_CODE
541	mvc	__THREAD_per_paid(1,%r14),__LC_PER_ACCESS_ID
5425:	REENABLE_IRQS
543	xc	__SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
544	larl	%r1,pgm_check_table
545	llgh	%r10,__PT_INT_CODE+2(%r11)
546	nill	%r10,0x007f
547	sll	%r10,2
548	je	.Lpgm_return
549	lgf	%r1,0(%r10,%r1)		# load address of handler routine
550	lgr	%r2,%r11		# pass pointer to pt_regs
551	basr	%r14,%r1		# branch to interrupt-handler
552.Lpgm_return:
553	LOCKDEP_SYS_EXIT
554	tm	__PT_PSW+1(%r11),0x01	# returning to user ?
555	jno	.Lsysc_restore
556	TSTMSK	__PT_FLAGS(%r11),_PIF_SYSCALL
557	jo	.Lsysc_do_syscall
558	j	.Lsysc_tif
559
560#
561# PER event in supervisor state, must be kprobes
562#
563.Lpgm_kprobe:
564	REENABLE_IRQS
565	xc	__SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
566	lgr	%r2,%r11		# pass pointer to pt_regs
567	brasl	%r14,do_per_trap
568	j	.Lpgm_return
569
570#
571# single stepped system call
572#
573.Lpgm_svcper:
574	mvc	__LC_RETURN_PSW(8),__LC_SVC_NEW_PSW
575	lghi	%r13,__TASK_thread
576	larl	%r14,.Lsysc_per
577	stg	%r14,__LC_RETURN_PSW+8
578	lghi	%r14,_PIF_SYSCALL | _PIF_PER_TRAP
579	lpswe	__LC_RETURN_PSW		# branch to .Lsysc_per and enable irqs
580
581/*
582 * IO interrupt handler routine
583 */
584ENTRY(io_int_handler)
585	STCK	__LC_INT_CLOCK
586	stpt	__LC_ASYNC_ENTER_TIMER
587	stmg	%r8,%r15,__LC_SAVE_AREA_ASYNC
588	lg	%r12,__LC_CURRENT
589	larl	%r13,cleanup_critical
590	lmg	%r8,%r9,__LC_IO_OLD_PSW
591	SWITCH_ASYNC __LC_SAVE_AREA_ASYNC,__LC_ASYNC_ENTER_TIMER
592	stmg	%r0,%r7,__PT_R0(%r11)
593	mvc	__PT_R8(64,%r11),__LC_SAVE_AREA_ASYNC
594	stmg	%r8,%r9,__PT_PSW(%r11)
595	mvc	__PT_INT_CODE(12,%r11),__LC_SUBCHANNEL_ID
596	xc	__PT_FLAGS(8,%r11),__PT_FLAGS(%r11)
597	TSTMSK	__LC_CPU_FLAGS,_CIF_IGNORE_IRQ
598	jo	.Lio_restore
599	TRACE_IRQS_OFF
600	xc	__SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
601.Lio_loop:
602	lgr	%r2,%r11		# pass pointer to pt_regs
603	lghi	%r3,IO_INTERRUPT
604	tm	__PT_INT_CODE+8(%r11),0x80	# adapter interrupt ?
605	jz	.Lio_call
606	lghi	%r3,THIN_INTERRUPT
607.Lio_call:
608	brasl	%r14,do_IRQ
609	TSTMSK	__LC_MACHINE_FLAGS,MACHINE_FLAG_LPAR
610	jz	.Lio_return
611	tpi	0
612	jz	.Lio_return
613	mvc	__PT_INT_CODE(12,%r11),__LC_SUBCHANNEL_ID
614	j	.Lio_loop
615.Lio_return:
616	LOCKDEP_SYS_EXIT
617	TRACE_IRQS_ON
618.Lio_tif:
619	TSTMSK	__TI_flags(%r12),_TIF_WORK
620	jnz	.Lio_work		# there is work to do (signals etc.)
621	TSTMSK	__LC_CPU_FLAGS,_CIF_WORK
622	jnz	.Lio_work
623.Lio_restore:
624	lg	%r14,__LC_VDSO_PER_CPU
625	lmg	%r0,%r10,__PT_R0(%r11)
626	mvc	__LC_RETURN_PSW(16),__PT_PSW(%r11)
627.Lio_exit_timer:
628	stpt	__LC_EXIT_TIMER
629	mvc	__VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER
630	lmg	%r11,%r15,__PT_R11(%r11)
631	lpswe	__LC_RETURN_PSW
632.Lio_done:
633
634#
635# There is work todo, find out in which context we have been interrupted:
636# 1) if we return to user space we can do all _TIF_WORK work
637# 2) if we return to kernel code and kvm is enabled check if we need to
638#    modify the psw to leave SIE
639# 3) if we return to kernel code and preemptive scheduling is enabled check
640#    the preemption counter and if it is zero call preempt_schedule_irq
641# Before any work can be done, a switch to the kernel stack is required.
642#
643.Lio_work:
644	tm	__PT_PSW+1(%r11),0x01	# returning to user ?
645	jo	.Lio_work_user		# yes -> do resched & signal
646#ifdef CONFIG_PREEMPT
647	# check for preemptive scheduling
648	icm	%r0,15,__LC_PREEMPT_COUNT
649	jnz	.Lio_restore		# preemption is disabled
650	TSTMSK	__TI_flags(%r12),_TIF_NEED_RESCHED
651	jno	.Lio_restore
652	# switch to kernel stack
653	lg	%r1,__PT_R15(%r11)
654	aghi	%r1,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
655	mvc	STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11)
656	xc	__SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1)
657	la	%r11,STACK_FRAME_OVERHEAD(%r1)
658	lgr	%r15,%r1
659	# TRACE_IRQS_ON already done at .Lio_return, call
660	# TRACE_IRQS_OFF to keep things symmetrical
661	TRACE_IRQS_OFF
662	brasl	%r14,preempt_schedule_irq
663	j	.Lio_return
664#else
665	j	.Lio_restore
666#endif
667
668#
669# Need to do work before returning to userspace, switch to kernel stack
670#
671.Lio_work_user:
672	lg	%r1,__LC_KERNEL_STACK
673	mvc	STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11)
674	xc	__SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1)
675	la	%r11,STACK_FRAME_OVERHEAD(%r1)
676	lgr	%r15,%r1
677
678#
679# One of the work bits is on. Find out which one.
680#
681.Lio_work_tif:
682	TSTMSK	__LC_CPU_FLAGS,_CIF_MCCK_PENDING
683	jo	.Lio_mcck_pending
684	TSTMSK	__TI_flags(%r12),_TIF_NEED_RESCHED
685	jo	.Lio_reschedule
686#ifdef CONFIG_LIVEPATCH
687	TSTMSK	__TI_flags(%r12),_TIF_PATCH_PENDING
688	jo	.Lio_patch_pending
689#endif
690	TSTMSK	__TI_flags(%r12),_TIF_SIGPENDING
691	jo	.Lio_sigpending
692	TSTMSK	__TI_flags(%r12),_TIF_NOTIFY_RESUME
693	jo	.Lio_notify_resume
694	TSTMSK	__TI_flags(%r12),_TIF_GUARDED_STORAGE
695	jo	.Lio_guarded_storage
696	TSTMSK	__LC_CPU_FLAGS,_CIF_FPU
697	jo	.Lio_vxrs
698	TSTMSK	__LC_CPU_FLAGS,(_CIF_ASCE_PRIMARY|_CIF_ASCE_SECONDARY)
699	jnz	.Lio_asce
700	j	.Lio_return		# beware of critical section cleanup
701
702#
703# _CIF_MCCK_PENDING is set, call handler
704#
705.Lio_mcck_pending:
706	# TRACE_IRQS_ON already done at .Lio_return
707	brasl	%r14,s390_handle_mcck	# TIF bit will be cleared by handler
708	TRACE_IRQS_OFF
709	j	.Lio_return
710
711#
712# _CIF_ASCE_PRIMARY and/or CIF_ASCE_SECONDARY set, load user space asce
713#
714.Lio_asce:
715	ni	__LC_CPU_FLAGS+7,255-_CIF_ASCE_PRIMARY
716	lctlg	%c1,%c1,__LC_USER_ASCE		# load primary asce
717	TSTMSK	__LC_CPU_FLAGS,_CIF_ASCE_SECONDARY
718	jz	.Lio_return
719	larl	%r14,.Lio_return
720	jg	set_fs_fixup
721
722#
723# CIF_FPU is set, restore floating-point controls and floating-point registers.
724#
725.Lio_vxrs:
726	larl	%r14,.Lio_return
727	jg	load_fpu_regs
728
729#
730# _TIF_GUARDED_STORAGE is set, call guarded_storage_load
731#
732.Lio_guarded_storage:
733	# TRACE_IRQS_ON already done at .Lio_return
734	ssm	__LC_SVC_NEW_PSW	# reenable interrupts
735	lgr	%r2,%r11		# pass pointer to pt_regs
736	brasl	%r14,gs_load_bc_cb
737	ssm	__LC_PGM_NEW_PSW	# disable I/O and ext. interrupts
738	TRACE_IRQS_OFF
739	j	.Lio_return
740
741#
742# _TIF_NEED_RESCHED is set, call schedule
743#
744.Lio_reschedule:
745	# TRACE_IRQS_ON already done at .Lio_return
746	ssm	__LC_SVC_NEW_PSW	# reenable interrupts
747	brasl	%r14,schedule		# call scheduler
748	ssm	__LC_PGM_NEW_PSW	# disable I/O and ext. interrupts
749	TRACE_IRQS_OFF
750	j	.Lio_return
751
752#
753# _TIF_PATCH_PENDING is set, call klp_update_patch_state
754#
755#ifdef CONFIG_LIVEPATCH
756.Lio_patch_pending:
757	lg	%r2,__LC_CURRENT	# pass pointer to task struct
758	larl	%r14,.Lio_return
759	jg	klp_update_patch_state
760#endif
761
762#
763# _TIF_SIGPENDING or is set, call do_signal
764#
765.Lio_sigpending:
766	# TRACE_IRQS_ON already done at .Lio_return
767	ssm	__LC_SVC_NEW_PSW	# reenable interrupts
768	lgr	%r2,%r11		# pass pointer to pt_regs
769	brasl	%r14,do_signal
770	ssm	__LC_PGM_NEW_PSW	# disable I/O and ext. interrupts
771	TRACE_IRQS_OFF
772	j	.Lio_return
773
774#
775# _TIF_NOTIFY_RESUME or is set, call do_notify_resume
776#
777.Lio_notify_resume:
778	# TRACE_IRQS_ON already done at .Lio_return
779	ssm	__LC_SVC_NEW_PSW	# reenable interrupts
780	lgr	%r2,%r11		# pass pointer to pt_regs
781	brasl	%r14,do_notify_resume
782	ssm	__LC_PGM_NEW_PSW	# disable I/O and ext. interrupts
783	TRACE_IRQS_OFF
784	j	.Lio_return
785
786/*
787 * External interrupt handler routine
788 */
789ENTRY(ext_int_handler)
790	STCK	__LC_INT_CLOCK
791	stpt	__LC_ASYNC_ENTER_TIMER
792	stmg	%r8,%r15,__LC_SAVE_AREA_ASYNC
793	lg	%r12,__LC_CURRENT
794	larl	%r13,cleanup_critical
795	lmg	%r8,%r9,__LC_EXT_OLD_PSW
796	SWITCH_ASYNC __LC_SAVE_AREA_ASYNC,__LC_ASYNC_ENTER_TIMER
797	stmg	%r0,%r7,__PT_R0(%r11)
798	mvc	__PT_R8(64,%r11),__LC_SAVE_AREA_ASYNC
799	stmg	%r8,%r9,__PT_PSW(%r11)
800	lghi	%r1,__LC_EXT_PARAMS2
801	mvc	__PT_INT_CODE(4,%r11),__LC_EXT_CPU_ADDR
802	mvc	__PT_INT_PARM(4,%r11),__LC_EXT_PARAMS
803	mvc	__PT_INT_PARM_LONG(8,%r11),0(%r1)
804	xc	__PT_FLAGS(8,%r11),__PT_FLAGS(%r11)
805	TSTMSK	__LC_CPU_FLAGS,_CIF_IGNORE_IRQ
806	jo	.Lio_restore
807	TRACE_IRQS_OFF
808	xc	__SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
809	lgr	%r2,%r11		# pass pointer to pt_regs
810	lghi	%r3,EXT_INTERRUPT
811	brasl	%r14,do_IRQ
812	j	.Lio_return
813
814/*
815 * Load idle PSW. The second "half" of this function is in .Lcleanup_idle.
816 */
817ENTRY(psw_idle)
818	stg	%r3,__SF_EMPTY(%r15)
819	larl	%r1,.Lpsw_idle_lpsw+4
820	stg	%r1,__SF_EMPTY+8(%r15)
821#ifdef CONFIG_SMP
822	larl	%r1,smp_cpu_mtid
823	llgf	%r1,0(%r1)
824	ltgr	%r1,%r1
825	jz	.Lpsw_idle_stcctm
826	.insn	rsy,0xeb0000000017,%r1,5,__SF_EMPTY+16(%r15)
827.Lpsw_idle_stcctm:
828#endif
829	oi	__LC_CPU_FLAGS+7,_CIF_ENABLED_WAIT
830	STCK	__CLOCK_IDLE_ENTER(%r2)
831	stpt	__TIMER_IDLE_ENTER(%r2)
832.Lpsw_idle_lpsw:
833	lpswe	__SF_EMPTY(%r15)
834	br	%r14
835.Lpsw_idle_end:
836
837/*
838 * Store floating-point controls and floating-point or vector register
839 * depending whether the vector facility is available.	A critical section
840 * cleanup assures that the registers are stored even if interrupted for
841 * some other work.  The CIF_FPU flag is set to trigger a lazy restore
842 * of the register contents at return from io or a system call.
843 */
844ENTRY(save_fpu_regs)
845	lg	%r2,__LC_CURRENT
846	aghi	%r2,__TASK_thread
847	TSTMSK	__LC_CPU_FLAGS,_CIF_FPU
848	bor	%r14
849	stfpc	__THREAD_FPU_fpc(%r2)
850	lg	%r3,__THREAD_FPU_regs(%r2)
851	TSTMSK	__LC_MACHINE_FLAGS,MACHINE_FLAG_VX
852	jz	.Lsave_fpu_regs_fp	  # no -> store FP regs
853	VSTM	%v0,%v15,0,%r3		  # vstm 0,15,0(3)
854	VSTM	%v16,%v31,256,%r3	  # vstm 16,31,256(3)
855	j	.Lsave_fpu_regs_done	  # -> set CIF_FPU flag
856.Lsave_fpu_regs_fp:
857	std	0,0(%r3)
858	std	1,8(%r3)
859	std	2,16(%r3)
860	std	3,24(%r3)
861	std	4,32(%r3)
862	std	5,40(%r3)
863	std	6,48(%r3)
864	std	7,56(%r3)
865	std	8,64(%r3)
866	std	9,72(%r3)
867	std	10,80(%r3)
868	std	11,88(%r3)
869	std	12,96(%r3)
870	std	13,104(%r3)
871	std	14,112(%r3)
872	std	15,120(%r3)
873.Lsave_fpu_regs_done:
874	oi	__LC_CPU_FLAGS+7,_CIF_FPU
875	br	%r14
876.Lsave_fpu_regs_end:
877#if IS_ENABLED(CONFIG_KVM)
878EXPORT_SYMBOL(save_fpu_regs)
879#endif
880
881/*
882 * Load floating-point controls and floating-point or vector registers.
883 * A critical section cleanup assures that the register contents are
884 * loaded even if interrupted for some other work.
885 *
886 * There are special calling conventions to fit into sysc and io return work:
887 *	%r15:	<kernel stack>
888 * The function requires:
889 *	%r4
890 */
891load_fpu_regs:
892	lg	%r4,__LC_CURRENT
893	aghi	%r4,__TASK_thread
894	TSTMSK	__LC_CPU_FLAGS,_CIF_FPU
895	bnor	%r14
896	lfpc	__THREAD_FPU_fpc(%r4)
897	TSTMSK	__LC_MACHINE_FLAGS,MACHINE_FLAG_VX
898	lg	%r4,__THREAD_FPU_regs(%r4)	# %r4 <- reg save area
899	jz	.Lload_fpu_regs_fp		# -> no VX, load FP regs
900	VLM	%v0,%v15,0,%r4
901	VLM	%v16,%v31,256,%r4
902	j	.Lload_fpu_regs_done
903.Lload_fpu_regs_fp:
904	ld	0,0(%r4)
905	ld	1,8(%r4)
906	ld	2,16(%r4)
907	ld	3,24(%r4)
908	ld	4,32(%r4)
909	ld	5,40(%r4)
910	ld	6,48(%r4)
911	ld	7,56(%r4)
912	ld	8,64(%r4)
913	ld	9,72(%r4)
914	ld	10,80(%r4)
915	ld	11,88(%r4)
916	ld	12,96(%r4)
917	ld	13,104(%r4)
918	ld	14,112(%r4)
919	ld	15,120(%r4)
920.Lload_fpu_regs_done:
921	ni	__LC_CPU_FLAGS+7,255-_CIF_FPU
922	br	%r14
923.Lload_fpu_regs_end:
924
925.L__critical_end:
926
927/*
928 * Machine check handler routines
929 */
930ENTRY(mcck_int_handler)
931	STCK	__LC_MCCK_CLOCK
932	la	%r1,4095		# revalidate r1
933	spt	__LC_CPU_TIMER_SAVE_AREA-4095(%r1)	# revalidate cpu timer
934	lmg	%r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)# revalidate gprs
935	lg	%r12,__LC_CURRENT
936	larl	%r13,cleanup_critical
937	lmg	%r8,%r9,__LC_MCK_OLD_PSW
938	TSTMSK	__LC_MCCK_CODE,MCCK_CODE_SYSTEM_DAMAGE
939	jo	.Lmcck_panic		# yes -> rest of mcck code invalid
940	lghi	%r14,__LC_CPU_TIMER_SAVE_AREA
941	mvc	__LC_MCCK_ENTER_TIMER(8),0(%r14)
942	TSTMSK	__LC_MCCK_CODE,MCCK_CODE_CPU_TIMER_VALID
943	jo	3f
944	la	%r14,__LC_SYNC_ENTER_TIMER
945	clc	0(8,%r14),__LC_ASYNC_ENTER_TIMER
946	jl	0f
947	la	%r14,__LC_ASYNC_ENTER_TIMER
9480:	clc	0(8,%r14),__LC_EXIT_TIMER
949	jl	1f
950	la	%r14,__LC_EXIT_TIMER
9511:	clc	0(8,%r14),__LC_LAST_UPDATE_TIMER
952	jl	2f
953	la	%r14,__LC_LAST_UPDATE_TIMER
9542:	spt	0(%r14)
955	mvc	__LC_MCCK_ENTER_TIMER(8),0(%r14)
9563:	TSTMSK	__LC_MCCK_CODE,(MCCK_CODE_PSW_MWP_VALID|MCCK_CODE_PSW_IA_VALID)
957	jno	.Lmcck_panic		# no -> skip cleanup critical
958	SWITCH_ASYNC __LC_GPREGS_SAVE_AREA+64,__LC_MCCK_ENTER_TIMER
959.Lmcck_skip:
960	lghi	%r14,__LC_GPREGS_SAVE_AREA+64
961	stmg	%r0,%r7,__PT_R0(%r11)
962	mvc	__PT_R8(64,%r11),0(%r14)
963	stmg	%r8,%r9,__PT_PSW(%r11)
964	xc	__PT_FLAGS(8,%r11),__PT_FLAGS(%r11)
965	xc	__SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
966	lgr	%r2,%r11		# pass pointer to pt_regs
967	brasl	%r14,s390_do_machine_check
968	tm	__PT_PSW+1(%r11),0x01	# returning to user ?
969	jno	.Lmcck_return
970	lg	%r1,__LC_KERNEL_STACK	# switch to kernel stack
971	mvc	STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11)
972	xc	__SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1)
973	la	%r11,STACK_FRAME_OVERHEAD(%r1)
974	lgr	%r15,%r1
975	ssm	__LC_PGM_NEW_PSW	# turn dat on, keep irqs off
976	TSTMSK	__LC_CPU_FLAGS,_CIF_MCCK_PENDING
977	jno	.Lmcck_return
978	TRACE_IRQS_OFF
979	brasl	%r14,s390_handle_mcck
980	TRACE_IRQS_ON
981.Lmcck_return:
982	lg	%r14,__LC_VDSO_PER_CPU
983	lmg	%r0,%r10,__PT_R0(%r11)
984	mvc	__LC_RETURN_MCCK_PSW(16),__PT_PSW(%r11) # move return PSW
985	tm	__LC_RETURN_MCCK_PSW+1,0x01 # returning to user ?
986	jno	0f
987	stpt	__LC_EXIT_TIMER
988	mvc	__VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER
9890:	lmg	%r11,%r15,__PT_R11(%r11)
990	lpswe	__LC_RETURN_MCCK_PSW
991
992.Lmcck_panic:
993	lg	%r15,__LC_PANIC_STACK
994	la	%r11,STACK_FRAME_OVERHEAD(%r15)
995	j	.Lmcck_skip
996
997#
998# PSW restart interrupt handler
999#
1000ENTRY(restart_int_handler)
1001	TSTMSK	__LC_MACHINE_FLAGS,MACHINE_FLAG_LPP
1002	jz	0f
1003	.insn	s,0xb2800000,__LC_LPP
10040:	stg	%r15,__LC_SAVE_AREA_RESTART
1005	lg	%r15,__LC_RESTART_STACK
1006	aghi	%r15,-__PT_SIZE			# create pt_regs on stack
1007	xc	0(__PT_SIZE,%r15),0(%r15)
1008	stmg	%r0,%r14,__PT_R0(%r15)
1009	mvc	__PT_R15(8,%r15),__LC_SAVE_AREA_RESTART
1010	mvc	__PT_PSW(16,%r15),__LC_RST_OLD_PSW # store restart old psw
1011	aghi	%r15,-STACK_FRAME_OVERHEAD	# create stack frame on stack
1012	xc	0(STACK_FRAME_OVERHEAD,%r15),0(%r15)
1013	lg	%r1,__LC_RESTART_FN		# load fn, parm & source cpu
1014	lg	%r2,__LC_RESTART_DATA
1015	lg	%r3,__LC_RESTART_SOURCE
1016	ltgr	%r3,%r3				# test source cpu address
1017	jm	1f				# negative -> skip source stop
10180:	sigp	%r4,%r3,SIGP_SENSE		# sigp sense to source cpu
1019	brc	10,0b				# wait for status stored
10201:	basr	%r14,%r1			# call function
1021	stap	__SF_EMPTY(%r15)		# store cpu address
1022	llgh	%r3,__SF_EMPTY(%r15)
10232:	sigp	%r4,%r3,SIGP_STOP		# sigp stop to current cpu
1024	brc	2,2b
10253:	j	3b
1026
1027	.section .kprobes.text, "ax"
1028
1029#ifdef CONFIG_CHECK_STACK
1030/*
1031 * The synchronous or the asynchronous stack overflowed. We are dead.
1032 * No need to properly save the registers, we are going to panic anyway.
1033 * Setup a pt_regs so that show_trace can provide a good call trace.
1034 */
1035stack_overflow:
1036	lg	%r15,__LC_PANIC_STACK	# change to panic stack
1037	la	%r11,STACK_FRAME_OVERHEAD(%r15)
1038	stmg	%r0,%r7,__PT_R0(%r11)
1039	stmg	%r8,%r9,__PT_PSW(%r11)
1040	mvc	__PT_R8(64,%r11),0(%r14)
1041	stg	%r10,__PT_ORIG_GPR2(%r11) # store last break to orig_gpr2
1042	xc	__SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
1043	lgr	%r2,%r11		# pass pointer to pt_regs
1044	jg	kernel_stack_overflow
1045#endif
1046
1047cleanup_critical:
1048#if IS_ENABLED(CONFIG_KVM)
1049	clg	%r9,BASED(.Lcleanup_table_sie)	# .Lsie_gmap
1050	jl	0f
1051	clg	%r9,BASED(.Lcleanup_table_sie+8)# .Lsie_done
1052	jl	.Lcleanup_sie
1053#endif
1054	clg	%r9,BASED(.Lcleanup_table)	# system_call
1055	jl	0f
1056	clg	%r9,BASED(.Lcleanup_table+8)	# .Lsysc_do_svc
1057	jl	.Lcleanup_system_call
1058	clg	%r9,BASED(.Lcleanup_table+16)	# .Lsysc_tif
1059	jl	0f
1060	clg	%r9,BASED(.Lcleanup_table+24)	# .Lsysc_restore
1061	jl	.Lcleanup_sysc_tif
1062	clg	%r9,BASED(.Lcleanup_table+32)	# .Lsysc_done
1063	jl	.Lcleanup_sysc_restore
1064	clg	%r9,BASED(.Lcleanup_table+40)	# .Lio_tif
1065	jl	0f
1066	clg	%r9,BASED(.Lcleanup_table+48)	# .Lio_restore
1067	jl	.Lcleanup_io_tif
1068	clg	%r9,BASED(.Lcleanup_table+56)	# .Lio_done
1069	jl	.Lcleanup_io_restore
1070	clg	%r9,BASED(.Lcleanup_table+64)	# psw_idle
1071	jl	0f
1072	clg	%r9,BASED(.Lcleanup_table+72)	# .Lpsw_idle_end
1073	jl	.Lcleanup_idle
1074	clg	%r9,BASED(.Lcleanup_table+80)	# save_fpu_regs
1075	jl	0f
1076	clg	%r9,BASED(.Lcleanup_table+88)	# .Lsave_fpu_regs_end
1077	jl	.Lcleanup_save_fpu_regs
1078	clg	%r9,BASED(.Lcleanup_table+96)	# load_fpu_regs
1079	jl	0f
1080	clg	%r9,BASED(.Lcleanup_table+104)	# .Lload_fpu_regs_end
1081	jl	.Lcleanup_load_fpu_regs
10820:	br	%r14
1083
1084	.align	8
1085.Lcleanup_table:
1086	.quad	system_call
1087	.quad	.Lsysc_do_svc
1088	.quad	.Lsysc_tif
1089	.quad	.Lsysc_restore
1090	.quad	.Lsysc_done
1091	.quad	.Lio_tif
1092	.quad	.Lio_restore
1093	.quad	.Lio_done
1094	.quad	psw_idle
1095	.quad	.Lpsw_idle_end
1096	.quad	save_fpu_regs
1097	.quad	.Lsave_fpu_regs_end
1098	.quad	load_fpu_regs
1099	.quad	.Lload_fpu_regs_end
1100
1101#if IS_ENABLED(CONFIG_KVM)
1102.Lcleanup_table_sie:
1103	.quad	.Lsie_gmap
1104	.quad	.Lsie_done
1105
1106.Lcleanup_sie:
1107	lg	%r9,__SF_EMPTY(%r15)		# get control block pointer
1108	ni	__SIE_PROG0C+3(%r9),0xfe	# no longer in SIE
1109	lctlg	%c1,%c1,__LC_USER_ASCE		# load primary asce
1110	larl	%r9,sie_exit			# skip forward to sie_exit
1111	br	%r14
1112#endif
1113
1114.Lcleanup_system_call:
1115	# check if stpt has been executed
1116	clg	%r9,BASED(.Lcleanup_system_call_insn)
1117	jh	0f
1118	mvc	__LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER
1119	cghi	%r11,__LC_SAVE_AREA_ASYNC
1120	je	0f
1121	mvc	__LC_SYNC_ENTER_TIMER(8),__LC_MCCK_ENTER_TIMER
11220:	# check if stmg has been executed
1123	clg	%r9,BASED(.Lcleanup_system_call_insn+8)
1124	jh	0f
1125	mvc	__LC_SAVE_AREA_SYNC(64),0(%r11)
11260:	# check if base register setup + TIF bit load has been done
1127	clg	%r9,BASED(.Lcleanup_system_call_insn+16)
1128	jhe	0f
1129	# set up saved register r12 task struct pointer
1130	stg	%r12,32(%r11)
1131	# set up saved register r13 __TASK_thread offset
1132	mvc	40(8,%r11),BASED(.Lcleanup_system_call_const)
11330:	# check if the user time update has been done
1134	clg	%r9,BASED(.Lcleanup_system_call_insn+24)
1135	jh	0f
1136	lg	%r15,__LC_EXIT_TIMER
1137	slg	%r15,__LC_SYNC_ENTER_TIMER
1138	alg	%r15,__LC_USER_TIMER
1139	stg	%r15,__LC_USER_TIMER
11400:	# check if the system time update has been done
1141	clg	%r9,BASED(.Lcleanup_system_call_insn+32)
1142	jh	0f
1143	lg	%r15,__LC_LAST_UPDATE_TIMER
1144	slg	%r15,__LC_EXIT_TIMER
1145	alg	%r15,__LC_SYSTEM_TIMER
1146	stg	%r15,__LC_SYSTEM_TIMER
11470:	# update accounting time stamp
1148	mvc	__LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
1149	# set up saved register r11
1150	lg	%r15,__LC_KERNEL_STACK
1151	la	%r9,STACK_FRAME_OVERHEAD(%r15)
1152	stg	%r9,24(%r11)		# r11 pt_regs pointer
1153	# fill pt_regs
1154	mvc	__PT_R8(64,%r9),__LC_SAVE_AREA_SYNC
1155	stmg	%r0,%r7,__PT_R0(%r9)
1156	mvc	__PT_PSW(16,%r9),__LC_SVC_OLD_PSW
1157	mvc	__PT_INT_CODE(4,%r9),__LC_SVC_ILC
1158	xc	__PT_FLAGS(8,%r9),__PT_FLAGS(%r9)
1159	mvi	__PT_FLAGS+7(%r9),_PIF_SYSCALL
1160	# setup saved register r15
1161	stg	%r15,56(%r11)		# r15 stack pointer
1162	# set new psw address and exit
1163	larl	%r9,.Lsysc_do_svc
1164	br	%r14
1165.Lcleanup_system_call_insn:
1166	.quad	system_call
1167	.quad	.Lsysc_stmg
1168	.quad	.Lsysc_per
1169	.quad	.Lsysc_vtime+36
1170	.quad	.Lsysc_vtime+42
1171.Lcleanup_system_call_const:
1172	.quad	__TASK_thread
1173
1174.Lcleanup_sysc_tif:
1175	larl	%r9,.Lsysc_tif
1176	br	%r14
1177
1178.Lcleanup_sysc_restore:
1179	# check if stpt has been executed
1180	clg	%r9,BASED(.Lcleanup_sysc_restore_insn)
1181	jh	0f
1182	mvc	__LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
1183	cghi	%r11,__LC_SAVE_AREA_ASYNC
1184	je	0f
1185	mvc	__LC_EXIT_TIMER(8),__LC_MCCK_ENTER_TIMER
11860:	clg	%r9,BASED(.Lcleanup_sysc_restore_insn+8)
1187	je	1f
1188	lg	%r9,24(%r11)		# get saved pointer to pt_regs
1189	mvc	__LC_RETURN_PSW(16),__PT_PSW(%r9)
1190	mvc	0(64,%r11),__PT_R8(%r9)
1191	lmg	%r0,%r7,__PT_R0(%r9)
11921:	lmg	%r8,%r9,__LC_RETURN_PSW
1193	br	%r14
1194.Lcleanup_sysc_restore_insn:
1195	.quad	.Lsysc_exit_timer
1196	.quad	.Lsysc_done - 4
1197
1198.Lcleanup_io_tif:
1199	larl	%r9,.Lio_tif
1200	br	%r14
1201
1202.Lcleanup_io_restore:
1203	# check if stpt has been executed
1204	clg	%r9,BASED(.Lcleanup_io_restore_insn)
1205	jh	0f
1206	mvc	__LC_EXIT_TIMER(8),__LC_MCCK_ENTER_TIMER
12070:	clg	%r9,BASED(.Lcleanup_io_restore_insn+8)
1208	je	1f
1209	lg	%r9,24(%r11)		# get saved r11 pointer to pt_regs
1210	mvc	__LC_RETURN_PSW(16),__PT_PSW(%r9)
1211	mvc	0(64,%r11),__PT_R8(%r9)
1212	lmg	%r0,%r7,__PT_R0(%r9)
12131:	lmg	%r8,%r9,__LC_RETURN_PSW
1214	br	%r14
1215.Lcleanup_io_restore_insn:
1216	.quad	.Lio_exit_timer
1217	.quad	.Lio_done - 4
1218
1219.Lcleanup_idle:
1220	ni	__LC_CPU_FLAGS+7,255-_CIF_ENABLED_WAIT
1221	# copy interrupt clock & cpu timer
1222	mvc	__CLOCK_IDLE_EXIT(8,%r2),__LC_INT_CLOCK
1223	mvc	__TIMER_IDLE_EXIT(8,%r2),__LC_ASYNC_ENTER_TIMER
1224	cghi	%r11,__LC_SAVE_AREA_ASYNC
1225	je	0f
1226	mvc	__CLOCK_IDLE_EXIT(8,%r2),__LC_MCCK_CLOCK
1227	mvc	__TIMER_IDLE_EXIT(8,%r2),__LC_MCCK_ENTER_TIMER
12280:	# check if stck & stpt have been executed
1229	clg	%r9,BASED(.Lcleanup_idle_insn)
1230	jhe	1f
1231	mvc	__CLOCK_IDLE_ENTER(8,%r2),__CLOCK_IDLE_EXIT(%r2)
1232	mvc	__TIMER_IDLE_ENTER(8,%r2),__TIMER_IDLE_EXIT(%r2)
12331:	# calculate idle cycles
1234#ifdef CONFIG_SMP
1235	clg	%r9,BASED(.Lcleanup_idle_insn)
1236	jl	3f
1237	larl	%r1,smp_cpu_mtid
1238	llgf	%r1,0(%r1)
1239	ltgr	%r1,%r1
1240	jz	3f
1241	.insn	rsy,0xeb0000000017,%r1,5,__SF_EMPTY+80(%r15)
1242	larl	%r3,mt_cycles
1243	ag	%r3,__LC_PERCPU_OFFSET
1244	la	%r4,__SF_EMPTY+16(%r15)
12452:	lg	%r0,0(%r3)
1246	slg	%r0,0(%r4)
1247	alg	%r0,64(%r4)
1248	stg	%r0,0(%r3)
1249	la	%r3,8(%r3)
1250	la	%r4,8(%r4)
1251	brct	%r1,2b
1252#endif
12533:	# account system time going idle
1254	lg	%r9,__LC_STEAL_TIMER
1255	alg	%r9,__CLOCK_IDLE_ENTER(%r2)
1256	slg	%r9,__LC_LAST_UPDATE_CLOCK
1257	stg	%r9,__LC_STEAL_TIMER
1258	mvc	__LC_LAST_UPDATE_CLOCK(8),__CLOCK_IDLE_EXIT(%r2)
1259	lg	%r9,__LC_SYSTEM_TIMER
1260	alg	%r9,__LC_LAST_UPDATE_TIMER
1261	slg	%r9,__TIMER_IDLE_ENTER(%r2)
1262	stg	%r9,__LC_SYSTEM_TIMER
1263	mvc	__LC_LAST_UPDATE_TIMER(8),__TIMER_IDLE_EXIT(%r2)
1264	# prepare return psw
1265	nihh	%r8,0xfcfd		# clear irq & wait state bits
1266	lg	%r9,48(%r11)		# return from psw_idle
1267	br	%r14
1268.Lcleanup_idle_insn:
1269	.quad	.Lpsw_idle_lpsw
1270
1271.Lcleanup_save_fpu_regs:
1272	larl	%r9,save_fpu_regs
1273	br	%r14
1274
1275.Lcleanup_load_fpu_regs:
1276	larl	%r9,load_fpu_regs
1277	br	%r14
1278
1279/*
1280 * Integer constants
1281 */
1282	.align	8
1283.Lcritical_start:
1284	.quad	.L__critical_start
1285.Lcritical_length:
1286	.quad	.L__critical_end - .L__critical_start
1287#if IS_ENABLED(CONFIG_KVM)
1288.Lsie_critical_start:
1289	.quad	.Lsie_gmap
1290.Lsie_critical_length:
1291	.quad	.Lsie_done - .Lsie_gmap
1292#endif
1293
1294	.section .rodata, "a"
1295#define SYSCALL(esame,emu)	.long esame
1296	.globl	sys_call_table
1297sys_call_table:
1298#include "syscalls.S"
1299#undef SYSCALL
1300
1301#ifdef CONFIG_COMPAT
1302
1303#define SYSCALL(esame,emu)	.long emu
1304	.globl	sys_call_table_emu
1305sys_call_table_emu:
1306#include "syscalls.S"
1307#undef SYSCALL
1308#endif
1309