1/* 2 * arch/s390/kernel/entry.S 3 * S390 low-level entry points. 4 * 5 * Copyright (C) IBM Corp. 1999,2006 6 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com), 7 * Hartmut Penner (hp@de.ibm.com), 8 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com), 9 * Heiko Carstens <heiko.carstens@de.ibm.com> 10 */ 11 12#include <linux/sys.h> 13#include <linux/linkage.h> 14#include <linux/init.h> 15#include <asm/cache.h> 16#include <asm/errno.h> 17#include <asm/ptrace.h> 18#include <asm/thread_info.h> 19#include <asm/asm-offsets.h> 20#include <asm/unistd.h> 21#include <asm/page.h> 22 23/* 24 * Stack layout for the system_call stack entry. 25 * The first few entries are identical to the user_regs_struct. 26 */ 27SP_PTREGS = STACK_FRAME_OVERHEAD 28SP_ARGS = STACK_FRAME_OVERHEAD + __PT_ARGS 29SP_PSW = STACK_FRAME_OVERHEAD + __PT_PSW 30SP_R0 = STACK_FRAME_OVERHEAD + __PT_GPRS 31SP_R1 = STACK_FRAME_OVERHEAD + __PT_GPRS + 4 32SP_R2 = STACK_FRAME_OVERHEAD + __PT_GPRS + 8 33SP_R3 = STACK_FRAME_OVERHEAD + __PT_GPRS + 12 34SP_R4 = STACK_FRAME_OVERHEAD + __PT_GPRS + 16 35SP_R5 = STACK_FRAME_OVERHEAD + __PT_GPRS + 20 36SP_R6 = STACK_FRAME_OVERHEAD + __PT_GPRS + 24 37SP_R7 = STACK_FRAME_OVERHEAD + __PT_GPRS + 28 38SP_R8 = STACK_FRAME_OVERHEAD + __PT_GPRS + 32 39SP_R9 = STACK_FRAME_OVERHEAD + __PT_GPRS + 36 40SP_R10 = STACK_FRAME_OVERHEAD + __PT_GPRS + 40 41SP_R11 = STACK_FRAME_OVERHEAD + __PT_GPRS + 44 42SP_R12 = STACK_FRAME_OVERHEAD + __PT_GPRS + 48 43SP_R13 = STACK_FRAME_OVERHEAD + __PT_GPRS + 52 44SP_R14 = STACK_FRAME_OVERHEAD + __PT_GPRS + 56 45SP_R15 = STACK_FRAME_OVERHEAD + __PT_GPRS + 60 46SP_ORIG_R2 = STACK_FRAME_OVERHEAD + __PT_ORIG_GPR2 47SP_ILC = STACK_FRAME_OVERHEAD + __PT_ILC 48SP_SVCNR = STACK_FRAME_OVERHEAD + __PT_SVCNR 49SP_SIZE = STACK_FRAME_OVERHEAD + __PT_SIZE 50 51_TIF_WORK_SVC = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \ 52 _TIF_MCCK_PENDING | _TIF_RESTART_SVC | _TIF_SINGLE_STEP ) 53_TIF_WORK_INT = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \ 54 _TIF_MCCK_PENDING) 55_TIF_SYSCALL = (_TIF_SYSCALL_TRACE>>8 | _TIF_SYSCALL_AUDIT>>8 | \ 56 _TIF_SECCOMP>>8 | _TIF_SYSCALL_TRACEPOINT>>8) 57 58STACK_SHIFT = PAGE_SHIFT + THREAD_ORDER 59STACK_SIZE = 1 << STACK_SHIFT 60 61#define BASED(name) name-system_call(%r13) 62 63#ifdef CONFIG_TRACE_IRQFLAGS 64 .macro TRACE_IRQS_ON 65 basr %r2,%r0 66 l %r1,BASED(.Ltrace_irq_on_caller) 67 basr %r14,%r1 68 .endm 69 70 .macro TRACE_IRQS_OFF 71 basr %r2,%r0 72 l %r1,BASED(.Ltrace_irq_off_caller) 73 basr %r14,%r1 74 .endm 75 76 .macro TRACE_IRQS_CHECK_ON 77 tm SP_PSW(%r15),0x03 # irqs enabled? 78 bz BASED(0f) 79 TRACE_IRQS_ON 800: 81 .endm 82 83 .macro TRACE_IRQS_CHECK_OFF 84 tm SP_PSW(%r15),0x03 # irqs enabled? 85 bz BASED(0f) 86 TRACE_IRQS_OFF 870: 88 .endm 89#else 90#define TRACE_IRQS_ON 91#define TRACE_IRQS_OFF 92#define TRACE_IRQS_CHECK_ON 93#define TRACE_IRQS_CHECK_OFF 94#endif 95 96#ifdef CONFIG_LOCKDEP 97 .macro LOCKDEP_SYS_EXIT 98 tm SP_PSW+1(%r15),0x01 # returning to user ? 99 jz 0f 100 l %r1,BASED(.Llockdep_sys_exit) 101 basr %r14,%r1 1020: 103 .endm 104#else 105#define LOCKDEP_SYS_EXIT 106#endif 107 108/* 109 * Register usage in interrupt handlers: 110 * R9 - pointer to current task structure 111 * R13 - pointer to literal pool 112 * R14 - return register for function calls 113 * R15 - kernel stack pointer 114 */ 115 116 .macro UPDATE_VTIME lc_from,lc_to,lc_sum 117 lm %r10,%r11,\lc_from 118 sl %r10,\lc_to 119 sl %r11,\lc_to+4 120 bc 3,BASED(0f) 121 sl %r10,BASED(.Lc_1) 1220: al %r10,\lc_sum 123 al %r11,\lc_sum+4 124 bc 12,BASED(1f) 125 al %r10,BASED(.Lc_1) 1261: stm %r10,%r11,\lc_sum 127 .endm 128 129 .macro SAVE_ALL_BASE savearea 130 stm %r12,%r15,\savearea 131 l %r13,__LC_SVC_NEW_PSW+4 # load &system_call to %r13 132 .endm 133 134 .macro SAVE_ALL_SVC psworg,savearea 135 la %r12,\psworg 136 l %r15,__LC_KERNEL_STACK # problem state -> load ksp 137 .endm 138 139 .macro SAVE_ALL_SYNC psworg,savearea 140 la %r12,\psworg 141 tm \psworg+1,0x01 # test problem state bit 142 bz BASED(2f) # skip stack setup save 143 l %r15,__LC_KERNEL_STACK # problem state -> load ksp 144#ifdef CONFIG_CHECK_STACK 145 b BASED(3f) 1462: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD 147 bz BASED(stack_overflow) 1483: 149#endif 1502: 151 .endm 152 153 .macro SAVE_ALL_ASYNC psworg,savearea 154 la %r12,\psworg 155 tm \psworg+1,0x01 # test problem state bit 156 bnz BASED(1f) # from user -> load async stack 157 clc \psworg+4(4),BASED(.Lcritical_end) 158 bhe BASED(0f) 159 clc \psworg+4(4),BASED(.Lcritical_start) 160 bl BASED(0f) 161 l %r14,BASED(.Lcleanup_critical) 162 basr %r14,%r14 163 tm 1(%r12),0x01 # retest problem state after cleanup 164 bnz BASED(1f) 1650: l %r14,__LC_ASYNC_STACK # are we already on the async stack ? 166 slr %r14,%r15 167 sra %r14,STACK_SHIFT 168 be BASED(2f) 1691: l %r15,__LC_ASYNC_STACK 170#ifdef CONFIG_CHECK_STACK 171 b BASED(3f) 1722: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD 173 bz BASED(stack_overflow) 1743: 175#endif 1762: 177 .endm 178 179 .macro CREATE_STACK_FRAME psworg,savearea 180 s %r15,BASED(.Lc_spsize) # make room for registers & psw 181 mvc SP_PSW(8,%r15),0(%r12) # move user PSW to stack 182 st %r2,SP_ORIG_R2(%r15) # store original content of gpr 2 183 icm %r12,12,__LC_SVC_ILC 184 stm %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack 185 st %r12,SP_ILC(%r15) 186 mvc SP_R12(16,%r15),\savearea # move %r12-%r15 to stack 187 la %r12,0 188 st %r12,__SF_BACKCHAIN(%r15) # clear back chain 189 .endm 190 191 .macro RESTORE_ALL psworg,sync 192 mvc \psworg(8),SP_PSW(%r15) # move user PSW to lowcore 193 .if !\sync 194 ni \psworg+1,0xfd # clear wait state bit 195 .endif 196 lm %r0,%r15,SP_R0(%r15) # load gprs 0-15 of user 197 stpt __LC_EXIT_TIMER 198 lpsw \psworg # back to caller 199 .endm 200 201/* 202 * Scheduler resume function, called by switch_to 203 * gpr2 = (task_struct *) prev 204 * gpr3 = (task_struct *) next 205 * Returns: 206 * gpr2 = prev 207 */ 208 .globl __switch_to 209__switch_to: 210 basr %r1,0 211__switch_to_base: 212 tm __THREAD_per(%r3),0xe8 # new process is using per ? 213 bz __switch_to_noper-__switch_to_base(%r1) # if not we're fine 214 stctl %c9,%c11,__SF_EMPTY(%r15) # We are using per stuff 215 clc __THREAD_per(12,%r3),__SF_EMPTY(%r15) 216 be __switch_to_noper-__switch_to_base(%r1) # we got away w/o bashing TLB's 217 lctl %c9,%c11,__THREAD_per(%r3) # Nope we didn't 218__switch_to_noper: 219 l %r4,__THREAD_info(%r2) # get thread_info of prev 220 tm __TI_flags+3(%r4),_TIF_MCCK_PENDING # machine check pending? 221 bz __switch_to_no_mcck-__switch_to_base(%r1) 222 ni __TI_flags+3(%r4),255-_TIF_MCCK_PENDING # clear flag in prev 223 l %r4,__THREAD_info(%r3) # get thread_info of next 224 oi __TI_flags+3(%r4),_TIF_MCCK_PENDING # set it in next 225__switch_to_no_mcck: 226 stm %r6,%r15,__SF_GPRS(%r15)# store __switch_to registers of prev task 227 st %r15,__THREAD_ksp(%r2) # store kernel stack to prev->tss.ksp 228 l %r15,__THREAD_ksp(%r3) # load kernel stack from next->tss.ksp 229 lm %r6,%r15,__SF_GPRS(%r15)# load __switch_to registers of next task 230 st %r3,__LC_CURRENT # __LC_CURRENT = current task struct 231 lctl %c4,%c4,__TASK_pid(%r3) # load pid to control reg. 4 232 l %r3,__THREAD_info(%r3) # load thread_info from task struct 233 st %r3,__LC_THREAD_INFO 234 ahi %r3,STACK_SIZE 235 st %r3,__LC_KERNEL_STACK # __LC_KERNEL_STACK = new kernel stack 236 br %r14 237 238__critical_start: 239/* 240 * SVC interrupt handler routine. System calls are synchronous events and 241 * are executed with interrupts enabled. 242 */ 243 244 .globl system_call 245system_call: 246 stpt __LC_SYNC_ENTER_TIMER 247sysc_saveall: 248 SAVE_ALL_BASE __LC_SAVE_AREA 249 SAVE_ALL_SVC __LC_SVC_OLD_PSW,__LC_SAVE_AREA 250 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA 251 lh %r7,0x8a # get svc number from lowcore 252sysc_vtime: 253 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER 254sysc_stime: 255 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER 256sysc_update: 257 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER 258sysc_do_svc: 259 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct 260 ltr %r7,%r7 # test for svc 0 261 bnz BASED(sysc_nr_ok) # svc number > 0 262 # svc 0: system call number in %r1 263 cl %r1,BASED(.Lnr_syscalls) 264 bnl BASED(sysc_nr_ok) 265 lr %r7,%r1 # copy svc number to %r7 266sysc_nr_ok: 267 mvc SP_ARGS(4,%r15),SP_R7(%r15) 268sysc_do_restart: 269 sth %r7,SP_SVCNR(%r15) 270 sll %r7,2 # svc number *4 271 l %r8,BASED(.Lsysc_table) 272 tm __TI_flags+2(%r9),_TIF_SYSCALL 273 l %r8,0(%r7,%r8) # get system call addr. 274 bnz BASED(sysc_tracesys) 275 basr %r14,%r8 # call sys_xxxx 276 st %r2,SP_R2(%r15) # store return value (change R2 on stack) 277 278sysc_return: 279 LOCKDEP_SYS_EXIT 280sysc_tif: 281 tm __TI_flags+3(%r9),_TIF_WORK_SVC 282 bnz BASED(sysc_work) # there is work to do (signals etc.) 283sysc_restore: 284 RESTORE_ALL __LC_RETURN_PSW,1 285sysc_done: 286 287# 288# There is work to do, but first we need to check if we return to userspace. 289# 290sysc_work: 291 tm SP_PSW+1(%r15),0x01 # returning to user ? 292 bno BASED(sysc_restore) 293 294# 295# One of the work bits is on. Find out which one. 296# 297sysc_work_tif: 298 tm __TI_flags+3(%r9),_TIF_MCCK_PENDING 299 bo BASED(sysc_mcck_pending) 300 tm __TI_flags+3(%r9),_TIF_NEED_RESCHED 301 bo BASED(sysc_reschedule) 302 tm __TI_flags+3(%r9),_TIF_SIGPENDING 303 bo BASED(sysc_sigpending) 304 tm __TI_flags+3(%r9),_TIF_NOTIFY_RESUME 305 bo BASED(sysc_notify_resume) 306 tm __TI_flags+3(%r9),_TIF_RESTART_SVC 307 bo BASED(sysc_restart) 308 tm __TI_flags+3(%r9),_TIF_SINGLE_STEP 309 bo BASED(sysc_singlestep) 310 b BASED(sysc_return) # beware of critical section cleanup 311 312# 313# _TIF_NEED_RESCHED is set, call schedule 314# 315sysc_reschedule: 316 l %r1,BASED(.Lschedule) 317 la %r14,BASED(sysc_return) 318 br %r1 # call scheduler 319 320# 321# _TIF_MCCK_PENDING is set, call handler 322# 323sysc_mcck_pending: 324 l %r1,BASED(.Ls390_handle_mcck) 325 la %r14,BASED(sysc_return) 326 br %r1 # TIF bit will be cleared by handler 327 328# 329# _TIF_SIGPENDING is set, call do_signal 330# 331sysc_sigpending: 332 ni __TI_flags+3(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP 333 la %r2,SP_PTREGS(%r15) # load pt_regs 334 l %r1,BASED(.Ldo_signal) 335 basr %r14,%r1 # call do_signal 336 tm __TI_flags+3(%r9),_TIF_RESTART_SVC 337 bo BASED(sysc_restart) 338 tm __TI_flags+3(%r9),_TIF_SINGLE_STEP 339 bo BASED(sysc_singlestep) 340 b BASED(sysc_return) 341 342# 343# _TIF_NOTIFY_RESUME is set, call do_notify_resume 344# 345sysc_notify_resume: 346 la %r2,SP_PTREGS(%r15) # load pt_regs 347 l %r1,BASED(.Ldo_notify_resume) 348 la %r14,BASED(sysc_return) 349 br %r1 # call do_notify_resume 350 351 352# 353# _TIF_RESTART_SVC is set, set up registers and restart svc 354# 355sysc_restart: 356 ni __TI_flags+3(%r9),255-_TIF_RESTART_SVC # clear TIF_RESTART_SVC 357 l %r7,SP_R2(%r15) # load new svc number 358 mvc SP_R2(4,%r15),SP_ORIG_R2(%r15) # restore first argument 359 lm %r2,%r6,SP_R2(%r15) # load svc arguments 360 b BASED(sysc_do_restart) # restart svc 361 362# 363# _TIF_SINGLE_STEP is set, call do_single_step 364# 365sysc_singlestep: 366 ni __TI_flags+3(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP 367 mvi SP_SVCNR(%r15),0xff # set trap indication to pgm check 368 mvi SP_SVCNR+1(%r15),0xff 369 la %r2,SP_PTREGS(%r15) # address of register-save area 370 l %r1,BASED(.Lhandle_per) # load adr. of per handler 371 la %r14,BASED(sysc_return) # load adr. of system return 372 br %r1 # branch to do_single_step 373 374# 375# call tracehook_report_syscall_entry/tracehook_report_syscall_exit before 376# and after the system call 377# 378sysc_tracesys: 379 l %r1,BASED(.Ltrace_entry) 380 la %r2,SP_PTREGS(%r15) # load pt_regs 381 la %r3,0 382 srl %r7,2 383 st %r7,SP_R2(%r15) 384 basr %r14,%r1 385 cl %r2,BASED(.Lnr_syscalls) 386 bnl BASED(sysc_tracenogo) 387 l %r8,BASED(.Lsysc_table) 388 lr %r7,%r2 389 sll %r7,2 # svc number *4 390 l %r8,0(%r7,%r8) 391sysc_tracego: 392 lm %r3,%r6,SP_R3(%r15) 393 l %r2,SP_ORIG_R2(%r15) 394 basr %r14,%r8 # call sys_xxx 395 st %r2,SP_R2(%r15) # store return value 396sysc_tracenogo: 397 tm __TI_flags+2(%r9),_TIF_SYSCALL 398 bz BASED(sysc_return) 399 l %r1,BASED(.Ltrace_exit) 400 la %r2,SP_PTREGS(%r15) # load pt_regs 401 la %r14,BASED(sysc_return) 402 br %r1 403 404# 405# a new process exits the kernel with ret_from_fork 406# 407 .globl ret_from_fork 408ret_from_fork: 409 l %r13,__LC_SVC_NEW_PSW+4 410 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct 411 tm SP_PSW+1(%r15),0x01 # forking a kernel thread ? 412 bo BASED(0f) 413 st %r15,SP_R15(%r15) # store stack pointer for new kthread 4140: l %r1,BASED(.Lschedtail) 415 basr %r14,%r1 416 TRACE_IRQS_ON 417 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts 418 b BASED(sysc_tracenogo) 419 420# 421# kernel_execve function needs to deal with pt_regs that is not 422# at the usual place 423# 424 .globl kernel_execve 425kernel_execve: 426 stm %r12,%r15,48(%r15) 427 lr %r14,%r15 428 l %r13,__LC_SVC_NEW_PSW+4 429 s %r15,BASED(.Lc_spsize) 430 st %r14,__SF_BACKCHAIN(%r15) 431 la %r12,SP_PTREGS(%r15) 432 xc 0(__PT_SIZE,%r12),0(%r12) 433 l %r1,BASED(.Ldo_execve) 434 lr %r5,%r12 435 basr %r14,%r1 436 ltr %r2,%r2 437 be BASED(0f) 438 a %r15,BASED(.Lc_spsize) 439 lm %r12,%r15,48(%r15) 440 br %r14 441 # execve succeeded. 4420: stnsm __SF_EMPTY(%r15),0xfc # disable interrupts 443 TRACE_IRQS_OFF 444 l %r15,__LC_KERNEL_STACK # load ksp 445 s %r15,BASED(.Lc_spsize) # make room for registers & psw 446 l %r9,__LC_THREAD_INFO 447 mvc SP_PTREGS(__PT_SIZE,%r15),0(%r12) # copy pt_regs 448 xc __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15) 449 TRACE_IRQS_ON 450 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts 451 l %r1,BASED(.Lexecve_tail) 452 basr %r14,%r1 453 b BASED(sysc_return) 454 455/* 456 * Program check handler routine 457 */ 458 459 .globl pgm_check_handler 460pgm_check_handler: 461/* 462 * First we need to check for a special case: 463 * Single stepping an instruction that disables the PER event mask will 464 * cause a PER event AFTER the mask has been set. Example: SVC or LPSW. 465 * For a single stepped SVC the program check handler gets control after 466 * the SVC new PSW has been loaded. But we want to execute the SVC first and 467 * then handle the PER event. Therefore we update the SVC old PSW to point 468 * to the pgm_check_handler and branch to the SVC handler after we checked 469 * if we have to load the kernel stack register. 470 * For every other possible cause for PER event without the PER mask set 471 * we just ignore the PER event (FIXME: is there anything we have to do 472 * for LPSW?). 473 */ 474 stpt __LC_SYNC_ENTER_TIMER 475 SAVE_ALL_BASE __LC_SAVE_AREA 476 tm __LC_PGM_INT_CODE+1,0x80 # check whether we got a per exception 477 bnz BASED(pgm_per) # got per exception -> special case 478 SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA 479 CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA 480 tm SP_PSW+1(%r15),0x01 # interrupting from user ? 481 bz BASED(pgm_no_vtime) 482 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER 483 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER 484 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER 485pgm_no_vtime: 486 TRACE_IRQS_CHECK_OFF 487 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct 488 l %r3,__LC_PGM_ILC # load program interruption code 489 la %r8,0x7f 490 nr %r8,%r3 491pgm_do_call: 492 l %r7,BASED(.Ljump_table) 493 sll %r8,2 494 l %r7,0(%r8,%r7) # load address of handler routine 495 la %r2,SP_PTREGS(%r15) # address of register-save area 496 basr %r14,%r7 # branch to interrupt-handler 497pgm_exit: 498 TRACE_IRQS_CHECK_ON 499 b BASED(sysc_return) 500 501# 502# handle per exception 503# 504pgm_per: 505 tm __LC_PGM_OLD_PSW,0x40 # test if per event recording is on 506 bnz BASED(pgm_per_std) # ok, normal per event from user space 507# ok its one of the special cases, now we need to find out which one 508 clc __LC_PGM_OLD_PSW(8),__LC_SVC_NEW_PSW 509 be BASED(pgm_svcper) 510# no interesting special case, ignore PER event 511 lm %r12,%r15,__LC_SAVE_AREA 512 lpsw 0x28 513 514# 515# Normal per exception 516# 517pgm_per_std: 518 SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA 519 CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA 520 tm SP_PSW+1(%r15),0x01 # interrupting from user ? 521 bz BASED(pgm_no_vtime2) 522 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER 523 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER 524 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER 525pgm_no_vtime2: 526 TRACE_IRQS_CHECK_OFF 527 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct 528 l %r1,__TI_task(%r9) 529 tm SP_PSW+1(%r15),0x01 # kernel per event ? 530 bz BASED(kernel_per) 531 mvc __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID 532 mvc __THREAD_per+__PER_address(4,%r1),__LC_PER_ADDRESS 533 mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID 534 oi __TI_flags+3(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP 535 l %r3,__LC_PGM_ILC # load program interruption code 536 la %r8,0x7f 537 nr %r8,%r3 # clear per-event-bit and ilc 538 be BASED(pgm_exit2) # only per or per+check ? 539 l %r7,BASED(.Ljump_table) 540 sll %r8,2 541 l %r7,0(%r8,%r7) # load address of handler routine 542 la %r2,SP_PTREGS(%r15) # address of register-save area 543 basr %r14,%r7 # branch to interrupt-handler 544pgm_exit2: 545 TRACE_IRQS_ON 546 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts 547 b BASED(sysc_return) 548 549# 550# it was a single stepped SVC that is causing all the trouble 551# 552pgm_svcper: 553 SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA 554 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA 555 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER 556 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER 557 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER 558 lh %r7,0x8a # get svc number from lowcore 559 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct 560 TRACE_IRQS_OFF 561 l %r8,__TI_task(%r9) 562 mvc __THREAD_per+__PER_atmid(2,%r8),__LC_PER_ATMID 563 mvc __THREAD_per+__PER_address(4,%r8),__LC_PER_ADDRESS 564 mvc __THREAD_per+__PER_access_id(1,%r8),__LC_PER_ACCESS_ID 565 oi __TI_flags+3(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP 566 TRACE_IRQS_ON 567 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts 568 lm %r2,%r6,SP_R2(%r15) # load svc arguments 569 b BASED(sysc_do_svc) 570 571# 572# per was called from kernel, must be kprobes 573# 574kernel_per: 575 mvi SP_SVCNR(%r15),0xff # set trap indication to pgm check 576 mvi SP_SVCNR+1(%r15),0xff 577 la %r2,SP_PTREGS(%r15) # address of register-save area 578 l %r1,BASED(.Lhandle_per) # load adr. of per handler 579 basr %r14,%r1 # branch to do_single_step 580 b BASED(pgm_exit) 581 582/* 583 * IO interrupt handler routine 584 */ 585 586 .globl io_int_handler 587io_int_handler: 588 stck __LC_INT_CLOCK 589 stpt __LC_ASYNC_ENTER_TIMER 590 SAVE_ALL_BASE __LC_SAVE_AREA+16 591 SAVE_ALL_ASYNC __LC_IO_OLD_PSW,__LC_SAVE_AREA+16 592 CREATE_STACK_FRAME __LC_IO_OLD_PSW,__LC_SAVE_AREA+16 593 tm SP_PSW+1(%r15),0x01 # interrupting from user ? 594 bz BASED(io_no_vtime) 595 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER 596 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER 597 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER 598io_no_vtime: 599 TRACE_IRQS_OFF 600 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct 601 l %r1,BASED(.Ldo_IRQ) # load address of do_IRQ 602 la %r2,SP_PTREGS(%r15) # address of register-save area 603 basr %r14,%r1 # branch to standard irq handler 604io_return: 605 LOCKDEP_SYS_EXIT 606 TRACE_IRQS_ON 607io_tif: 608 tm __TI_flags+3(%r9),_TIF_WORK_INT 609 bnz BASED(io_work) # there is work to do (signals etc.) 610io_restore: 611 RESTORE_ALL __LC_RETURN_PSW,0 612io_done: 613 614# 615# There is work todo, find out in which context we have been interrupted: 616# 1) if we return to user space we can do all _TIF_WORK_INT work 617# 2) if we return to kernel code and preemptive scheduling is enabled check 618# the preemption counter and if it is zero call preempt_schedule_irq 619# Before any work can be done, a switch to the kernel stack is required. 620# 621io_work: 622 tm SP_PSW+1(%r15),0x01 # returning to user ? 623 bo BASED(io_work_user) # yes -> do resched & signal 624#ifdef CONFIG_PREEMPT 625 # check for preemptive scheduling 626 icm %r0,15,__TI_precount(%r9) 627 bnz BASED(io_restore) # preemption disabled 628 tm __TI_flags+3(%r9),_TIF_NEED_RESCHED 629 bno BASED(io_restore) 630 # switch to kernel stack 631 l %r1,SP_R15(%r15) 632 s %r1,BASED(.Lc_spsize) 633 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15) 634 xc __SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1) # clear back chain 635 lr %r15,%r1 636 # TRACE_IRQS_ON already done at io_return, call 637 # TRACE_IRQS_OFF to keep things symmetrical 638 TRACE_IRQS_OFF 639 l %r1,BASED(.Lpreempt_schedule_irq) 640 basr %r14,%r1 # call preempt_schedule_irq 641 b BASED(io_return) 642#else 643 b BASED(io_restore) 644#endif 645 646# 647# Need to do work before returning to userspace, switch to kernel stack 648# 649io_work_user: 650 l %r1,__LC_KERNEL_STACK 651 s %r1,BASED(.Lc_spsize) 652 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15) 653 xc __SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1) # clear back chain 654 lr %r15,%r1 655 656# 657# One of the work bits is on. Find out which one. 658# Checked are: _TIF_SIGPENDING, _TIF_NOTIFY_RESUME, _TIF_NEED_RESCHED 659# and _TIF_MCCK_PENDING 660# 661io_work_tif: 662 tm __TI_flags+3(%r9),_TIF_MCCK_PENDING 663 bo BASED(io_mcck_pending) 664 tm __TI_flags+3(%r9),_TIF_NEED_RESCHED 665 bo BASED(io_reschedule) 666 tm __TI_flags+3(%r9),_TIF_SIGPENDING 667 bo BASED(io_sigpending) 668 tm __TI_flags+3(%r9),_TIF_NOTIFY_RESUME 669 bo BASED(io_notify_resume) 670 b BASED(io_return) # beware of critical section cleanup 671 672# 673# _TIF_MCCK_PENDING is set, call handler 674# 675io_mcck_pending: 676 # TRACE_IRQS_ON already done at io_return 677 l %r1,BASED(.Ls390_handle_mcck) 678 basr %r14,%r1 # TIF bit will be cleared by handler 679 TRACE_IRQS_OFF 680 b BASED(io_return) 681 682# 683# _TIF_NEED_RESCHED is set, call schedule 684# 685io_reschedule: 686 # TRACE_IRQS_ON already done at io_return 687 l %r1,BASED(.Lschedule) 688 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts 689 basr %r14,%r1 # call scheduler 690 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts 691 TRACE_IRQS_OFF 692 b BASED(io_return) 693 694# 695# _TIF_SIGPENDING is set, call do_signal 696# 697io_sigpending: 698 # TRACE_IRQS_ON already done at io_return 699 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts 700 la %r2,SP_PTREGS(%r15) # load pt_regs 701 l %r1,BASED(.Ldo_signal) 702 basr %r14,%r1 # call do_signal 703 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts 704 TRACE_IRQS_OFF 705 b BASED(io_return) 706 707# 708# _TIF_SIGPENDING is set, call do_signal 709# 710io_notify_resume: 711 # TRACE_IRQS_ON already done at io_return 712 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts 713 la %r2,SP_PTREGS(%r15) # load pt_regs 714 l %r1,BASED(.Ldo_notify_resume) 715 basr %r14,%r1 # call do_signal 716 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts 717 TRACE_IRQS_OFF 718 b BASED(io_return) 719 720/* 721 * External interrupt handler routine 722 */ 723 724 .globl ext_int_handler 725ext_int_handler: 726 stck __LC_INT_CLOCK 727 stpt __LC_ASYNC_ENTER_TIMER 728 SAVE_ALL_BASE __LC_SAVE_AREA+16 729 SAVE_ALL_ASYNC __LC_EXT_OLD_PSW,__LC_SAVE_AREA+16 730 CREATE_STACK_FRAME __LC_EXT_OLD_PSW,__LC_SAVE_AREA+16 731 tm SP_PSW+1(%r15),0x01 # interrupting from user ? 732 bz BASED(ext_no_vtime) 733 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER 734 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER 735 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER 736ext_no_vtime: 737 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct 738 TRACE_IRQS_OFF 739 la %r2,SP_PTREGS(%r15) # address of register-save area 740 lh %r3,__LC_EXT_INT_CODE # get interruption code 741 l %r1,BASED(.Ldo_extint) 742 basr %r14,%r1 743 b BASED(io_return) 744 745__critical_end: 746 747/* 748 * Machine check handler routines 749 */ 750 751 .globl mcck_int_handler 752mcck_int_handler: 753 stck __LC_MCCK_CLOCK 754 spt __LC_CPU_TIMER_SAVE_AREA # revalidate cpu timer 755 lm %r0,%r15,__LC_GPREGS_SAVE_AREA # revalidate gprs 756 SAVE_ALL_BASE __LC_SAVE_AREA+32 757 la %r12,__LC_MCK_OLD_PSW 758 tm __LC_MCCK_CODE,0x80 # system damage? 759 bo BASED(mcck_int_main) # yes -> rest of mcck code invalid 760 mvc __LC_MCCK_ENTER_TIMER(8),__LC_CPU_TIMER_SAVE_AREA 761 tm __LC_MCCK_CODE+5,0x02 # stored cpu timer value valid? 762 bo BASED(1f) 763 la %r14,__LC_SYNC_ENTER_TIMER 764 clc 0(8,%r14),__LC_ASYNC_ENTER_TIMER 765 bl BASED(0f) 766 la %r14,__LC_ASYNC_ENTER_TIMER 7670: clc 0(8,%r14),__LC_EXIT_TIMER 768 bl BASED(0f) 769 la %r14,__LC_EXIT_TIMER 7700: clc 0(8,%r14),__LC_LAST_UPDATE_TIMER 771 bl BASED(0f) 772 la %r14,__LC_LAST_UPDATE_TIMER 7730: spt 0(%r14) 774 mvc __LC_MCCK_ENTER_TIMER(8),0(%r14) 7751: tm __LC_MCCK_CODE+2,0x09 # mwp + ia of old psw valid? 776 bno BASED(mcck_int_main) # no -> skip cleanup critical 777 tm __LC_MCK_OLD_PSW+1,0x01 # test problem state bit 778 bnz BASED(mcck_int_main) # from user -> load async stack 779 clc __LC_MCK_OLD_PSW+4(4),BASED(.Lcritical_end) 780 bhe BASED(mcck_int_main) 781 clc __LC_MCK_OLD_PSW+4(4),BASED(.Lcritical_start) 782 bl BASED(mcck_int_main) 783 l %r14,BASED(.Lcleanup_critical) 784 basr %r14,%r14 785mcck_int_main: 786 l %r14,__LC_PANIC_STACK # are we already on the panic stack? 787 slr %r14,%r15 788 sra %r14,PAGE_SHIFT 789 be BASED(0f) 790 l %r15,__LC_PANIC_STACK # load panic stack 7910: CREATE_STACK_FRAME __LC_MCK_OLD_PSW,__LC_SAVE_AREA+32 792 tm __LC_MCCK_CODE+2,0x08 # mwp of old psw valid? 793 bno BASED(mcck_no_vtime) # no -> skip cleanup critical 794 tm SP_PSW+1(%r15),0x01 # interrupting from user ? 795 bz BASED(mcck_no_vtime) 796 UPDATE_VTIME __LC_EXIT_TIMER,__LC_MCCK_ENTER_TIMER,__LC_USER_TIMER 797 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER 798 mvc __LC_LAST_UPDATE_TIMER(8),__LC_MCCK_ENTER_TIMER 799mcck_no_vtime: 800 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct 801 la %r2,SP_PTREGS(%r15) # load pt_regs 802 l %r1,BASED(.Ls390_mcck) 803 basr %r14,%r1 # call machine check handler 804 tm SP_PSW+1(%r15),0x01 # returning to user ? 805 bno BASED(mcck_return) 806 l %r1,__LC_KERNEL_STACK # switch to kernel stack 807 s %r1,BASED(.Lc_spsize) 808 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15) 809 xc __SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1) # clear back chain 810 lr %r15,%r1 811 stosm __SF_EMPTY(%r15),0x04 # turn dat on 812 tm __TI_flags+3(%r9),_TIF_MCCK_PENDING 813 bno BASED(mcck_return) 814 TRACE_IRQS_OFF 815 l %r1,BASED(.Ls390_handle_mcck) 816 basr %r14,%r1 # call machine check handler 817 TRACE_IRQS_ON 818mcck_return: 819 mvc __LC_RETURN_MCCK_PSW(8),SP_PSW(%r15) # move return PSW 820 ni __LC_RETURN_MCCK_PSW+1,0xfd # clear wait state bit 821 tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ? 822 bno BASED(0f) 823 lm %r0,%r15,SP_R0(%r15) # load gprs 0-15 824 stpt __LC_EXIT_TIMER 825 lpsw __LC_RETURN_MCCK_PSW # back to caller 8260: lm %r0,%r15,SP_R0(%r15) # load gprs 0-15 827 lpsw __LC_RETURN_MCCK_PSW # back to caller 828 829 RESTORE_ALL __LC_RETURN_MCCK_PSW,0 830 831/* 832 * Restart interruption handler, kick starter for additional CPUs 833 */ 834#ifdef CONFIG_SMP 835 __CPUINIT 836 .globl restart_int_handler 837restart_int_handler: 838 basr %r1,0 839restart_base: 840 spt restart_vtime-restart_base(%r1) 841 stck __LC_LAST_UPDATE_CLOCK 842 mvc __LC_LAST_UPDATE_TIMER(8),restart_vtime-restart_base(%r1) 843 mvc __LC_EXIT_TIMER(8),restart_vtime-restart_base(%r1) 844 l %r15,__LC_SAVE_AREA+60 # load ksp 845 lctl %c0,%c15,__LC_CREGS_SAVE_AREA # get new ctl regs 846 lam %a0,%a15,__LC_AREGS_SAVE_AREA 847 lm %r6,%r15,__SF_GPRS(%r15) # load registers from clone 848 l %r1,__LC_THREAD_INFO 849 mvc __LC_USER_TIMER(8),__TI_user_timer(%r1) 850 mvc __LC_SYSTEM_TIMER(8),__TI_system_timer(%r1) 851 xc __LC_STEAL_TIMER(8),__LC_STEAL_TIMER 852 stosm __SF_EMPTY(%r15),0x04 # now we can turn dat on 853 basr %r14,0 854 l %r14,restart_addr-.(%r14) 855 br %r14 # branch to start_secondary 856restart_addr: 857 .long start_secondary 858 .align 8 859restart_vtime: 860 .long 0x7fffffff,0xffffffff 861 .previous 862#else 863/* 864 * If we do not run with SMP enabled, let the new CPU crash ... 865 */ 866 .globl restart_int_handler 867restart_int_handler: 868 basr %r1,0 869restart_base: 870 lpsw restart_crash-restart_base(%r1) 871 .align 8 872restart_crash: 873 .long 0x000a0000,0x00000000 874restart_go: 875#endif 876 877#ifdef CONFIG_CHECK_STACK 878/* 879 * The synchronous or the asynchronous stack overflowed. We are dead. 880 * No need to properly save the registers, we are going to panic anyway. 881 * Setup a pt_regs so that show_trace can provide a good call trace. 882 */ 883stack_overflow: 884 l %r15,__LC_PANIC_STACK # change to panic stack 885 sl %r15,BASED(.Lc_spsize) 886 mvc SP_PSW(8,%r15),0(%r12) # move user PSW to stack 887 stm %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack 888 la %r1,__LC_SAVE_AREA 889 ch %r12,BASED(.L0x020) # old psw addr == __LC_SVC_OLD_PSW ? 890 be BASED(0f) 891 ch %r12,BASED(.L0x028) # old psw addr == __LC_PGM_OLD_PSW ? 892 be BASED(0f) 893 la %r1,__LC_SAVE_AREA+16 8940: mvc SP_R12(16,%r15),0(%r1) # move %r12-%r15 to stack 895 xc __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15) # clear back chain 896 l %r1,BASED(1f) # branch to kernel_stack_overflow 897 la %r2,SP_PTREGS(%r15) # load pt_regs 898 br %r1 8991: .long kernel_stack_overflow 900#endif 901 902cleanup_table_system_call: 903 .long system_call + 0x80000000, sysc_do_svc + 0x80000000 904cleanup_table_sysc_tif: 905 .long sysc_tif + 0x80000000, sysc_restore + 0x80000000 906cleanup_table_sysc_restore: 907 .long sysc_restore + 0x80000000, sysc_done + 0x80000000 908cleanup_table_io_tif: 909 .long io_tif + 0x80000000, io_restore + 0x80000000 910cleanup_table_io_restore: 911 .long io_restore + 0x80000000, io_done + 0x80000000 912 913cleanup_critical: 914 clc 4(4,%r12),BASED(cleanup_table_system_call) 915 bl BASED(0f) 916 clc 4(4,%r12),BASED(cleanup_table_system_call+4) 917 bl BASED(cleanup_system_call) 9180: 919 clc 4(4,%r12),BASED(cleanup_table_sysc_tif) 920 bl BASED(0f) 921 clc 4(4,%r12),BASED(cleanup_table_sysc_tif+4) 922 bl BASED(cleanup_sysc_tif) 9230: 924 clc 4(4,%r12),BASED(cleanup_table_sysc_restore) 925 bl BASED(0f) 926 clc 4(4,%r12),BASED(cleanup_table_sysc_restore+4) 927 bl BASED(cleanup_sysc_restore) 9280: 929 clc 4(4,%r12),BASED(cleanup_table_io_tif) 930 bl BASED(0f) 931 clc 4(4,%r12),BASED(cleanup_table_io_tif+4) 932 bl BASED(cleanup_io_tif) 9330: 934 clc 4(4,%r12),BASED(cleanup_table_io_restore) 935 bl BASED(0f) 936 clc 4(4,%r12),BASED(cleanup_table_io_restore+4) 937 bl BASED(cleanup_io_restore) 9380: 939 br %r14 940 941cleanup_system_call: 942 mvc __LC_RETURN_PSW(8),0(%r12) 943 clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+4) 944 bh BASED(0f) 945 mvc __LC_SYNC_ENTER_TIMER(8),__LC_MCCK_ENTER_TIMER 946 c %r12,BASED(.Lmck_old_psw) 947 be BASED(0f) 948 mvc __LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER 9490: c %r12,BASED(.Lmck_old_psw) 950 la %r12,__LC_SAVE_AREA+32 951 be BASED(0f) 952 la %r12,__LC_SAVE_AREA+16 9530: clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+8) 954 bhe BASED(cleanup_vtime) 955 clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn) 956 bh BASED(0f) 957 mvc __LC_SAVE_AREA(16),0(%r12) 9580: st %r13,4(%r12) 959 st %r12,__LC_SAVE_AREA+48 # argh 960 SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA 961 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA 962 l %r12,__LC_SAVE_AREA+48 # argh 963 st %r15,12(%r12) 964 lh %r7,0x8a 965cleanup_vtime: 966 clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+12) 967 bhe BASED(cleanup_stime) 968 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER 969cleanup_stime: 970 clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+16) 971 bh BASED(cleanup_update) 972 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER 973cleanup_update: 974 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER 975 mvc __LC_RETURN_PSW+4(4),BASED(cleanup_table_system_call+4) 976 la %r12,__LC_RETURN_PSW 977 br %r14 978cleanup_system_call_insn: 979 .long sysc_saveall + 0x80000000 980 .long system_call + 0x80000000 981 .long sysc_vtime + 0x80000000 982 .long sysc_stime + 0x80000000 983 .long sysc_update + 0x80000000 984 985cleanup_sysc_tif: 986 mvc __LC_RETURN_PSW(4),0(%r12) 987 mvc __LC_RETURN_PSW+4(4),BASED(cleanup_table_sysc_tif) 988 la %r12,__LC_RETURN_PSW 989 br %r14 990 991cleanup_sysc_restore: 992 clc 4(4,%r12),BASED(cleanup_sysc_restore_insn) 993 be BASED(2f) 994 mvc __LC_EXIT_TIMER(8),__LC_MCCK_ENTER_TIMER 995 c %r12,BASED(.Lmck_old_psw) 996 be BASED(0f) 997 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER 9980: clc 4(4,%r12),BASED(cleanup_sysc_restore_insn+4) 999 be BASED(2f) 1000 mvc __LC_RETURN_PSW(8),SP_PSW(%r15) 1001 c %r12,BASED(.Lmck_old_psw) 1002 la %r12,__LC_SAVE_AREA+32 1003 be BASED(1f) 1004 la %r12,__LC_SAVE_AREA+16 10051: mvc 0(16,%r12),SP_R12(%r15) 1006 lm %r0,%r11,SP_R0(%r15) 1007 l %r15,SP_R15(%r15) 10082: la %r12,__LC_RETURN_PSW 1009 br %r14 1010cleanup_sysc_restore_insn: 1011 .long sysc_done - 4 + 0x80000000 1012 .long sysc_done - 8 + 0x80000000 1013 1014cleanup_io_tif: 1015 mvc __LC_RETURN_PSW(4),0(%r12) 1016 mvc __LC_RETURN_PSW+4(4),BASED(cleanup_table_io_tif) 1017 la %r12,__LC_RETURN_PSW 1018 br %r14 1019 1020cleanup_io_restore: 1021 clc 4(4,%r12),BASED(cleanup_io_restore_insn) 1022 be BASED(1f) 1023 mvc __LC_EXIT_TIMER(8),__LC_MCCK_ENTER_TIMER 1024 clc 4(4,%r12),BASED(cleanup_io_restore_insn+4) 1025 be BASED(1f) 1026 mvc __LC_RETURN_PSW(8),SP_PSW(%r15) 1027 mvc __LC_SAVE_AREA+32(16),SP_R12(%r15) 1028 lm %r0,%r11,SP_R0(%r15) 1029 l %r15,SP_R15(%r15) 10301: la %r12,__LC_RETURN_PSW 1031 br %r14 1032cleanup_io_restore_insn: 1033 .long io_done - 4 + 0x80000000 1034 .long io_done - 8 + 0x80000000 1035 1036/* 1037 * Integer constants 1038 */ 1039 .align 4 1040.Lc_spsize: .long SP_SIZE 1041.Lc_overhead: .long STACK_FRAME_OVERHEAD 1042.Lnr_syscalls: .long NR_syscalls 1043.L0x018: .short 0x018 1044.L0x020: .short 0x020 1045.L0x028: .short 0x028 1046.L0x030: .short 0x030 1047.L0x038: .short 0x038 1048.Lc_1: .long 1 1049 1050/* 1051 * Symbol constants 1052 */ 1053.Ls390_mcck: .long s390_do_machine_check 1054.Ls390_handle_mcck: 1055 .long s390_handle_mcck 1056.Lmck_old_psw: .long __LC_MCK_OLD_PSW 1057.Ldo_IRQ: .long do_IRQ 1058.Ldo_extint: .long do_extint 1059.Ldo_signal: .long do_signal 1060.Ldo_notify_resume: 1061 .long do_notify_resume 1062.Lhandle_per: .long do_single_step 1063.Ldo_execve: .long do_execve 1064.Lexecve_tail: .long execve_tail 1065.Ljump_table: .long pgm_check_table 1066.Lschedule: .long schedule 1067#ifdef CONFIG_PREEMPT 1068.Lpreempt_schedule_irq: 1069 .long preempt_schedule_irq 1070#endif 1071.Ltrace_entry: .long do_syscall_trace_enter 1072.Ltrace_exit: .long do_syscall_trace_exit 1073.Lschedtail: .long schedule_tail 1074.Lsysc_table: .long sys_call_table 1075#ifdef CONFIG_TRACE_IRQFLAGS 1076.Ltrace_irq_on_caller: 1077 .long trace_hardirqs_on_caller 1078.Ltrace_irq_off_caller: 1079 .long trace_hardirqs_off_caller 1080#endif 1081#ifdef CONFIG_LOCKDEP 1082.Llockdep_sys_exit: 1083 .long lockdep_sys_exit 1084#endif 1085.Lcritical_start: 1086 .long __critical_start + 0x80000000 1087.Lcritical_end: 1088 .long __critical_end + 0x80000000 1089.Lcleanup_critical: 1090 .long cleanup_critical 1091 1092 .section .rodata, "a" 1093#define SYSCALL(esa,esame,emu) .long esa 1094 .globl sys_call_table 1095sys_call_table: 1096#include "syscalls.S" 1097#undef SYSCALL 1098