xref: /linux/arch/s390/kernel/entry.S (revision cb299ba8b5ef2239429484072fea394cd7581bd7)
1/*
2 *  arch/s390/kernel/entry.S
3 *    S390 low-level entry points.
4 *
5 *    Copyright (C) IBM Corp. 1999,2006
6 *    Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
7 *		 Hartmut Penner (hp@de.ibm.com),
8 *		 Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
9 *		 Heiko Carstens <heiko.carstens@de.ibm.com>
10 */
11
12#include <linux/sys.h>
13#include <linux/linkage.h>
14#include <linux/init.h>
15#include <asm/cache.h>
16#include <asm/errno.h>
17#include <asm/ptrace.h>
18#include <asm/thread_info.h>
19#include <asm/asm-offsets.h>
20#include <asm/unistd.h>
21#include <asm/page.h>
22
23/*
24 * Stack layout for the system_call stack entry.
25 * The first few entries are identical to the user_regs_struct.
26 */
27SP_PTREGS    =	STACK_FRAME_OVERHEAD
28SP_ARGS      =	STACK_FRAME_OVERHEAD + __PT_ARGS
29SP_PSW	     =	STACK_FRAME_OVERHEAD + __PT_PSW
30SP_R0	     =	STACK_FRAME_OVERHEAD + __PT_GPRS
31SP_R1	     =	STACK_FRAME_OVERHEAD + __PT_GPRS + 4
32SP_R2	     =	STACK_FRAME_OVERHEAD + __PT_GPRS + 8
33SP_R3	     =	STACK_FRAME_OVERHEAD + __PT_GPRS + 12
34SP_R4	     =	STACK_FRAME_OVERHEAD + __PT_GPRS + 16
35SP_R5	     =	STACK_FRAME_OVERHEAD + __PT_GPRS + 20
36SP_R6	     =	STACK_FRAME_OVERHEAD + __PT_GPRS + 24
37SP_R7	     =	STACK_FRAME_OVERHEAD + __PT_GPRS + 28
38SP_R8	     =	STACK_FRAME_OVERHEAD + __PT_GPRS + 32
39SP_R9	     =	STACK_FRAME_OVERHEAD + __PT_GPRS + 36
40SP_R10	     =	STACK_FRAME_OVERHEAD + __PT_GPRS + 40
41SP_R11	     =	STACK_FRAME_OVERHEAD + __PT_GPRS + 44
42SP_R12	     =	STACK_FRAME_OVERHEAD + __PT_GPRS + 48
43SP_R13	     =	STACK_FRAME_OVERHEAD + __PT_GPRS + 52
44SP_R14	     =	STACK_FRAME_OVERHEAD + __PT_GPRS + 56
45SP_R15	     =	STACK_FRAME_OVERHEAD + __PT_GPRS + 60
46SP_ORIG_R2   =	STACK_FRAME_OVERHEAD + __PT_ORIG_GPR2
47SP_ILC	     =	STACK_FRAME_OVERHEAD + __PT_ILC
48SP_SVCNR     =	STACK_FRAME_OVERHEAD + __PT_SVCNR
49SP_SIZE      =	STACK_FRAME_OVERHEAD + __PT_SIZE
50
51_TIF_WORK_SVC = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \
52		 _TIF_MCCK_PENDING | _TIF_RESTART_SVC | _TIF_SINGLE_STEP )
53_TIF_WORK_INT = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \
54		 _TIF_MCCK_PENDING)
55_TIF_SYSCALL = (_TIF_SYSCALL_TRACE>>8 | _TIF_SYSCALL_AUDIT>>8 | \
56		_TIF_SECCOMP>>8 | _TIF_SYSCALL_TRACEPOINT>>8)
57
58STACK_SHIFT = PAGE_SHIFT + THREAD_ORDER
59STACK_SIZE  = 1 << STACK_SHIFT
60
61#define BASED(name) name-system_call(%r13)
62
63#ifdef CONFIG_TRACE_IRQFLAGS
64	.macro	TRACE_IRQS_ON
65	basr	%r2,%r0
66	l	%r1,BASED(.Ltrace_irq_on_caller)
67	basr	%r14,%r1
68	.endm
69
70	.macro	TRACE_IRQS_OFF
71	basr	%r2,%r0
72	l	%r1,BASED(.Ltrace_irq_off_caller)
73	basr	%r14,%r1
74	.endm
75#else
76#define TRACE_IRQS_ON
77#define TRACE_IRQS_OFF
78#endif
79
80#ifdef CONFIG_LOCKDEP
81	.macro	LOCKDEP_SYS_EXIT
82	tm	SP_PSW+1(%r15),0x01	# returning to user ?
83	jz	0f
84	l	%r1,BASED(.Llockdep_sys_exit)
85	basr	%r14,%r1
860:
87	.endm
88#else
89#define LOCKDEP_SYS_EXIT
90#endif
91
92/*
93 * Register usage in interrupt handlers:
94 *    R9  - pointer to current task structure
95 *    R13 - pointer to literal pool
96 *    R14 - return register for function calls
97 *    R15 - kernel stack pointer
98 */
99
100	.macro	UPDATE_VTIME lc_from,lc_to,lc_sum
101	lm	%r10,%r11,\lc_from
102	sl	%r10,\lc_to
103	sl	%r11,\lc_to+4
104	bc	3,BASED(0f)
105	sl	%r10,BASED(.Lc_1)
1060:	al	%r10,\lc_sum
107	al	%r11,\lc_sum+4
108	bc	12,BASED(1f)
109	al	%r10,BASED(.Lc_1)
1101:	stm	%r10,%r11,\lc_sum
111	.endm
112
113	.macro	SAVE_ALL_BASE savearea
114	stm	%r12,%r15,\savearea
115	l	%r13,__LC_SVC_NEW_PSW+4	# load &system_call to %r13
116	.endm
117
118	.macro	SAVE_ALL_SVC psworg,savearea
119	la	%r12,\psworg
120	l	%r15,__LC_KERNEL_STACK	# problem state -> load ksp
121	.endm
122
123	.macro	SAVE_ALL_SYNC psworg,savearea
124	la	%r12,\psworg
125	tm	\psworg+1,0x01		# test problem state bit
126	bz	BASED(2f)		# skip stack setup save
127	l	%r15,__LC_KERNEL_STACK	# problem state -> load ksp
128#ifdef CONFIG_CHECK_STACK
129	b	BASED(3f)
1302:	tml	%r15,STACK_SIZE - CONFIG_STACK_GUARD
131	bz	BASED(stack_overflow)
1323:
133#endif
1342:
135	.endm
136
137	.macro	SAVE_ALL_ASYNC psworg,savearea
138	la	%r12,\psworg
139	tm	\psworg+1,0x01		# test problem state bit
140	bnz	BASED(1f)		# from user -> load async stack
141	clc	\psworg+4(4),BASED(.Lcritical_end)
142	bhe	BASED(0f)
143	clc	\psworg+4(4),BASED(.Lcritical_start)
144	bl	BASED(0f)
145	l	%r14,BASED(.Lcleanup_critical)
146	basr	%r14,%r14
147	tm	1(%r12),0x01		# retest problem state after cleanup
148	bnz	BASED(1f)
1490:	l	%r14,__LC_ASYNC_STACK	# are we already on the async stack ?
150	slr	%r14,%r15
151	sra	%r14,STACK_SHIFT
152	be	BASED(2f)
1531:	l	%r15,__LC_ASYNC_STACK
154#ifdef CONFIG_CHECK_STACK
155	b	BASED(3f)
1562:	tml	%r15,STACK_SIZE - CONFIG_STACK_GUARD
157	bz	BASED(stack_overflow)
1583:
159#endif
1602:
161	.endm
162
163	.macro	CREATE_STACK_FRAME psworg,savearea
164	s	%r15,BASED(.Lc_spsize)	# make room for registers & psw
165	mvc	SP_PSW(8,%r15),0(%r12)	# move user PSW to stack
166	st	%r2,SP_ORIG_R2(%r15)	# store original content of gpr 2
167	icm	%r12,12,__LC_SVC_ILC
168	stm	%r0,%r11,SP_R0(%r15)	# store gprs %r0-%r11 to kernel stack
169	st	%r12,SP_ILC(%r15)
170	mvc	SP_R12(16,%r15),\savearea # move %r12-%r15 to stack
171	la	%r12,0
172	st	%r12,__SF_BACKCHAIN(%r15)	# clear back chain
173	.endm
174
175	.macro	RESTORE_ALL psworg,sync
176	mvc	\psworg(8),SP_PSW(%r15) # move user PSW to lowcore
177	.if !\sync
178	ni	\psworg+1,0xfd		# clear wait state bit
179	.endif
180	lm	%r0,%r15,SP_R0(%r15)	# load gprs 0-15 of user
181	stpt	__LC_EXIT_TIMER
182	lpsw	\psworg			# back to caller
183	.endm
184
185	.macro REENABLE_IRQS
186	mvc	__SF_EMPTY(1,%r15),SP_PSW(%r15)
187	ni	__SF_EMPTY(%r15),0xbf
188	ssm	__SF_EMPTY(%r15)
189	.endm
190
191/*
192 * Scheduler resume function, called by switch_to
193 *  gpr2 = (task_struct *) prev
194 *  gpr3 = (task_struct *) next
195 * Returns:
196 *  gpr2 = prev
197 */
198	.globl	__switch_to
199__switch_to:
200	basr	%r1,0
201__switch_to_base:
202	tm	__THREAD_per(%r3),0xe8		# new process is using per ?
203	bz	__switch_to_noper-__switch_to_base(%r1)	# if not we're fine
204	stctl	%c9,%c11,__SF_EMPTY(%r15)	# We are using per stuff
205	clc	__THREAD_per(12,%r3),__SF_EMPTY(%r15)
206	be	__switch_to_noper-__switch_to_base(%r1)	# we got away w/o bashing TLB's
207	lctl	%c9,%c11,__THREAD_per(%r3)	# Nope we didn't
208__switch_to_noper:
209	l	%r4,__THREAD_info(%r2)		# get thread_info of prev
210	tm	__TI_flags+3(%r4),_TIF_MCCK_PENDING # machine check pending?
211	bz	__switch_to_no_mcck-__switch_to_base(%r1)
212	ni	__TI_flags+3(%r4),255-_TIF_MCCK_PENDING # clear flag in prev
213	l	%r4,__THREAD_info(%r3)		# get thread_info of next
214	oi	__TI_flags+3(%r4),_TIF_MCCK_PENDING # set it in next
215__switch_to_no_mcck:
216	stm	%r6,%r15,__SF_GPRS(%r15)# store __switch_to registers of prev task
217	st	%r15,__THREAD_ksp(%r2)	# store kernel stack to prev->tss.ksp
218	l	%r15,__THREAD_ksp(%r3)	# load kernel stack from next->tss.ksp
219	lm	%r6,%r15,__SF_GPRS(%r15)# load __switch_to registers of next task
220	st	%r3,__LC_CURRENT	# __LC_CURRENT = current task struct
221	lctl	%c4,%c4,__TASK_pid(%r3) # load pid to control reg. 4
222	l	%r3,__THREAD_info(%r3)	# load thread_info from task struct
223	st	%r3,__LC_THREAD_INFO
224	ahi	%r3,STACK_SIZE
225	st	%r3,__LC_KERNEL_STACK	# __LC_KERNEL_STACK = new kernel stack
226	br	%r14
227
228__critical_start:
229/*
230 * SVC interrupt handler routine. System calls are synchronous events and
231 * are executed with interrupts enabled.
232 */
233
234	.globl	system_call
235system_call:
236	stpt	__LC_SYNC_ENTER_TIMER
237sysc_saveall:
238	SAVE_ALL_BASE __LC_SAVE_AREA
239	SAVE_ALL_SVC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
240	CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
241	lh	%r7,0x8a	  # get svc number from lowcore
242sysc_vtime:
243	UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
244sysc_stime:
245	UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
246sysc_update:
247	mvc	__LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
248sysc_do_svc:
249	l	%r9,__LC_THREAD_INFO	# load pointer to thread_info struct
250	ltr	%r7,%r7			# test for svc 0
251	bnz	BASED(sysc_nr_ok)	# svc number > 0
252	# svc 0: system call number in %r1
253	cl	%r1,BASED(.Lnr_syscalls)
254	bnl	BASED(sysc_nr_ok)
255	lr	%r7,%r1 	  # copy svc number to %r7
256sysc_nr_ok:
257	sth	%r7,SP_SVCNR(%r15)
258	sll	%r7,2		  # svc number *4
259	l	%r8,BASED(.Lsysc_table)
260	tm	__TI_flags+2(%r9),_TIF_SYSCALL
261	mvc	SP_ARGS(4,%r15),SP_R7(%r15)
262	l	%r8,0(%r7,%r8)	  # get system call addr.
263	bnz	BASED(sysc_tracesys)
264	basr	%r14,%r8	  # call sys_xxxx
265	st	%r2,SP_R2(%r15)   # store return value (change R2 on stack)
266
267sysc_return:
268	LOCKDEP_SYS_EXIT
269sysc_tif:
270	tm	__TI_flags+3(%r9),_TIF_WORK_SVC
271	bnz	BASED(sysc_work)  # there is work to do (signals etc.)
272sysc_restore:
273	RESTORE_ALL __LC_RETURN_PSW,1
274sysc_done:
275
276#
277# There is work to do, but first we need to check if we return to userspace.
278#
279sysc_work:
280	tm	SP_PSW+1(%r15),0x01	# returning to user ?
281	bno	BASED(sysc_restore)
282
283#
284# One of the work bits is on. Find out which one.
285#
286sysc_work_tif:
287	tm	__TI_flags+3(%r9),_TIF_MCCK_PENDING
288	bo	BASED(sysc_mcck_pending)
289	tm	__TI_flags+3(%r9),_TIF_NEED_RESCHED
290	bo	BASED(sysc_reschedule)
291	tm	__TI_flags+3(%r9),_TIF_SIGPENDING
292	bo	BASED(sysc_sigpending)
293	tm	__TI_flags+3(%r9),_TIF_NOTIFY_RESUME
294	bo	BASED(sysc_notify_resume)
295	tm	__TI_flags+3(%r9),_TIF_RESTART_SVC
296	bo	BASED(sysc_restart)
297	tm	__TI_flags+3(%r9),_TIF_SINGLE_STEP
298	bo	BASED(sysc_singlestep)
299	b	BASED(sysc_return)	# beware of critical section cleanup
300
301#
302# _TIF_NEED_RESCHED is set, call schedule
303#
304sysc_reschedule:
305	l	%r1,BASED(.Lschedule)
306	la	%r14,BASED(sysc_return)
307	br	%r1			# call scheduler
308
309#
310# _TIF_MCCK_PENDING is set, call handler
311#
312sysc_mcck_pending:
313	l	%r1,BASED(.Ls390_handle_mcck)
314	la	%r14,BASED(sysc_return)
315	br	%r1			# TIF bit will be cleared by handler
316
317#
318# _TIF_SIGPENDING is set, call do_signal
319#
320sysc_sigpending:
321	ni	__TI_flags+3(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP
322	la	%r2,SP_PTREGS(%r15)	# load pt_regs
323	l	%r1,BASED(.Ldo_signal)
324	basr	%r14,%r1		# call do_signal
325	tm	__TI_flags+3(%r9),_TIF_RESTART_SVC
326	bo	BASED(sysc_restart)
327	tm	__TI_flags+3(%r9),_TIF_SINGLE_STEP
328	bo	BASED(sysc_singlestep)
329	b	BASED(sysc_return)
330
331#
332# _TIF_NOTIFY_RESUME is set, call do_notify_resume
333#
334sysc_notify_resume:
335	la	%r2,SP_PTREGS(%r15)	# load pt_regs
336	l	%r1,BASED(.Ldo_notify_resume)
337	la	%r14,BASED(sysc_return)
338	br	%r1			# call do_notify_resume
339
340
341#
342# _TIF_RESTART_SVC is set, set up registers and restart svc
343#
344sysc_restart:
345	ni	__TI_flags+3(%r9),255-_TIF_RESTART_SVC # clear TIF_RESTART_SVC
346	l	%r7,SP_R2(%r15) 	# load new svc number
347	mvc	SP_R2(4,%r15),SP_ORIG_R2(%r15) # restore first argument
348	lm	%r2,%r6,SP_R2(%r15)	# load svc arguments
349	b	BASED(sysc_nr_ok)	# restart svc
350
351#
352# _TIF_SINGLE_STEP is set, call do_single_step
353#
354sysc_singlestep:
355	ni	__TI_flags+3(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP
356	mvi	SP_SVCNR(%r15),0xff	# set trap indication to pgm check
357	mvi	SP_SVCNR+1(%r15),0xff
358	la	%r2,SP_PTREGS(%r15)	# address of register-save area
359	l	%r1,BASED(.Lhandle_per)	# load adr. of per handler
360	la	%r14,BASED(sysc_return)	# load adr. of system return
361	br	%r1			# branch to do_single_step
362
363#
364# call tracehook_report_syscall_entry/tracehook_report_syscall_exit before
365# and after the system call
366#
367sysc_tracesys:
368	l	%r1,BASED(.Ltrace_entry)
369	la	%r2,SP_PTREGS(%r15)	# load pt_regs
370	la	%r3,0
371	srl	%r7,2
372	st	%r7,SP_R2(%r15)
373	basr	%r14,%r1
374	cl	%r2,BASED(.Lnr_syscalls)
375	bnl	BASED(sysc_tracenogo)
376	l	%r8,BASED(.Lsysc_table)
377	lr	%r7,%r2
378	sll	%r7,2			# svc number *4
379	l	%r8,0(%r7,%r8)
380sysc_tracego:
381	lm	%r3,%r6,SP_R3(%r15)
382	mvc	SP_ARGS(4,%r15),SP_R7(%r15)
383	l	%r2,SP_ORIG_R2(%r15)
384	basr	%r14,%r8		# call sys_xxx
385	st	%r2,SP_R2(%r15)		# store return value
386sysc_tracenogo:
387	tm	__TI_flags+2(%r9),_TIF_SYSCALL
388	bz	BASED(sysc_return)
389	l	%r1,BASED(.Ltrace_exit)
390	la	%r2,SP_PTREGS(%r15)	# load pt_regs
391	la	%r14,BASED(sysc_return)
392	br	%r1
393
394#
395# a new process exits the kernel with ret_from_fork
396#
397	.globl	ret_from_fork
398ret_from_fork:
399	l	%r13,__LC_SVC_NEW_PSW+4
400	l	%r9,__LC_THREAD_INFO	# load pointer to thread_info struct
401	tm	SP_PSW+1(%r15),0x01	# forking a kernel thread ?
402	bo	BASED(0f)
403	st	%r15,SP_R15(%r15)	# store stack pointer for new kthread
4040:	l	%r1,BASED(.Lschedtail)
405	basr	%r14,%r1
406	TRACE_IRQS_ON
407	stosm	__SF_EMPTY(%r15),0x03	# reenable interrupts
408	b	BASED(sysc_tracenogo)
409
410#
411# kernel_execve function needs to deal with pt_regs that is not
412# at the usual place
413#
414	.globl	kernel_execve
415kernel_execve:
416	stm	%r12,%r15,48(%r15)
417	lr	%r14,%r15
418	l	%r13,__LC_SVC_NEW_PSW+4
419	s	%r15,BASED(.Lc_spsize)
420	st	%r14,__SF_BACKCHAIN(%r15)
421	la	%r12,SP_PTREGS(%r15)
422	xc	0(__PT_SIZE,%r12),0(%r12)
423	l	%r1,BASED(.Ldo_execve)
424	lr	%r5,%r12
425	basr	%r14,%r1
426	ltr	%r2,%r2
427	be	BASED(0f)
428	a	%r15,BASED(.Lc_spsize)
429	lm	%r12,%r15,48(%r15)
430	br	%r14
431	# execve succeeded.
4320:	stnsm	__SF_EMPTY(%r15),0xfc	# disable interrupts
433	l	%r15,__LC_KERNEL_STACK	# load ksp
434	s	%r15,BASED(.Lc_spsize)	# make room for registers & psw
435	l	%r9,__LC_THREAD_INFO
436	mvc	SP_PTREGS(__PT_SIZE,%r15),0(%r12)	# copy pt_regs
437	xc	__SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15)
438	stosm	__SF_EMPTY(%r15),0x03	# reenable interrupts
439	l	%r1,BASED(.Lexecve_tail)
440	basr	%r14,%r1
441	b	BASED(sysc_return)
442
443/*
444 * Program check handler routine
445 */
446
447	.globl	pgm_check_handler
448pgm_check_handler:
449/*
450 * First we need to check for a special case:
451 * Single stepping an instruction that disables the PER event mask will
452 * cause a PER event AFTER the mask has been set. Example: SVC or LPSW.
453 * For a single stepped SVC the program check handler gets control after
454 * the SVC new PSW has been loaded. But we want to execute the SVC first and
455 * then handle the PER event. Therefore we update the SVC old PSW to point
456 * to the pgm_check_handler and branch to the SVC handler after we checked
457 * if we have to load the kernel stack register.
458 * For every other possible cause for PER event without the PER mask set
459 * we just ignore the PER event (FIXME: is there anything we have to do
460 * for LPSW?).
461 */
462	stpt	__LC_SYNC_ENTER_TIMER
463	SAVE_ALL_BASE __LC_SAVE_AREA
464	tm	__LC_PGM_INT_CODE+1,0x80 # check whether we got a per exception
465	bnz	BASED(pgm_per)		# got per exception -> special case
466	SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA
467	CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA
468	tm	SP_PSW+1(%r15),0x01	# interrupting from user ?
469	bz	BASED(pgm_no_vtime)
470	UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
471	UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
472	mvc	__LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
473pgm_no_vtime:
474	l	%r9,__LC_THREAD_INFO	# load pointer to thread_info struct
475	l	%r3,__LC_PGM_ILC	# load program interruption code
476	l	%r4,__LC_TRANS_EXC_CODE
477	REENABLE_IRQS
478	la	%r8,0x7f
479	nr	%r8,%r3
480pgm_do_call:
481	l	%r7,BASED(.Ljump_table)
482	sll	%r8,2
483	l	%r7,0(%r8,%r7)		# load address of handler routine
484	la	%r2,SP_PTREGS(%r15)	# address of register-save area
485	basr	%r14,%r7		# branch to interrupt-handler
486pgm_exit:
487	b	BASED(sysc_return)
488
489#
490# handle per exception
491#
492pgm_per:
493	tm	__LC_PGM_OLD_PSW,0x40	# test if per event recording is on
494	bnz	BASED(pgm_per_std)	# ok, normal per event from user space
495# ok its one of the special cases, now we need to find out which one
496	clc	__LC_PGM_OLD_PSW(8),__LC_SVC_NEW_PSW
497	be	BASED(pgm_svcper)
498# no interesting special case, ignore PER event
499	lm	%r12,%r15,__LC_SAVE_AREA
500	lpsw	0x28
501
502#
503# Normal per exception
504#
505pgm_per_std:
506	SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA
507	CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA
508	tm	SP_PSW+1(%r15),0x01	# interrupting from user ?
509	bz	BASED(pgm_no_vtime2)
510	UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
511	UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
512	mvc	__LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
513pgm_no_vtime2:
514	l	%r9,__LC_THREAD_INFO	# load pointer to thread_info struct
515	l	%r1,__TI_task(%r9)
516	tm	SP_PSW+1(%r15),0x01	# kernel per event ?
517	bz	BASED(kernel_per)
518	mvc	__THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID
519	mvc	__THREAD_per+__PER_address(4,%r1),__LC_PER_ADDRESS
520	mvc	__THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID
521	oi	__TI_flags+3(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
522	l	%r3,__LC_PGM_ILC	# load program interruption code
523	l	%r4,__LC_TRANS_EXC_CODE
524	REENABLE_IRQS
525	la	%r8,0x7f
526	nr	%r8,%r3 		# clear per-event-bit and ilc
527	be	BASED(pgm_exit2)	# only per or per+check ?
528	l	%r7,BASED(.Ljump_table)
529	sll	%r8,2
530	l	%r7,0(%r8,%r7)		# load address of handler routine
531	la	%r2,SP_PTREGS(%r15)	# address of register-save area
532	basr	%r14,%r7		# branch to interrupt-handler
533pgm_exit2:
534	b	BASED(sysc_return)
535
536#
537# it was a single stepped SVC that is causing all the trouble
538#
539pgm_svcper:
540	SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
541	CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
542	UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
543	UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
544	mvc	__LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
545	lh	%r7,0x8a		# get svc number from lowcore
546	l	%r9,__LC_THREAD_INFO	# load pointer to thread_info struct
547	l	%r8,__TI_task(%r9)
548	mvc	__THREAD_per+__PER_atmid(2,%r8),__LC_PER_ATMID
549	mvc	__THREAD_per+__PER_address(4,%r8),__LC_PER_ADDRESS
550	mvc	__THREAD_per+__PER_access_id(1,%r8),__LC_PER_ACCESS_ID
551	oi	__TI_flags+3(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
552	stosm	__SF_EMPTY(%r15),0x03	# reenable interrupts
553	lm	%r2,%r6,SP_R2(%r15)	# load svc arguments
554	b	BASED(sysc_do_svc)
555
556#
557# per was called from kernel, must be kprobes
558#
559kernel_per:
560	mvi	SP_SVCNR(%r15),0xff	# set trap indication to pgm check
561	mvi	SP_SVCNR+1(%r15),0xff
562	la	%r2,SP_PTREGS(%r15)	# address of register-save area
563	l	%r1,BASED(.Lhandle_per)	# load adr. of per handler
564	basr	%r14,%r1		# branch to do_single_step
565	b	BASED(pgm_exit)
566
567/*
568 * IO interrupt handler routine
569 */
570
571	.globl io_int_handler
572io_int_handler:
573	stck	__LC_INT_CLOCK
574	stpt	__LC_ASYNC_ENTER_TIMER
575	SAVE_ALL_BASE __LC_SAVE_AREA+16
576	SAVE_ALL_ASYNC __LC_IO_OLD_PSW,__LC_SAVE_AREA+16
577	CREATE_STACK_FRAME __LC_IO_OLD_PSW,__LC_SAVE_AREA+16
578	tm	SP_PSW+1(%r15),0x01	# interrupting from user ?
579	bz	BASED(io_no_vtime)
580	UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
581	UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
582	mvc	__LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
583io_no_vtime:
584	TRACE_IRQS_OFF
585	l	%r9,__LC_THREAD_INFO	# load pointer to thread_info struct
586	l	%r1,BASED(.Ldo_IRQ)	# load address of do_IRQ
587	la	%r2,SP_PTREGS(%r15)	# address of register-save area
588	basr	%r14,%r1		# branch to standard irq handler
589io_return:
590	LOCKDEP_SYS_EXIT
591	TRACE_IRQS_ON
592io_tif:
593	tm	__TI_flags+3(%r9),_TIF_WORK_INT
594	bnz	BASED(io_work)		# there is work to do (signals etc.)
595io_restore:
596	RESTORE_ALL __LC_RETURN_PSW,0
597io_done:
598
599#
600# There is work todo, find out in which context we have been interrupted:
601# 1) if we return to user space we can do all _TIF_WORK_INT work
602# 2) if we return to kernel code and preemptive scheduling is enabled check
603#    the preemption counter and if it is zero call preempt_schedule_irq
604# Before any work can be done, a switch to the kernel stack is required.
605#
606io_work:
607	tm	SP_PSW+1(%r15),0x01	# returning to user ?
608	bo	BASED(io_work_user)	# yes -> do resched & signal
609#ifdef CONFIG_PREEMPT
610	# check for preemptive scheduling
611	icm	%r0,15,__TI_precount(%r9)
612	bnz	BASED(io_restore)	# preemption disabled
613	tm	__TI_flags+3(%r9),_TIF_NEED_RESCHED
614	bno	BASED(io_restore)
615	# switch to kernel stack
616	l	%r1,SP_R15(%r15)
617	s	%r1,BASED(.Lc_spsize)
618	mvc	SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
619	xc	__SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1) # clear back chain
620	lr	%r15,%r1
621	# TRACE_IRQS_ON already done at io_return, call
622	# TRACE_IRQS_OFF to keep things symmetrical
623	TRACE_IRQS_OFF
624	l	%r1,BASED(.Lpreempt_schedule_irq)
625	basr	%r14,%r1		# call preempt_schedule_irq
626	b	BASED(io_return)
627#else
628	b	BASED(io_restore)
629#endif
630
631#
632# Need to do work before returning to userspace, switch to kernel stack
633#
634io_work_user:
635	l	%r1,__LC_KERNEL_STACK
636	s	%r1,BASED(.Lc_spsize)
637	mvc	SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
638	xc	__SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1) # clear back chain
639	lr	%r15,%r1
640
641#
642# One of the work bits is on. Find out which one.
643# Checked are: _TIF_SIGPENDING, _TIF_NOTIFY_RESUME, _TIF_NEED_RESCHED
644#		and _TIF_MCCK_PENDING
645#
646io_work_tif:
647	tm	__TI_flags+3(%r9),_TIF_MCCK_PENDING
648	bo	BASED(io_mcck_pending)
649	tm	__TI_flags+3(%r9),_TIF_NEED_RESCHED
650	bo	BASED(io_reschedule)
651	tm	__TI_flags+3(%r9),_TIF_SIGPENDING
652	bo	BASED(io_sigpending)
653	tm	__TI_flags+3(%r9),_TIF_NOTIFY_RESUME
654	bo	BASED(io_notify_resume)
655	b	BASED(io_return)	# beware of critical section cleanup
656
657#
658# _TIF_MCCK_PENDING is set, call handler
659#
660io_mcck_pending:
661	# TRACE_IRQS_ON already done at io_return
662	l	%r1,BASED(.Ls390_handle_mcck)
663	basr	%r14,%r1		# TIF bit will be cleared by handler
664	TRACE_IRQS_OFF
665	b	BASED(io_return)
666
667#
668# _TIF_NEED_RESCHED is set, call schedule
669#
670io_reschedule:
671	# TRACE_IRQS_ON already done at io_return
672	l	%r1,BASED(.Lschedule)
673	stosm	__SF_EMPTY(%r15),0x03	# reenable interrupts
674	basr	%r14,%r1		# call scheduler
675	stnsm	__SF_EMPTY(%r15),0xfc	# disable I/O and ext. interrupts
676	TRACE_IRQS_OFF
677	b	BASED(io_return)
678
679#
680# _TIF_SIGPENDING is set, call do_signal
681#
682io_sigpending:
683	# TRACE_IRQS_ON already done at io_return
684	stosm	__SF_EMPTY(%r15),0x03	# reenable interrupts
685	la	%r2,SP_PTREGS(%r15)	# load pt_regs
686	l	%r1,BASED(.Ldo_signal)
687	basr	%r14,%r1		# call do_signal
688	stnsm	__SF_EMPTY(%r15),0xfc	# disable I/O and ext. interrupts
689	TRACE_IRQS_OFF
690	b	BASED(io_return)
691
692#
693# _TIF_SIGPENDING is set, call do_signal
694#
695io_notify_resume:
696	# TRACE_IRQS_ON already done at io_return
697	stosm	__SF_EMPTY(%r15),0x03	# reenable interrupts
698	la	%r2,SP_PTREGS(%r15)	# load pt_regs
699	l	%r1,BASED(.Ldo_notify_resume)
700	basr	%r14,%r1		# call do_signal
701	stnsm	__SF_EMPTY(%r15),0xfc	# disable I/O and ext. interrupts
702	TRACE_IRQS_OFF
703	b	BASED(io_return)
704
705/*
706 * External interrupt handler routine
707 */
708
709	.globl	ext_int_handler
710ext_int_handler:
711	stck	__LC_INT_CLOCK
712	stpt	__LC_ASYNC_ENTER_TIMER
713	SAVE_ALL_BASE __LC_SAVE_AREA+16
714	SAVE_ALL_ASYNC __LC_EXT_OLD_PSW,__LC_SAVE_AREA+16
715	CREATE_STACK_FRAME __LC_EXT_OLD_PSW,__LC_SAVE_AREA+16
716	tm	SP_PSW+1(%r15),0x01	# interrupting from user ?
717	bz	BASED(ext_no_vtime)
718	UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
719	UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
720	mvc	__LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
721ext_no_vtime:
722	l	%r9,__LC_THREAD_INFO	# load pointer to thread_info struct
723	TRACE_IRQS_OFF
724	la	%r2,SP_PTREGS(%r15)	# address of register-save area
725	l	%r3,__LC_CPU_ADDRESS	# get cpu address + interruption code
726	l	%r4,__LC_EXT_PARAMS	# get external parameters
727	l	%r1,BASED(.Ldo_extint)
728	basr	%r14,%r1
729	b	BASED(io_return)
730
731__critical_end:
732
733/*
734 * Machine check handler routines
735 */
736
737	.globl mcck_int_handler
738mcck_int_handler:
739	stck	__LC_MCCK_CLOCK
740	spt	__LC_CPU_TIMER_SAVE_AREA	# revalidate cpu timer
741	lm	%r0,%r15,__LC_GPREGS_SAVE_AREA	# revalidate gprs
742	SAVE_ALL_BASE __LC_SAVE_AREA+32
743	la	%r12,__LC_MCK_OLD_PSW
744	tm	__LC_MCCK_CODE,0x80	# system damage?
745	bo	BASED(mcck_int_main)	# yes -> rest of mcck code invalid
746	mvc	__LC_MCCK_ENTER_TIMER(8),__LC_CPU_TIMER_SAVE_AREA
747	tm	__LC_MCCK_CODE+5,0x02	# stored cpu timer value valid?
748	bo	BASED(1f)
749	la	%r14,__LC_SYNC_ENTER_TIMER
750	clc	0(8,%r14),__LC_ASYNC_ENTER_TIMER
751	bl	BASED(0f)
752	la	%r14,__LC_ASYNC_ENTER_TIMER
7530:	clc	0(8,%r14),__LC_EXIT_TIMER
754	bl	BASED(0f)
755	la	%r14,__LC_EXIT_TIMER
7560:	clc	0(8,%r14),__LC_LAST_UPDATE_TIMER
757	bl	BASED(0f)
758	la	%r14,__LC_LAST_UPDATE_TIMER
7590:	spt	0(%r14)
760	mvc	__LC_MCCK_ENTER_TIMER(8),0(%r14)
7611:	tm	__LC_MCCK_CODE+2,0x09	# mwp + ia of old psw valid?
762	bno	BASED(mcck_int_main)	# no -> skip cleanup critical
763	tm	__LC_MCK_OLD_PSW+1,0x01	# test problem state bit
764	bnz	BASED(mcck_int_main)	# from user -> load async stack
765	clc	__LC_MCK_OLD_PSW+4(4),BASED(.Lcritical_end)
766	bhe	BASED(mcck_int_main)
767	clc	__LC_MCK_OLD_PSW+4(4),BASED(.Lcritical_start)
768	bl	BASED(mcck_int_main)
769	l	%r14,BASED(.Lcleanup_critical)
770	basr	%r14,%r14
771mcck_int_main:
772	l	%r14,__LC_PANIC_STACK	# are we already on the panic stack?
773	slr	%r14,%r15
774	sra	%r14,PAGE_SHIFT
775	be	BASED(0f)
776	l	%r15,__LC_PANIC_STACK	# load panic stack
7770:	CREATE_STACK_FRAME __LC_MCK_OLD_PSW,__LC_SAVE_AREA+32
778	tm	__LC_MCCK_CODE+2,0x08	# mwp of old psw valid?
779	bno	BASED(mcck_no_vtime)	# no -> skip cleanup critical
780	tm	SP_PSW+1(%r15),0x01	# interrupting from user ?
781	bz	BASED(mcck_no_vtime)
782	UPDATE_VTIME __LC_EXIT_TIMER,__LC_MCCK_ENTER_TIMER,__LC_USER_TIMER
783	UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
784	mvc	__LC_LAST_UPDATE_TIMER(8),__LC_MCCK_ENTER_TIMER
785mcck_no_vtime:
786	l	%r9,__LC_THREAD_INFO	# load pointer to thread_info struct
787	la	%r2,SP_PTREGS(%r15)	# load pt_regs
788	l	%r1,BASED(.Ls390_mcck)
789	basr	%r14,%r1		# call machine check handler
790	tm	SP_PSW+1(%r15),0x01	# returning to user ?
791	bno	BASED(mcck_return)
792	l	%r1,__LC_KERNEL_STACK	# switch to kernel stack
793	s	%r1,BASED(.Lc_spsize)
794	mvc	SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
795	xc	__SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1) # clear back chain
796	lr	%r15,%r1
797	stosm	__SF_EMPTY(%r15),0x04	# turn dat on
798	tm	__TI_flags+3(%r9),_TIF_MCCK_PENDING
799	bno	BASED(mcck_return)
800	TRACE_IRQS_OFF
801	l	%r1,BASED(.Ls390_handle_mcck)
802	basr	%r14,%r1		# call machine check handler
803	TRACE_IRQS_ON
804mcck_return:
805	mvc	__LC_RETURN_MCCK_PSW(8),SP_PSW(%r15) # move return PSW
806	ni	__LC_RETURN_MCCK_PSW+1,0xfd # clear wait state bit
807	tm	__LC_RETURN_MCCK_PSW+1,0x01 # returning to user ?
808	bno	BASED(0f)
809	lm	%r0,%r15,SP_R0(%r15)	# load gprs 0-15
810	stpt	__LC_EXIT_TIMER
811	lpsw	__LC_RETURN_MCCK_PSW	# back to caller
8120:	lm	%r0,%r15,SP_R0(%r15)	# load gprs 0-15
813	lpsw	__LC_RETURN_MCCK_PSW	# back to caller
814
815	RESTORE_ALL __LC_RETURN_MCCK_PSW,0
816
817/*
818 * Restart interruption handler, kick starter for additional CPUs
819 */
820#ifdef CONFIG_SMP
821	__CPUINIT
822	.globl restart_int_handler
823restart_int_handler:
824	basr	%r1,0
825restart_base:
826	spt	restart_vtime-restart_base(%r1)
827	stck	__LC_LAST_UPDATE_CLOCK
828	mvc	__LC_LAST_UPDATE_TIMER(8),restart_vtime-restart_base(%r1)
829	mvc	__LC_EXIT_TIMER(8),restart_vtime-restart_base(%r1)
830	l	%r15,__LC_SAVE_AREA+60	# load ksp
831	lctl	%c0,%c15,__LC_CREGS_SAVE_AREA # get new ctl regs
832	lam	%a0,%a15,__LC_AREGS_SAVE_AREA
833	lm	%r6,%r15,__SF_GPRS(%r15) # load registers from clone
834	l	%r1,__LC_THREAD_INFO
835	mvc	__LC_USER_TIMER(8),__TI_user_timer(%r1)
836	mvc	__LC_SYSTEM_TIMER(8),__TI_system_timer(%r1)
837	xc	__LC_STEAL_TIMER(8),__LC_STEAL_TIMER
838	stosm	__SF_EMPTY(%r15),0x04	# now we can turn dat on
839	basr	%r14,0
840	l	%r14,restart_addr-.(%r14)
841	br	%r14			# branch to start_secondary
842restart_addr:
843	.long	start_secondary
844	.align	8
845restart_vtime:
846	.long	0x7fffffff,0xffffffff
847	.previous
848#else
849/*
850 * If we do not run with SMP enabled, let the new CPU crash ...
851 */
852	.globl restart_int_handler
853restart_int_handler:
854	basr	%r1,0
855restart_base:
856	lpsw	restart_crash-restart_base(%r1)
857	.align	8
858restart_crash:
859	.long	0x000a0000,0x00000000
860restart_go:
861#endif
862
863#ifdef CONFIG_CHECK_STACK
864/*
865 * The synchronous or the asynchronous stack overflowed. We are dead.
866 * No need to properly save the registers, we are going to panic anyway.
867 * Setup a pt_regs so that show_trace can provide a good call trace.
868 */
869stack_overflow:
870	l	%r15,__LC_PANIC_STACK	# change to panic stack
871	sl	%r15,BASED(.Lc_spsize)
872	mvc	SP_PSW(8,%r15),0(%r12)	# move user PSW to stack
873	stm	%r0,%r11,SP_R0(%r15)	# store gprs %r0-%r11 to kernel stack
874	la	%r1,__LC_SAVE_AREA
875	ch	%r12,BASED(.L0x020)	# old psw addr == __LC_SVC_OLD_PSW ?
876	be	BASED(0f)
877	ch	%r12,BASED(.L0x028)	# old psw addr == __LC_PGM_OLD_PSW ?
878	be	BASED(0f)
879	la	%r1,__LC_SAVE_AREA+16
8800:	mvc	SP_R12(16,%r15),0(%r1)	# move %r12-%r15 to stack
881	xc	__SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15) # clear back chain
882	l	%r1,BASED(1f)		# branch to kernel_stack_overflow
883	la	%r2,SP_PTREGS(%r15)	# load pt_regs
884	br	%r1
8851:	.long	kernel_stack_overflow
886#endif
887
888cleanup_table_system_call:
889	.long	system_call + 0x80000000, sysc_do_svc + 0x80000000
890cleanup_table_sysc_tif:
891	.long	sysc_tif + 0x80000000, sysc_restore + 0x80000000
892cleanup_table_sysc_restore:
893	.long	sysc_restore + 0x80000000, sysc_done + 0x80000000
894cleanup_table_io_tif:
895	.long	io_tif + 0x80000000, io_restore + 0x80000000
896cleanup_table_io_restore:
897	.long	io_restore + 0x80000000, io_done + 0x80000000
898
899cleanup_critical:
900	clc	4(4,%r12),BASED(cleanup_table_system_call)
901	bl	BASED(0f)
902	clc	4(4,%r12),BASED(cleanup_table_system_call+4)
903	bl	BASED(cleanup_system_call)
9040:
905	clc	4(4,%r12),BASED(cleanup_table_sysc_tif)
906	bl	BASED(0f)
907	clc	4(4,%r12),BASED(cleanup_table_sysc_tif+4)
908	bl	BASED(cleanup_sysc_tif)
9090:
910	clc	4(4,%r12),BASED(cleanup_table_sysc_restore)
911	bl	BASED(0f)
912	clc	4(4,%r12),BASED(cleanup_table_sysc_restore+4)
913	bl	BASED(cleanup_sysc_restore)
9140:
915	clc	4(4,%r12),BASED(cleanup_table_io_tif)
916	bl	BASED(0f)
917	clc	4(4,%r12),BASED(cleanup_table_io_tif+4)
918	bl	BASED(cleanup_io_tif)
9190:
920	clc	4(4,%r12),BASED(cleanup_table_io_restore)
921	bl	BASED(0f)
922	clc	4(4,%r12),BASED(cleanup_table_io_restore+4)
923	bl	BASED(cleanup_io_restore)
9240:
925	br	%r14
926
927cleanup_system_call:
928	mvc	__LC_RETURN_PSW(8),0(%r12)
929	clc	__LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+4)
930	bh	BASED(0f)
931	mvc	__LC_SYNC_ENTER_TIMER(8),__LC_MCCK_ENTER_TIMER
932	c	%r12,BASED(.Lmck_old_psw)
933	be	BASED(0f)
934	mvc	__LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER
9350:	c	%r12,BASED(.Lmck_old_psw)
936	la	%r12,__LC_SAVE_AREA+32
937	be	BASED(0f)
938	la	%r12,__LC_SAVE_AREA+16
9390:	clc	__LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+8)
940	bhe	BASED(cleanup_vtime)
941	clc	__LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn)
942	bh	BASED(0f)
943	mvc	__LC_SAVE_AREA(16),0(%r12)
9440:	st	%r13,4(%r12)
945	st	%r12,__LC_SAVE_AREA+48	# argh
946	SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
947	CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
948	l	%r12,__LC_SAVE_AREA+48	# argh
949	st	%r15,12(%r12)
950	lh	%r7,0x8a
951cleanup_vtime:
952	clc	__LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+12)
953	bhe	BASED(cleanup_stime)
954	UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
955cleanup_stime:
956	clc	__LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+16)
957	bh	BASED(cleanup_update)
958	UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
959cleanup_update:
960	mvc	__LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
961	mvc	__LC_RETURN_PSW+4(4),BASED(cleanup_table_system_call+4)
962	la	%r12,__LC_RETURN_PSW
963	br	%r14
964cleanup_system_call_insn:
965	.long	sysc_saveall + 0x80000000
966	.long	system_call + 0x80000000
967	.long	sysc_vtime + 0x80000000
968	.long	sysc_stime + 0x80000000
969	.long	sysc_update + 0x80000000
970
971cleanup_sysc_tif:
972	mvc	__LC_RETURN_PSW(4),0(%r12)
973	mvc	__LC_RETURN_PSW+4(4),BASED(cleanup_table_sysc_tif)
974	la	%r12,__LC_RETURN_PSW
975	br	%r14
976
977cleanup_sysc_restore:
978	clc	4(4,%r12),BASED(cleanup_sysc_restore_insn)
979	be	BASED(2f)
980	mvc	__LC_EXIT_TIMER(8),__LC_MCCK_ENTER_TIMER
981	c	%r12,BASED(.Lmck_old_psw)
982	be	BASED(0f)
983	mvc	__LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
9840:	clc	4(4,%r12),BASED(cleanup_sysc_restore_insn+4)
985	be	BASED(2f)
986	mvc	__LC_RETURN_PSW(8),SP_PSW(%r15)
987	c	%r12,BASED(.Lmck_old_psw)
988	la	%r12,__LC_SAVE_AREA+32
989	be	BASED(1f)
990	la	%r12,__LC_SAVE_AREA+16
9911:	mvc	0(16,%r12),SP_R12(%r15)
992	lm	%r0,%r11,SP_R0(%r15)
993	l	%r15,SP_R15(%r15)
9942:	la	%r12,__LC_RETURN_PSW
995	br	%r14
996cleanup_sysc_restore_insn:
997	.long	sysc_done - 4 + 0x80000000
998	.long	sysc_done - 8 + 0x80000000
999
1000cleanup_io_tif:
1001	mvc	__LC_RETURN_PSW(4),0(%r12)
1002	mvc	__LC_RETURN_PSW+4(4),BASED(cleanup_table_io_tif)
1003	la	%r12,__LC_RETURN_PSW
1004	br	%r14
1005
1006cleanup_io_restore:
1007	clc	4(4,%r12),BASED(cleanup_io_restore_insn)
1008	be	BASED(1f)
1009	mvc	__LC_EXIT_TIMER(8),__LC_MCCK_ENTER_TIMER
1010	clc	4(4,%r12),BASED(cleanup_io_restore_insn+4)
1011	be	BASED(1f)
1012	mvc	__LC_RETURN_PSW(8),SP_PSW(%r15)
1013	mvc	__LC_SAVE_AREA+32(16),SP_R12(%r15)
1014	lm	%r0,%r11,SP_R0(%r15)
1015	l	%r15,SP_R15(%r15)
10161:	la	%r12,__LC_RETURN_PSW
1017	br	%r14
1018cleanup_io_restore_insn:
1019	.long	io_done - 4 + 0x80000000
1020	.long	io_done - 8 + 0x80000000
1021
1022/*
1023 * Integer constants
1024 */
1025		.align	4
1026.Lc_spsize:	.long	SP_SIZE
1027.Lc_overhead:	.long	STACK_FRAME_OVERHEAD
1028.Lnr_syscalls:	.long	NR_syscalls
1029.L0x018:	.short	0x018
1030.L0x020:	.short	0x020
1031.L0x028:	.short	0x028
1032.L0x030:	.short	0x030
1033.L0x038:	.short	0x038
1034.Lc_1:		.long	1
1035
1036/*
1037 * Symbol constants
1038 */
1039.Ls390_mcck:	.long	s390_do_machine_check
1040.Ls390_handle_mcck:
1041		.long	s390_handle_mcck
1042.Lmck_old_psw:	.long	__LC_MCK_OLD_PSW
1043.Ldo_IRQ:	.long	do_IRQ
1044.Ldo_extint:	.long	do_extint
1045.Ldo_signal:	.long	do_signal
1046.Ldo_notify_resume:
1047		.long	do_notify_resume
1048.Lhandle_per:	.long	do_single_step
1049.Ldo_execve:	.long	do_execve
1050.Lexecve_tail:	.long	execve_tail
1051.Ljump_table:	.long	pgm_check_table
1052.Lschedule:	.long	schedule
1053#ifdef CONFIG_PREEMPT
1054.Lpreempt_schedule_irq:
1055		.long	preempt_schedule_irq
1056#endif
1057.Ltrace_entry:	.long	do_syscall_trace_enter
1058.Ltrace_exit:	.long	do_syscall_trace_exit
1059.Lschedtail:	.long	schedule_tail
1060.Lsysc_table:	.long	sys_call_table
1061#ifdef CONFIG_TRACE_IRQFLAGS
1062.Ltrace_irq_on_caller:
1063		.long	trace_hardirqs_on_caller
1064.Ltrace_irq_off_caller:
1065		.long	trace_hardirqs_off_caller
1066#endif
1067#ifdef CONFIG_LOCKDEP
1068.Llockdep_sys_exit:
1069		.long	lockdep_sys_exit
1070#endif
1071.Lcritical_start:
1072		.long	__critical_start + 0x80000000
1073.Lcritical_end:
1074		.long	__critical_end + 0x80000000
1075.Lcleanup_critical:
1076		.long	cleanup_critical
1077
1078		.section .rodata, "a"
1079#define SYSCALL(esa,esame,emu)	.long esa
1080	.globl	sys_call_table
1081sys_call_table:
1082#include "syscalls.S"
1083#undef SYSCALL
1084