xref: /linux/arch/s390/kernel/entry.S (revision ca55b2fef3a9373fcfc30f82fd26bc7fccbda732) 
1/*
2 *    S390 low-level entry points.
3 *
4 *    Copyright IBM Corp. 1999, 2012
5 *    Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
6 *		 Hartmut Penner (hp@de.ibm.com),
7 *		 Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
8 *		 Heiko Carstens <heiko.carstens@de.ibm.com>
9 */
10
11#include <linux/init.h>
12#include <linux/linkage.h>
13#include <asm/processor.h>
14#include <asm/cache.h>
15#include <asm/errno.h>
16#include <asm/ptrace.h>
17#include <asm/thread_info.h>
18#include <asm/asm-offsets.h>
19#include <asm/unistd.h>
20#include <asm/page.h>
21#include <asm/sigp.h>
22#include <asm/irq.h>
23#include <asm/fpu-internal.h>
24#include <asm/vx-insn.h>
25
26__PT_R0      =	__PT_GPRS
27__PT_R1      =	__PT_GPRS + 8
28__PT_R2      =	__PT_GPRS + 16
29__PT_R3      =	__PT_GPRS + 24
30__PT_R4      =	__PT_GPRS + 32
31__PT_R5      =	__PT_GPRS + 40
32__PT_R6      =	__PT_GPRS + 48
33__PT_R7      =	__PT_GPRS + 56
34__PT_R8      =	__PT_GPRS + 64
35__PT_R9      =	__PT_GPRS + 72
36__PT_R10     =	__PT_GPRS + 80
37__PT_R11     =	__PT_GPRS + 88
38__PT_R12     =	__PT_GPRS + 96
39__PT_R13     =	__PT_GPRS + 104
40__PT_R14     =	__PT_GPRS + 112
41__PT_R15     =	__PT_GPRS + 120
42
43STACK_SHIFT = PAGE_SHIFT + THREAD_ORDER
44STACK_SIZE  = 1 << STACK_SHIFT
45STACK_INIT = STACK_SIZE - STACK_FRAME_OVERHEAD - __PT_SIZE
46
47_TIF_WORK	= (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \
48		   _TIF_UPROBE)
49_TIF_TRACE	= (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT | _TIF_SECCOMP | \
50		   _TIF_SYSCALL_TRACEPOINT)
51_CIF_WORK	= (_CIF_MCCK_PENDING | _CIF_ASCE | _CIF_FPU)
52_PIF_WORK	= (_PIF_PER_TRAP)
53
54#define BASED(name) name-cleanup_critical(%r13)
55
56	.macro	TRACE_IRQS_ON
57#ifdef CONFIG_TRACE_IRQFLAGS
58	basr	%r2,%r0
59	brasl	%r14,trace_hardirqs_on_caller
60#endif
61	.endm
62
63	.macro	TRACE_IRQS_OFF
64#ifdef CONFIG_TRACE_IRQFLAGS
65	basr	%r2,%r0
66	brasl	%r14,trace_hardirqs_off_caller
67#endif
68	.endm
69
70	.macro	LOCKDEP_SYS_EXIT
71#ifdef CONFIG_LOCKDEP
72	tm	__PT_PSW+1(%r11),0x01	# returning to user ?
73	jz	.+10
74	brasl	%r14,lockdep_sys_exit
75#endif
76	.endm
77
78	.macro	CHECK_STACK stacksize,savearea
79#ifdef CONFIG_CHECK_STACK
80	tml	%r15,\stacksize - CONFIG_STACK_GUARD
81	lghi	%r14,\savearea
82	jz	stack_overflow
83#endif
84	.endm
85
86	.macro	SWITCH_ASYNC savearea,timer
87	tmhh	%r8,0x0001		# interrupting from user ?
88	jnz	1f
89	lgr	%r14,%r9
90	slg	%r14,BASED(.Lcritical_start)
91	clg	%r14,BASED(.Lcritical_length)
92	jhe	0f
93	lghi	%r11,\savearea		# inside critical section, do cleanup
94	brasl	%r14,cleanup_critical
95	tmhh	%r8,0x0001		# retest problem state after cleanup
96	jnz	1f
970:	lg	%r14,__LC_ASYNC_STACK	# are we already on the async stack?
98	slgr	%r14,%r15
99	srag	%r14,%r14,STACK_SHIFT
100	jnz	2f
101	CHECK_STACK 1<<STACK_SHIFT,\savearea
102	aghi	%r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
103	j	3f
1041:	LAST_BREAK %r14
105	UPDATE_VTIME %r14,%r15,\timer
1062:	lg	%r15,__LC_ASYNC_STACK	# load async stack
1073:	la	%r11,STACK_FRAME_OVERHEAD(%r15)
108	.endm
109
110	.macro UPDATE_VTIME w1,w2,enter_timer
111	lg	\w1,__LC_EXIT_TIMER
112	lg	\w2,__LC_LAST_UPDATE_TIMER
113	slg	\w1,\enter_timer
114	slg	\w2,__LC_EXIT_TIMER
115	alg	\w1,__LC_USER_TIMER
116	alg	\w2,__LC_SYSTEM_TIMER
117	stg	\w1,__LC_USER_TIMER
118	stg	\w2,__LC_SYSTEM_TIMER
119	mvc	__LC_LAST_UPDATE_TIMER(8),\enter_timer
120	.endm
121
122	.macro	LAST_BREAK scratch
123	srag	\scratch,%r10,23
124	jz	.+10
125	stg	%r10,__TI_last_break(%r12)
126	.endm
127
128	.macro REENABLE_IRQS
129	stg	%r8,__LC_RETURN_PSW
130	ni	__LC_RETURN_PSW,0xbf
131	ssm	__LC_RETURN_PSW
132	.endm
133
134	.macro STCK savearea
135#ifdef CONFIG_HAVE_MARCH_Z9_109_FEATURES
136	.insn	s,0xb27c0000,\savearea		# store clock fast
137#else
138	.insn	s,0xb2050000,\savearea		# store clock
139#endif
140	.endm
141
142	.section .kprobes.text, "ax"
143
144/*
145 * Scheduler resume function, called by switch_to
146 *  gpr2 = (task_struct *) prev
147 *  gpr3 = (task_struct *) next
148 * Returns:
149 *  gpr2 = prev
150 */
151ENTRY(__switch_to)
152	stmg	%r6,%r15,__SF_GPRS(%r15)	# store gprs of prev task
153	lgr	%r1,%r2
154	aghi	%r1,__TASK_thread		# thread_struct of prev task
155	lg	%r4,__TASK_thread_info(%r2)	# get thread_info of prev
156	lg	%r5,__TASK_thread_info(%r3)	# get thread_info of next
157	stg	%r15,__THREAD_ksp(%r1)		# store kernel stack of prev
158	lgr	%r1,%r3
159	aghi	%r1,__TASK_thread		# thread_struct of next task
160	lgr	%r15,%r5
161	aghi	%r15,STACK_INIT			# end of kernel stack of next
162	stg	%r3,__LC_CURRENT		# store task struct of next
163	stg	%r5,__LC_THREAD_INFO		# store thread info of next
164	stg	%r15,__LC_KERNEL_STACK		# store end of kernel stack
165	lg	%r15,__THREAD_ksp(%r1)		# load kernel stack of next
166	lctl	%c4,%c4,__TASK_pid(%r3)		# load pid to control reg. 4
167	mvc	__LC_CURRENT_PID+4(4,%r0),__TASK_pid(%r3) # store pid of next
168	lmg	%r6,%r15,__SF_GPRS(%r15)	# load gprs of next task
169	br	%r14
170
171.L__critical_start:
172
173#if IS_ENABLED(CONFIG_KVM)
174/*
175 * sie64a calling convention:
176 * %r2 pointer to sie control block
177 * %r3 guest register save area
178 */
179ENTRY(sie64a)
180	stmg	%r6,%r14,__SF_GPRS(%r15)	# save kernel registers
181	stg	%r2,__SF_EMPTY(%r15)		# save control block pointer
182	stg	%r3,__SF_EMPTY+8(%r15)		# save guest register save area
183	xc	__SF_EMPTY+16(16,%r15),__SF_EMPTY+16(%r15) # host id & reason
184	tm	__LC_CPU_FLAGS+7,_CIF_FPU	# load guest fp/vx registers ?
185	jno	.Lsie_load_guest_gprs
186	brasl	%r14,load_fpu_regs		# load guest fp/vx regs
187.Lsie_load_guest_gprs:
188	lmg	%r0,%r13,0(%r3)			# load guest gprs 0-13
189	lg	%r14,__LC_GMAP			# get gmap pointer
190	ltgr	%r14,%r14
191	jz	.Lsie_gmap
192	lctlg	%c1,%c1,__GMAP_ASCE(%r14)	# load primary asce
193.Lsie_gmap:
194	lg	%r14,__SF_EMPTY(%r15)		# get control block pointer
195	oi	__SIE_PROG0C+3(%r14),1		# we are going into SIE now
196	tm	__SIE_PROG20+3(%r14),3		# last exit...
197	jnz	.Lsie_skip
198	tm	__LC_CPU_FLAGS+7,_CIF_FPU
199	jo	.Lsie_skip			# exit if fp/vx regs changed
200	tm	__LC_MACHINE_FLAGS+6,0x20	# MACHINE_FLAG_LPP
201	jz	.Lsie_enter
202	.insn	s,0xb2800000,__LC_CURRENT_PID	# set guest id to pid
203.Lsie_enter:
204	sie	0(%r14)
205	tm	__LC_MACHINE_FLAGS+6,0x20	# MACHINE_FLAG_LPP
206	jz	.Lsie_skip
207	.insn	s,0xb2800000,__SF_EMPTY+16(%r15)# set host id
208.Lsie_skip:
209	ni	__SIE_PROG0C+3(%r14),0xfe	# no longer in SIE
210	lctlg	%c1,%c1,__LC_USER_ASCE		# load primary asce
211.Lsie_done:
212# some program checks are suppressing. C code (e.g. do_protection_exception)
213# will rewind the PSW by the ILC, which is 4 bytes in case of SIE. Other
214# instructions between sie64a and .Lsie_done should not cause program
215# interrupts. So lets use a nop (47 00 00 00) as a landing pad.
216# See also .Lcleanup_sie
217.Lrewind_pad:
218	nop	0
219	.globl sie_exit
220sie_exit:
221	lg	%r14,__SF_EMPTY+8(%r15)		# load guest register save area
222	stmg	%r0,%r13,0(%r14)		# save guest gprs 0-13
223	lmg	%r6,%r14,__SF_GPRS(%r15)	# restore kernel registers
224	lg	%r2,__SF_EMPTY+24(%r15)		# return exit reason code
225	br	%r14
226.Lsie_fault:
227	lghi	%r14,-EFAULT
228	stg	%r14,__SF_EMPTY+24(%r15)	# set exit reason code
229	j	sie_exit
230
231	EX_TABLE(.Lrewind_pad,.Lsie_fault)
232	EX_TABLE(sie_exit,.Lsie_fault)
233#endif
234
235/*
236 * SVC interrupt handler routine. System calls are synchronous events and
237 * are executed with interrupts enabled.
238 */
239
240ENTRY(system_call)
241	stpt	__LC_SYNC_ENTER_TIMER
242.Lsysc_stmg:
243	stmg	%r8,%r15,__LC_SAVE_AREA_SYNC
244	lg	%r10,__LC_LAST_BREAK
245	lg	%r12,__LC_THREAD_INFO
246	lghi	%r14,_PIF_SYSCALL
247.Lsysc_per:
248	lg	%r15,__LC_KERNEL_STACK
249	la	%r11,STACK_FRAME_OVERHEAD(%r15)	# pointer to pt_regs
250	LAST_BREAK %r13
251.Lsysc_vtime:
252	UPDATE_VTIME %r10,%r13,__LC_SYNC_ENTER_TIMER
253	stmg	%r0,%r7,__PT_R0(%r11)
254	mvc	__PT_R8(64,%r11),__LC_SAVE_AREA_SYNC
255	mvc	__PT_PSW(16,%r11),__LC_SVC_OLD_PSW
256	mvc	__PT_INT_CODE(4,%r11),__LC_SVC_ILC
257	stg	%r14,__PT_FLAGS(%r11)
258.Lsysc_do_svc:
259	lg	%r10,__TI_sysc_table(%r12)	# address of system call table
260	llgh	%r8,__PT_INT_CODE+2(%r11)
261	slag	%r8,%r8,2			# shift and test for svc 0
262	jnz	.Lsysc_nr_ok
263	# svc 0: system call number in %r1
264	llgfr	%r1,%r1				# clear high word in r1
265	cghi	%r1,NR_syscalls
266	jnl	.Lsysc_nr_ok
267	sth	%r1,__PT_INT_CODE+2(%r11)
268	slag	%r8,%r1,2
269.Lsysc_nr_ok:
270	xc	__SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
271	stg	%r2,__PT_ORIG_GPR2(%r11)
272	stg	%r7,STACK_FRAME_OVERHEAD(%r15)
273	lgf	%r9,0(%r8,%r10)			# get system call add.
274	tm	__TI_flags+7(%r12),_TIF_TRACE
275	jnz	.Lsysc_tracesys
276	basr	%r14,%r9			# call sys_xxxx
277	stg	%r2,__PT_R2(%r11)		# store return value
278
279.Lsysc_return:
280	LOCKDEP_SYS_EXIT
281.Lsysc_tif:
282	tm	__PT_FLAGS+7(%r11),_PIF_WORK
283	jnz	.Lsysc_work
284	tm	__TI_flags+7(%r12),_TIF_WORK
285	jnz	.Lsysc_work			# check for work
286	tm	__LC_CPU_FLAGS+7,_CIF_WORK
287	jnz	.Lsysc_work
288.Lsysc_restore:
289	lg	%r14,__LC_VDSO_PER_CPU
290	lmg	%r0,%r10,__PT_R0(%r11)
291	mvc	__LC_RETURN_PSW(16),__PT_PSW(%r11)
292	stpt	__LC_EXIT_TIMER
293	mvc	__VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER
294	lmg	%r11,%r15,__PT_R11(%r11)
295	lpswe	__LC_RETURN_PSW
296.Lsysc_done:
297
298#
299# One of the work bits is on. Find out which one.
300#
301.Lsysc_work:
302	tm	__LC_CPU_FLAGS+7,_CIF_MCCK_PENDING
303	jo	.Lsysc_mcck_pending
304	tm	__TI_flags+7(%r12),_TIF_NEED_RESCHED
305	jo	.Lsysc_reschedule
306#ifdef CONFIG_UPROBES
307	tm	__TI_flags+7(%r12),_TIF_UPROBE
308	jo	.Lsysc_uprobe_notify
309#endif
310	tm	__PT_FLAGS+7(%r11),_PIF_PER_TRAP
311	jo	.Lsysc_singlestep
312	tm	__TI_flags+7(%r12),_TIF_SIGPENDING
313	jo	.Lsysc_sigpending
314	tm	__TI_flags+7(%r12),_TIF_NOTIFY_RESUME
315	jo	.Lsysc_notify_resume
316	tm	__LC_CPU_FLAGS+7,_CIF_FPU
317	jo	.Lsysc_vxrs
318	tm	__LC_CPU_FLAGS+7,_CIF_ASCE
319	jo	.Lsysc_uaccess
320	j	.Lsysc_return		# beware of critical section cleanup
321
322#
323# _TIF_NEED_RESCHED is set, call schedule
324#
325.Lsysc_reschedule:
326	larl	%r14,.Lsysc_return
327	jg	schedule
328
329#
330# _CIF_MCCK_PENDING is set, call handler
331#
332.Lsysc_mcck_pending:
333	larl	%r14,.Lsysc_return
334	jg	s390_handle_mcck	# TIF bit will be cleared by handler
335
336#
337# _CIF_ASCE is set, load user space asce
338#
339.Lsysc_uaccess:
340	ni	__LC_CPU_FLAGS+7,255-_CIF_ASCE
341	lctlg	%c1,%c1,__LC_USER_ASCE		# load primary asce
342	j	.Lsysc_return
343
344#
345# CIF_FPU is set, restore floating-point controls and floating-point registers.
346#
347.Lsysc_vxrs:
348	larl	%r14,.Lsysc_return
349	jg	load_fpu_regs
350
351#
352# _TIF_SIGPENDING is set, call do_signal
353#
354.Lsysc_sigpending:
355	lgr	%r2,%r11		# pass pointer to pt_regs
356	brasl	%r14,do_signal
357	tm	__PT_FLAGS+7(%r11),_PIF_SYSCALL
358	jno	.Lsysc_return
359	lmg	%r2,%r7,__PT_R2(%r11)	# load svc arguments
360	lg	%r10,__TI_sysc_table(%r12)	# address of system call table
361	lghi	%r8,0			# svc 0 returns -ENOSYS
362	llgh	%r1,__PT_INT_CODE+2(%r11)	# load new svc number
363	cghi	%r1,NR_syscalls
364	jnl	.Lsysc_nr_ok		# invalid svc number -> do svc 0
365	slag	%r8,%r1,2
366	j	.Lsysc_nr_ok		# restart svc
367
368#
369# _TIF_NOTIFY_RESUME is set, call do_notify_resume
370#
371.Lsysc_notify_resume:
372	lgr	%r2,%r11		# pass pointer to pt_regs
373	larl	%r14,.Lsysc_return
374	jg	do_notify_resume
375
376#
377# _TIF_UPROBE is set, call uprobe_notify_resume
378#
379#ifdef CONFIG_UPROBES
380.Lsysc_uprobe_notify:
381	lgr	%r2,%r11		# pass pointer to pt_regs
382	larl	%r14,.Lsysc_return
383	jg	uprobe_notify_resume
384#endif
385
386#
387# _PIF_PER_TRAP is set, call do_per_trap
388#
389.Lsysc_singlestep:
390	ni	__PT_FLAGS+7(%r11),255-_PIF_PER_TRAP
391	lgr	%r2,%r11		# pass pointer to pt_regs
392	larl	%r14,.Lsysc_return
393	jg	do_per_trap
394
395#
396# call tracehook_report_syscall_entry/tracehook_report_syscall_exit before
397# and after the system call
398#
399.Lsysc_tracesys:
400	lgr	%r2,%r11		# pass pointer to pt_regs
401	la	%r3,0
402	llgh	%r0,__PT_INT_CODE+2(%r11)
403	stg	%r0,__PT_R2(%r11)
404	brasl	%r14,do_syscall_trace_enter
405	lghi	%r0,NR_syscalls
406	clgr	%r0,%r2
407	jnh	.Lsysc_tracenogo
408	sllg	%r8,%r2,2
409	lgf	%r9,0(%r8,%r10)
410.Lsysc_tracego:
411	lmg	%r3,%r7,__PT_R3(%r11)
412	stg	%r7,STACK_FRAME_OVERHEAD(%r15)
413	lg	%r2,__PT_ORIG_GPR2(%r11)
414	basr	%r14,%r9		# call sys_xxx
415	stg	%r2,__PT_R2(%r11)	# store return value
416.Lsysc_tracenogo:
417	tm	__TI_flags+7(%r12),_TIF_TRACE
418	jz	.Lsysc_return
419	lgr	%r2,%r11		# pass pointer to pt_regs
420	larl	%r14,.Lsysc_return
421	jg	do_syscall_trace_exit
422
423#
424# a new process exits the kernel with ret_from_fork
425#
426ENTRY(ret_from_fork)
427	la	%r11,STACK_FRAME_OVERHEAD(%r15)
428	lg	%r12,__LC_THREAD_INFO
429	brasl	%r14,schedule_tail
430	TRACE_IRQS_ON
431	ssm	__LC_SVC_NEW_PSW	# reenable interrupts
432	tm	__PT_PSW+1(%r11),0x01	# forking a kernel thread ?
433	jne	.Lsysc_tracenogo
434	# it's a kernel thread
435	lmg	%r9,%r10,__PT_R9(%r11)	# load gprs
436ENTRY(kernel_thread_starter)
437	la	%r2,0(%r10)
438	basr	%r14,%r9
439	j	.Lsysc_tracenogo
440
441/*
442 * Program check handler routine
443 */
444
445ENTRY(pgm_check_handler)
446	stpt	__LC_SYNC_ENTER_TIMER
447	stmg	%r8,%r15,__LC_SAVE_AREA_SYNC
448	lg	%r10,__LC_LAST_BREAK
449	lg	%r12,__LC_THREAD_INFO
450	larl	%r13,cleanup_critical
451	lmg	%r8,%r9,__LC_PGM_OLD_PSW
452	tmhh	%r8,0x0001		# test problem state bit
453	jnz	2f			# -> fault in user space
454#if IS_ENABLED(CONFIG_KVM)
455	# cleanup critical section for sie64a
456	lgr	%r14,%r9
457	slg	%r14,BASED(.Lsie_critical_start)
458	clg	%r14,BASED(.Lsie_critical_length)
459	jhe	0f
460	brasl	%r14,.Lcleanup_sie
461#endif
4620:	tmhh	%r8,0x4000		# PER bit set in old PSW ?
463	jnz	1f			# -> enabled, can't be a double fault
464	tm	__LC_PGM_ILC+3,0x80	# check for per exception
465	jnz	.Lpgm_svcper		# -> single stepped svc
4661:	CHECK_STACK STACK_SIZE,__LC_SAVE_AREA_SYNC
467	aghi	%r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
468	j	3f
4692:	LAST_BREAK %r14
470	UPDATE_VTIME %r14,%r15,__LC_SYNC_ENTER_TIMER
471	lg	%r15,__LC_KERNEL_STACK
472	lg	%r14,__TI_task(%r12)
473	aghi	%r14,__TASK_thread	# pointer to thread_struct
474	lghi	%r13,__LC_PGM_TDB
475	tm	__LC_PGM_ILC+2,0x02	# check for transaction abort
476	jz	3f
477	mvc	__THREAD_trap_tdb(256,%r14),0(%r13)
4783:	la	%r11,STACK_FRAME_OVERHEAD(%r15)
479	stmg	%r0,%r7,__PT_R0(%r11)
480	mvc	__PT_R8(64,%r11),__LC_SAVE_AREA_SYNC
481	stmg	%r8,%r9,__PT_PSW(%r11)
482	mvc	__PT_INT_CODE(4,%r11),__LC_PGM_ILC
483	mvc	__PT_INT_PARM_LONG(8,%r11),__LC_TRANS_EXC_CODE
484	xc	__PT_FLAGS(8,%r11),__PT_FLAGS(%r11)
485	stg	%r10,__PT_ARGS(%r11)
486	tm	__LC_PGM_ILC+3,0x80	# check for per exception
487	jz	4f
488	tmhh	%r8,0x0001		# kernel per event ?
489	jz	.Lpgm_kprobe
490	oi	__PT_FLAGS+7(%r11),_PIF_PER_TRAP
491	mvc	__THREAD_per_address(8,%r14),__LC_PER_ADDRESS
492	mvc	__THREAD_per_cause(2,%r14),__LC_PER_CODE
493	mvc	__THREAD_per_paid(1,%r14),__LC_PER_ACCESS_ID
4944:	REENABLE_IRQS
495	xc	__SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
496	larl	%r1,pgm_check_table
497	llgh	%r10,__PT_INT_CODE+2(%r11)
498	nill	%r10,0x007f
499	sll	%r10,2
500	je	.Lpgm_return
501	lgf	%r1,0(%r10,%r1)		# load address of handler routine
502	lgr	%r2,%r11		# pass pointer to pt_regs
503	basr	%r14,%r1		# branch to interrupt-handler
504.Lpgm_return:
505	LOCKDEP_SYS_EXIT
506	tm	__PT_PSW+1(%r11),0x01	# returning to user ?
507	jno	.Lsysc_restore
508	j	.Lsysc_tif
509
510#
511# PER event in supervisor state, must be kprobes
512#
513.Lpgm_kprobe:
514	REENABLE_IRQS
515	xc	__SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
516	lgr	%r2,%r11		# pass pointer to pt_regs
517	brasl	%r14,do_per_trap
518	j	.Lpgm_return
519
520#
521# single stepped system call
522#
523.Lpgm_svcper:
524	mvc	__LC_RETURN_PSW(8),__LC_SVC_NEW_PSW
525	larl	%r14,.Lsysc_per
526	stg	%r14,__LC_RETURN_PSW+8
527	lghi	%r14,_PIF_SYSCALL | _PIF_PER_TRAP
528	lpswe	__LC_RETURN_PSW		# branch to .Lsysc_per and enable irqs
529
530/*
531 * IO interrupt handler routine
532 */
533ENTRY(io_int_handler)
534	STCK	__LC_INT_CLOCK
535	stpt	__LC_ASYNC_ENTER_TIMER
536	stmg	%r8,%r15,__LC_SAVE_AREA_ASYNC
537	lg	%r10,__LC_LAST_BREAK
538	lg	%r12,__LC_THREAD_INFO
539	larl	%r13,cleanup_critical
540	lmg	%r8,%r9,__LC_IO_OLD_PSW
541	SWITCH_ASYNC __LC_SAVE_AREA_ASYNC,__LC_ASYNC_ENTER_TIMER
542	stmg	%r0,%r7,__PT_R0(%r11)
543	mvc	__PT_R8(64,%r11),__LC_SAVE_AREA_ASYNC
544	stmg	%r8,%r9,__PT_PSW(%r11)
545	mvc	__PT_INT_CODE(12,%r11),__LC_SUBCHANNEL_ID
546	xc	__PT_FLAGS(8,%r11),__PT_FLAGS(%r11)
547	TRACE_IRQS_OFF
548	xc	__SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
549.Lio_loop:
550	lgr	%r2,%r11		# pass pointer to pt_regs
551	lghi	%r3,IO_INTERRUPT
552	tm	__PT_INT_CODE+8(%r11),0x80	# adapter interrupt ?
553	jz	.Lio_call
554	lghi	%r3,THIN_INTERRUPT
555.Lio_call:
556	brasl	%r14,do_IRQ
557	tm	__LC_MACHINE_FLAGS+6,0x10	# MACHINE_FLAG_LPAR
558	jz	.Lio_return
559	tpi	0
560	jz	.Lio_return
561	mvc	__PT_INT_CODE(12,%r11),__LC_SUBCHANNEL_ID
562	j	.Lio_loop
563.Lio_return:
564	LOCKDEP_SYS_EXIT
565	TRACE_IRQS_ON
566.Lio_tif:
567	tm	__TI_flags+7(%r12),_TIF_WORK
568	jnz	.Lio_work		# there is work to do (signals etc.)
569	tm	__LC_CPU_FLAGS+7,_CIF_WORK
570	jnz	.Lio_work
571.Lio_restore:
572	lg	%r14,__LC_VDSO_PER_CPU
573	lmg	%r0,%r10,__PT_R0(%r11)
574	mvc	__LC_RETURN_PSW(16),__PT_PSW(%r11)
575	stpt	__LC_EXIT_TIMER
576	mvc	__VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER
577	lmg	%r11,%r15,__PT_R11(%r11)
578	lpswe	__LC_RETURN_PSW
579.Lio_done:
580
581#
582# There is work todo, find out in which context we have been interrupted:
583# 1) if we return to user space we can do all _TIF_WORK work
584# 2) if we return to kernel code and kvm is enabled check if we need to
585#    modify the psw to leave SIE
586# 3) if we return to kernel code and preemptive scheduling is enabled check
587#    the preemption counter and if it is zero call preempt_schedule_irq
588# Before any work can be done, a switch to the kernel stack is required.
589#
590.Lio_work:
591	tm	__PT_PSW+1(%r11),0x01	# returning to user ?
592	jo	.Lio_work_user		# yes -> do resched & signal
593#ifdef CONFIG_PREEMPT
594	# check for preemptive scheduling
595	icm	%r0,15,__TI_precount(%r12)
596	jnz	.Lio_restore		# preemption is disabled
597	tm	__TI_flags+7(%r12),_TIF_NEED_RESCHED
598	jno	.Lio_restore
599	# switch to kernel stack
600	lg	%r1,__PT_R15(%r11)
601	aghi	%r1,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
602	mvc	STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11)
603	xc	__SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1)
604	la	%r11,STACK_FRAME_OVERHEAD(%r1)
605	lgr	%r15,%r1
606	# TRACE_IRQS_ON already done at .Lio_return, call
607	# TRACE_IRQS_OFF to keep things symmetrical
608	TRACE_IRQS_OFF
609	brasl	%r14,preempt_schedule_irq
610	j	.Lio_return
611#else
612	j	.Lio_restore
613#endif
614
615#
616# Need to do work before returning to userspace, switch to kernel stack
617#
618.Lio_work_user:
619	lg	%r1,__LC_KERNEL_STACK
620	mvc	STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11)
621	xc	__SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1)
622	la	%r11,STACK_FRAME_OVERHEAD(%r1)
623	lgr	%r15,%r1
624
625#
626# One of the work bits is on. Find out which one.
627#
628.Lio_work_tif:
629	tm	__LC_CPU_FLAGS+7,_CIF_MCCK_PENDING
630	jo	.Lio_mcck_pending
631	tm	__TI_flags+7(%r12),_TIF_NEED_RESCHED
632	jo	.Lio_reschedule
633	tm	__TI_flags+7(%r12),_TIF_SIGPENDING
634	jo	.Lio_sigpending
635	tm	__TI_flags+7(%r12),_TIF_NOTIFY_RESUME
636	jo	.Lio_notify_resume
637	tm	__LC_CPU_FLAGS+7,_CIF_FPU
638	jo	.Lio_vxrs
639	tm	__LC_CPU_FLAGS+7,_CIF_ASCE
640	jo	.Lio_uaccess
641	j	.Lio_return		# beware of critical section cleanup
642
643#
644# _CIF_MCCK_PENDING is set, call handler
645#
646.Lio_mcck_pending:
647	# TRACE_IRQS_ON already done at .Lio_return
648	brasl	%r14,s390_handle_mcck	# TIF bit will be cleared by handler
649	TRACE_IRQS_OFF
650	j	.Lio_return
651
652#
653# _CIF_ASCE is set, load user space asce
654#
655.Lio_uaccess:
656	ni	__LC_CPU_FLAGS+7,255-_CIF_ASCE
657	lctlg	%c1,%c1,__LC_USER_ASCE		# load primary asce
658	j	.Lio_return
659
660#
661# CIF_FPU is set, restore floating-point controls and floating-point registers.
662#
663.Lio_vxrs:
664	larl	%r14,.Lio_return
665	jg	load_fpu_regs
666
667#
668# _TIF_NEED_RESCHED is set, call schedule
669#
670.Lio_reschedule:
671	# TRACE_IRQS_ON already done at .Lio_return
672	ssm	__LC_SVC_NEW_PSW	# reenable interrupts
673	brasl	%r14,schedule		# call scheduler
674	ssm	__LC_PGM_NEW_PSW	# disable I/O and ext. interrupts
675	TRACE_IRQS_OFF
676	j	.Lio_return
677
678#
679# _TIF_SIGPENDING or is set, call do_signal
680#
681.Lio_sigpending:
682	# TRACE_IRQS_ON already done at .Lio_return
683	ssm	__LC_SVC_NEW_PSW	# reenable interrupts
684	lgr	%r2,%r11		# pass pointer to pt_regs
685	brasl	%r14,do_signal
686	ssm	__LC_PGM_NEW_PSW	# disable I/O and ext. interrupts
687	TRACE_IRQS_OFF
688	j	.Lio_return
689
690#
691# _TIF_NOTIFY_RESUME or is set, call do_notify_resume
692#
693.Lio_notify_resume:
694	# TRACE_IRQS_ON already done at .Lio_return
695	ssm	__LC_SVC_NEW_PSW	# reenable interrupts
696	lgr	%r2,%r11		# pass pointer to pt_regs
697	brasl	%r14,do_notify_resume
698	ssm	__LC_PGM_NEW_PSW	# disable I/O and ext. interrupts
699	TRACE_IRQS_OFF
700	j	.Lio_return
701
702/*
703 * External interrupt handler routine
704 */
705ENTRY(ext_int_handler)
706	STCK	__LC_INT_CLOCK
707	stpt	__LC_ASYNC_ENTER_TIMER
708	stmg	%r8,%r15,__LC_SAVE_AREA_ASYNC
709	lg	%r10,__LC_LAST_BREAK
710	lg	%r12,__LC_THREAD_INFO
711	larl	%r13,cleanup_critical
712	lmg	%r8,%r9,__LC_EXT_OLD_PSW
713	SWITCH_ASYNC __LC_SAVE_AREA_ASYNC,__LC_ASYNC_ENTER_TIMER
714	stmg	%r0,%r7,__PT_R0(%r11)
715	mvc	__PT_R8(64,%r11),__LC_SAVE_AREA_ASYNC
716	stmg	%r8,%r9,__PT_PSW(%r11)
717	lghi	%r1,__LC_EXT_PARAMS2
718	mvc	__PT_INT_CODE(4,%r11),__LC_EXT_CPU_ADDR
719	mvc	__PT_INT_PARM(4,%r11),__LC_EXT_PARAMS
720	mvc	__PT_INT_PARM_LONG(8,%r11),0(%r1)
721	xc	__PT_FLAGS(8,%r11),__PT_FLAGS(%r11)
722	TRACE_IRQS_OFF
723	xc	__SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
724	lgr	%r2,%r11		# pass pointer to pt_regs
725	lghi	%r3,EXT_INTERRUPT
726	brasl	%r14,do_IRQ
727	j	.Lio_return
728
729/*
730 * Load idle PSW. The second "half" of this function is in .Lcleanup_idle.
731 */
732ENTRY(psw_idle)
733	stg	%r3,__SF_EMPTY(%r15)
734	larl	%r1,.Lpsw_idle_lpsw+4
735	stg	%r1,__SF_EMPTY+8(%r15)
736#ifdef CONFIG_SMP
737	larl	%r1,smp_cpu_mtid
738	llgf	%r1,0(%r1)
739	ltgr	%r1,%r1
740	jz	.Lpsw_idle_stcctm
741	.insn	rsy,0xeb0000000017,%r1,5,__SF_EMPTY+16(%r15)
742.Lpsw_idle_stcctm:
743#endif
744	STCK	__CLOCK_IDLE_ENTER(%r2)
745	stpt	__TIMER_IDLE_ENTER(%r2)
746.Lpsw_idle_lpsw:
747	lpswe	__SF_EMPTY(%r15)
748	br	%r14
749.Lpsw_idle_end:
750
751/* Store floating-point controls and floating-point or vector extension
752 * registers instead.  A critical section cleanup assures that the registers
753 * are stored even if interrupted for some other work.	The register %r2
754 * designates a struct fpu to store register contents.	If the specified
755 * structure does not contain a register save area, the register store is
756 * omitted (see also comments in arch_dup_task_struct()).
757 *
758 * The CIF_FPU flag is set in any case.  The CIF_FPU triggers a lazy restore
759 * of the register contents at system call or io return.
760 */
761ENTRY(save_fpu_regs)
762	lg	%r2,__LC_CURRENT
763	aghi	%r2,__TASK_thread
764	tm	__LC_CPU_FLAGS+7,_CIF_FPU
765	bor	%r14
766	stfpc	__THREAD_FPU_fpc(%r2)
767.Lsave_fpu_regs_fpc_end:
768	lg	%r3,__THREAD_FPU_regs(%r2)
769	ltgr	%r3,%r3
770	jz	.Lsave_fpu_regs_done	  # no save area -> set CIF_FPU
771	tm	__THREAD_FPU_flags+3(%r2),FPU_USE_VX
772	jz	.Lsave_fpu_regs_fp	  # no -> store FP regs
773.Lsave_fpu_regs_vx_low:
774	VSTM	%v0,%v15,0,%r3		  # vstm 0,15,0(3)
775.Lsave_fpu_regs_vx_high:
776	VSTM	%v16,%v31,256,%r3	  # vstm 16,31,256(3)
777	j	.Lsave_fpu_regs_done	  # -> set CIF_FPU flag
778.Lsave_fpu_regs_fp:
779	std	0,0(%r3)
780	std	1,8(%r3)
781	std	2,16(%r3)
782	std	3,24(%r3)
783	std	4,32(%r3)
784	std	5,40(%r3)
785	std	6,48(%r3)
786	std	7,56(%r3)
787	std	8,64(%r3)
788	std	9,72(%r3)
789	std	10,80(%r3)
790	std	11,88(%r3)
791	std	12,96(%r3)
792	std	13,104(%r3)
793	std	14,112(%r3)
794	std	15,120(%r3)
795.Lsave_fpu_regs_done:
796	oi	__LC_CPU_FLAGS+7,_CIF_FPU
797	br	%r14
798.Lsave_fpu_regs_end:
799
800/* Load floating-point controls and floating-point or vector extension
801 * registers.  A critical section cleanup assures that the register contents
802 * are loaded even if interrupted for some other work.	Depending on the saved
803 * FP/VX state, the vector-enablement control, CR0.46, is either set or cleared.
804 *
805 * There are special calling conventions to fit into sysc and io return work:
806 *	%r15:	<kernel stack>
807 * The function requires:
808 *	%r4 and __SF_EMPTY+32(%r15)
809 */
810load_fpu_regs:
811	lg	%r4,__LC_CURRENT
812	aghi	%r4,__TASK_thread
813	tm	__LC_CPU_FLAGS+7,_CIF_FPU
814	bnor	%r14
815	lfpc	__THREAD_FPU_fpc(%r4)
816	stctg	%c0,%c0,__SF_EMPTY+32(%r15)	# store CR0
817	tm	__THREAD_FPU_flags+3(%r4),FPU_USE_VX	# VX-enabled task ?
818	lg	%r4,__THREAD_FPU_regs(%r4)	# %r4 <- reg save area
819	jz	.Lload_fpu_regs_fp_ctl		# -> no VX, load FP regs
820.Lload_fpu_regs_vx_ctl:
821	tm	__SF_EMPTY+32+5(%r15),2		# test VX control
822	jo	.Lload_fpu_regs_vx
823	oi	__SF_EMPTY+32+5(%r15),2		# set VX control
824	lctlg	%c0,%c0,__SF_EMPTY+32(%r15)
825.Lload_fpu_regs_vx:
826	VLM	%v0,%v15,0,%r4
827.Lload_fpu_regs_vx_high:
828	VLM	%v16,%v31,256,%r4
829	j	.Lload_fpu_regs_done
830.Lload_fpu_regs_fp_ctl:
831	tm	__SF_EMPTY+32+5(%r15),2		# test VX control
832	jz	.Lload_fpu_regs_fp
833	ni	__SF_EMPTY+32+5(%r15),253	# clear VX control
834	lctlg	%c0,%c0,__SF_EMPTY+32(%r15)
835.Lload_fpu_regs_fp:
836	ld	0,0(%r4)
837	ld	1,8(%r4)
838	ld	2,16(%r4)
839	ld	3,24(%r4)
840	ld	4,32(%r4)
841	ld	5,40(%r4)
842	ld	6,48(%r4)
843	ld	7,56(%r4)
844	ld	8,64(%r4)
845	ld	9,72(%r4)
846	ld	10,80(%r4)
847	ld	11,88(%r4)
848	ld	12,96(%r4)
849	ld	13,104(%r4)
850	ld	14,112(%r4)
851	ld	15,120(%r4)
852.Lload_fpu_regs_done:
853	ni	__LC_CPU_FLAGS+7,255-_CIF_FPU
854	br	%r14
855.Lload_fpu_regs_end:
856
857/* Test and set the vector enablement control in CR0.46 */
858ENTRY(__ctl_set_vx)
859	stctg	%c0,%c0,__SF_EMPTY(%r15)
860	tm	__SF_EMPTY+5(%r15),2
861	bor	%r14
862	oi	__SF_EMPTY+5(%r15),2
863	lctlg	%c0,%c0,__SF_EMPTY(%r15)
864	br	%r14
865.L__ctl_set_vx_end:
866
867.L__critical_end:
868
869/*
870 * Machine check handler routines
871 */
872ENTRY(mcck_int_handler)
873	STCK	__LC_MCCK_CLOCK
874	la	%r1,4095		# revalidate r1
875	spt	__LC_CPU_TIMER_SAVE_AREA-4095(%r1)	# revalidate cpu timer
876	lmg	%r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)# revalidate gprs
877	lg	%r10,__LC_LAST_BREAK
878	lg	%r12,__LC_THREAD_INFO
879	larl	%r13,cleanup_critical
880	lmg	%r8,%r9,__LC_MCK_OLD_PSW
881	tm	__LC_MCCK_CODE,0x80	# system damage?
882	jo	.Lmcck_panic		# yes -> rest of mcck code invalid
883	lghi	%r14,__LC_CPU_TIMER_SAVE_AREA
884	mvc	__LC_MCCK_ENTER_TIMER(8),0(%r14)
885	tm	__LC_MCCK_CODE+5,0x02	# stored cpu timer value valid?
886	jo	3f
887	la	%r14,__LC_SYNC_ENTER_TIMER
888	clc	0(8,%r14),__LC_ASYNC_ENTER_TIMER
889	jl	0f
890	la	%r14,__LC_ASYNC_ENTER_TIMER
8910:	clc	0(8,%r14),__LC_EXIT_TIMER
892	jl	1f
893	la	%r14,__LC_EXIT_TIMER
8941:	clc	0(8,%r14),__LC_LAST_UPDATE_TIMER
895	jl	2f
896	la	%r14,__LC_LAST_UPDATE_TIMER
8972:	spt	0(%r14)
898	mvc	__LC_MCCK_ENTER_TIMER(8),0(%r14)
8993:	tm	__LC_MCCK_CODE+2,0x09	# mwp + ia of old psw valid?
900	jno	.Lmcck_panic		# no -> skip cleanup critical
901	SWITCH_ASYNC __LC_GPREGS_SAVE_AREA+64,__LC_MCCK_ENTER_TIMER
902.Lmcck_skip:
903	lghi	%r14,__LC_GPREGS_SAVE_AREA+64
904	stmg	%r0,%r7,__PT_R0(%r11)
905	mvc	__PT_R8(64,%r11),0(%r14)
906	stmg	%r8,%r9,__PT_PSW(%r11)
907	xc	__PT_FLAGS(8,%r11),__PT_FLAGS(%r11)
908	xc	__SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
909	lgr	%r2,%r11		# pass pointer to pt_regs
910	brasl	%r14,s390_do_machine_check
911	tm	__PT_PSW+1(%r11),0x01	# returning to user ?
912	jno	.Lmcck_return
913	lg	%r1,__LC_KERNEL_STACK	# switch to kernel stack
914	mvc	STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11)
915	xc	__SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1)
916	la	%r11,STACK_FRAME_OVERHEAD(%r1)
917	lgr	%r15,%r1
918	ssm	__LC_PGM_NEW_PSW	# turn dat on, keep irqs off
919	tm	__LC_CPU_FLAGS+7,_CIF_MCCK_PENDING
920	jno	.Lmcck_return
921	TRACE_IRQS_OFF
922	brasl	%r14,s390_handle_mcck
923	TRACE_IRQS_ON
924.Lmcck_return:
925	lg	%r14,__LC_VDSO_PER_CPU
926	lmg	%r0,%r10,__PT_R0(%r11)
927	mvc	__LC_RETURN_MCCK_PSW(16),__PT_PSW(%r11) # move return PSW
928	tm	__LC_RETURN_MCCK_PSW+1,0x01 # returning to user ?
929	jno	0f
930	stpt	__LC_EXIT_TIMER
931	mvc	__VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER
9320:	lmg	%r11,%r15,__PT_R11(%r11)
933	lpswe	__LC_RETURN_MCCK_PSW
934
935.Lmcck_panic:
936	lg	%r15,__LC_PANIC_STACK
937	aghi	%r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
938	j	.Lmcck_skip
939
940#
941# PSW restart interrupt handler
942#
943ENTRY(restart_int_handler)
944	stg	%r15,__LC_SAVE_AREA_RESTART
945	lg	%r15,__LC_RESTART_STACK
946	aghi	%r15,-__PT_SIZE			# create pt_regs on stack
947	xc	0(__PT_SIZE,%r15),0(%r15)
948	stmg	%r0,%r14,__PT_R0(%r15)
949	mvc	__PT_R15(8,%r15),__LC_SAVE_AREA_RESTART
950	mvc	__PT_PSW(16,%r15),__LC_RST_OLD_PSW # store restart old psw
951	aghi	%r15,-STACK_FRAME_OVERHEAD	# create stack frame on stack
952	xc	0(STACK_FRAME_OVERHEAD,%r15),0(%r15)
953	lg	%r1,__LC_RESTART_FN		# load fn, parm & source cpu
954	lg	%r2,__LC_RESTART_DATA
955	lg	%r3,__LC_RESTART_SOURCE
956	ltgr	%r3,%r3				# test source cpu address
957	jm	1f				# negative -> skip source stop
9580:	sigp	%r4,%r3,SIGP_SENSE		# sigp sense to source cpu
959	brc	10,0b				# wait for status stored
9601:	basr	%r14,%r1			# call function
961	stap	__SF_EMPTY(%r15)		# store cpu address
962	llgh	%r3,__SF_EMPTY(%r15)
9632:	sigp	%r4,%r3,SIGP_STOP		# sigp stop to current cpu
964	brc	2,2b
9653:	j	3b
966
967	.section .kprobes.text, "ax"
968
969#ifdef CONFIG_CHECK_STACK
970/*
971 * The synchronous or the asynchronous stack overflowed. We are dead.
972 * No need to properly save the registers, we are going to panic anyway.
973 * Setup a pt_regs so that show_trace can provide a good call trace.
974 */
975stack_overflow:
976	lg	%r15,__LC_PANIC_STACK	# change to panic stack
977	la	%r11,STACK_FRAME_OVERHEAD(%r15)
978	stmg	%r0,%r7,__PT_R0(%r11)
979	stmg	%r8,%r9,__PT_PSW(%r11)
980	mvc	__PT_R8(64,%r11),0(%r14)
981	stg	%r10,__PT_ORIG_GPR2(%r11) # store last break to orig_gpr2
982	xc	__SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
983	lgr	%r2,%r11		# pass pointer to pt_regs
984	jg	kernel_stack_overflow
985#endif
986
987cleanup_critical:
988#if IS_ENABLED(CONFIG_KVM)
989	clg	%r9,BASED(.Lcleanup_table_sie)	# .Lsie_gmap
990	jl	0f
991	clg	%r9,BASED(.Lcleanup_table_sie+8)# .Lsie_done
992	jl	.Lcleanup_sie
993#endif
994	clg	%r9,BASED(.Lcleanup_table)	# system_call
995	jl	0f
996	clg	%r9,BASED(.Lcleanup_table+8)	# .Lsysc_do_svc
997	jl	.Lcleanup_system_call
998	clg	%r9,BASED(.Lcleanup_table+16)	# .Lsysc_tif
999	jl	0f
1000	clg	%r9,BASED(.Lcleanup_table+24)	# .Lsysc_restore
1001	jl	.Lcleanup_sysc_tif
1002	clg	%r9,BASED(.Lcleanup_table+32)	# .Lsysc_done
1003	jl	.Lcleanup_sysc_restore
1004	clg	%r9,BASED(.Lcleanup_table+40)	# .Lio_tif
1005	jl	0f
1006	clg	%r9,BASED(.Lcleanup_table+48)	# .Lio_restore
1007	jl	.Lcleanup_io_tif
1008	clg	%r9,BASED(.Lcleanup_table+56)	# .Lio_done
1009	jl	.Lcleanup_io_restore
1010	clg	%r9,BASED(.Lcleanup_table+64)	# psw_idle
1011	jl	0f
1012	clg	%r9,BASED(.Lcleanup_table+72)	# .Lpsw_idle_end
1013	jl	.Lcleanup_idle
1014	clg	%r9,BASED(.Lcleanup_table+80)	# save_fpu_regs
1015	jl	0f
1016	clg	%r9,BASED(.Lcleanup_table+88)	# .Lsave_fpu_regs_end
1017	jl	.Lcleanup_save_fpu_regs
1018	clg	%r9,BASED(.Lcleanup_table+96)	# load_fpu_regs
1019	jl	0f
1020	clg	%r9,BASED(.Lcleanup_table+104)	# .Lload_fpu_regs_end
1021	jl	.Lcleanup_load_fpu_regs
1022	clg	%r9,BASED(.Lcleanup_table+112)	# __ctl_set_vx
1023	jl	0f
1024	clg	%r9,BASED(.Lcleanup_table+120)	# .L__ctl_set_vx_end
1025	jl	.Lcleanup___ctl_set_vx
10260:	br	%r14
1027
1028	.align	8
1029.Lcleanup_table:
1030	.quad	system_call
1031	.quad	.Lsysc_do_svc
1032	.quad	.Lsysc_tif
1033	.quad	.Lsysc_restore
1034	.quad	.Lsysc_done
1035	.quad	.Lio_tif
1036	.quad	.Lio_restore
1037	.quad	.Lio_done
1038	.quad	psw_idle
1039	.quad	.Lpsw_idle_end
1040	.quad	save_fpu_regs
1041	.quad	.Lsave_fpu_regs_end
1042	.quad	load_fpu_regs
1043	.quad	.Lload_fpu_regs_end
1044	.quad	__ctl_set_vx
1045	.quad	.L__ctl_set_vx_end
1046
1047#if IS_ENABLED(CONFIG_KVM)
1048.Lcleanup_table_sie:
1049	.quad	.Lsie_gmap
1050	.quad	.Lsie_done
1051
1052.Lcleanup_sie:
1053	lg	%r9,__SF_EMPTY(%r15)		# get control block pointer
1054	tm	__LC_MACHINE_FLAGS+6,0x20	# MACHINE_FLAG_LPP
1055	jz	0f
1056	.insn	s,0xb2800000,__SF_EMPTY+16(%r15)# set host id
10570:	ni	__SIE_PROG0C+3(%r9),0xfe	# no longer in SIE
1058	lctlg	%c1,%c1,__LC_USER_ASCE		# load primary asce
1059	larl	%r9,sie_exit			# skip forward to sie_exit
1060	br	%r14
1061#endif
1062
1063.Lcleanup_system_call:
1064	# check if stpt has been executed
1065	clg	%r9,BASED(.Lcleanup_system_call_insn)
1066	jh	0f
1067	mvc	__LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER
1068	cghi	%r11,__LC_SAVE_AREA_ASYNC
1069	je	0f
1070	mvc	__LC_SYNC_ENTER_TIMER(8),__LC_MCCK_ENTER_TIMER
10710:	# check if stmg has been executed
1072	clg	%r9,BASED(.Lcleanup_system_call_insn+8)
1073	jh	0f
1074	mvc	__LC_SAVE_AREA_SYNC(64),0(%r11)
10750:	# check if base register setup + TIF bit load has been done
1076	clg	%r9,BASED(.Lcleanup_system_call_insn+16)
1077	jhe	0f
1078	# set up saved registers r10 and r12
1079	stg	%r10,16(%r11)		# r10 last break
1080	stg	%r12,32(%r11)		# r12 thread-info pointer
10810:	# check if the user time update has been done
1082	clg	%r9,BASED(.Lcleanup_system_call_insn+24)
1083	jh	0f
1084	lg	%r15,__LC_EXIT_TIMER
1085	slg	%r15,__LC_SYNC_ENTER_TIMER
1086	alg	%r15,__LC_USER_TIMER
1087	stg	%r15,__LC_USER_TIMER
10880:	# check if the system time update has been done
1089	clg	%r9,BASED(.Lcleanup_system_call_insn+32)
1090	jh	0f
1091	lg	%r15,__LC_LAST_UPDATE_TIMER
1092	slg	%r15,__LC_EXIT_TIMER
1093	alg	%r15,__LC_SYSTEM_TIMER
1094	stg	%r15,__LC_SYSTEM_TIMER
10950:	# update accounting time stamp
1096	mvc	__LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
1097	# do LAST_BREAK
1098	lg	%r9,16(%r11)
1099	srag	%r9,%r9,23
1100	jz	0f
1101	mvc	__TI_last_break(8,%r12),16(%r11)
11020:	# set up saved register r11
1103	lg	%r15,__LC_KERNEL_STACK
1104	la	%r9,STACK_FRAME_OVERHEAD(%r15)
1105	stg	%r9,24(%r11)		# r11 pt_regs pointer
1106	# fill pt_regs
1107	mvc	__PT_R8(64,%r9),__LC_SAVE_AREA_SYNC
1108	stmg	%r0,%r7,__PT_R0(%r9)
1109	mvc	__PT_PSW(16,%r9),__LC_SVC_OLD_PSW
1110	mvc	__PT_INT_CODE(4,%r9),__LC_SVC_ILC
1111	xc	__PT_FLAGS(8,%r9),__PT_FLAGS(%r9)
1112	mvi	__PT_FLAGS+7(%r9),_PIF_SYSCALL
1113	# setup saved register r15
1114	stg	%r15,56(%r11)		# r15 stack pointer
1115	# set new psw address and exit
1116	larl	%r9,.Lsysc_do_svc
1117	br	%r14
1118.Lcleanup_system_call_insn:
1119	.quad	system_call
1120	.quad	.Lsysc_stmg
1121	.quad	.Lsysc_per
1122	.quad	.Lsysc_vtime+36
1123	.quad	.Lsysc_vtime+42
1124
1125.Lcleanup_sysc_tif:
1126	larl	%r9,.Lsysc_tif
1127	br	%r14
1128
1129.Lcleanup_sysc_restore:
1130	clg	%r9,BASED(.Lcleanup_sysc_restore_insn)
1131	je	0f
1132	lg	%r9,24(%r11)		# get saved pointer to pt_regs
1133	mvc	__LC_RETURN_PSW(16),__PT_PSW(%r9)
1134	mvc	0(64,%r11),__PT_R8(%r9)
1135	lmg	%r0,%r7,__PT_R0(%r9)
11360:	lmg	%r8,%r9,__LC_RETURN_PSW
1137	br	%r14
1138.Lcleanup_sysc_restore_insn:
1139	.quad	.Lsysc_done - 4
1140
1141.Lcleanup_io_tif:
1142	larl	%r9,.Lio_tif
1143	br	%r14
1144
1145.Lcleanup_io_restore:
1146	clg	%r9,BASED(.Lcleanup_io_restore_insn)
1147	je	0f
1148	lg	%r9,24(%r11)		# get saved r11 pointer to pt_regs
1149	mvc	__LC_RETURN_PSW(16),__PT_PSW(%r9)
1150	mvc	0(64,%r11),__PT_R8(%r9)
1151	lmg	%r0,%r7,__PT_R0(%r9)
11520:	lmg	%r8,%r9,__LC_RETURN_PSW
1153	br	%r14
1154.Lcleanup_io_restore_insn:
1155	.quad	.Lio_done - 4
1156
1157.Lcleanup_idle:
1158	# copy interrupt clock & cpu timer
1159	mvc	__CLOCK_IDLE_EXIT(8,%r2),__LC_INT_CLOCK
1160	mvc	__TIMER_IDLE_EXIT(8,%r2),__LC_ASYNC_ENTER_TIMER
1161	cghi	%r11,__LC_SAVE_AREA_ASYNC
1162	je	0f
1163	mvc	__CLOCK_IDLE_EXIT(8,%r2),__LC_MCCK_CLOCK
1164	mvc	__TIMER_IDLE_EXIT(8,%r2),__LC_MCCK_ENTER_TIMER
11650:	# check if stck & stpt have been executed
1166	clg	%r9,BASED(.Lcleanup_idle_insn)
1167	jhe	1f
1168	mvc	__CLOCK_IDLE_ENTER(8,%r2),__CLOCK_IDLE_EXIT(%r2)
1169	mvc	__TIMER_IDLE_ENTER(8,%r2),__TIMER_IDLE_EXIT(%r2)
11701:	# calculate idle cycles
1171#ifdef CONFIG_SMP
1172	clg	%r9,BASED(.Lcleanup_idle_insn)
1173	jl	3f
1174	larl	%r1,smp_cpu_mtid
1175	llgf	%r1,0(%r1)
1176	ltgr	%r1,%r1
1177	jz	3f
1178	.insn	rsy,0xeb0000000017,%r1,5,__SF_EMPTY+80(%r15)
1179	larl	%r3,mt_cycles
1180	ag	%r3,__LC_PERCPU_OFFSET
1181	la	%r4,__SF_EMPTY+16(%r15)
11822:	lg	%r0,0(%r3)
1183	slg	%r0,0(%r4)
1184	alg	%r0,64(%r4)
1185	stg	%r0,0(%r3)
1186	la	%r3,8(%r3)
1187	la	%r4,8(%r4)
1188	brct	%r1,2b
1189#endif
11903:	# account system time going idle
1191	lg	%r9,__LC_STEAL_TIMER
1192	alg	%r9,__CLOCK_IDLE_ENTER(%r2)
1193	slg	%r9,__LC_LAST_UPDATE_CLOCK
1194	stg	%r9,__LC_STEAL_TIMER
1195	mvc	__LC_LAST_UPDATE_CLOCK(8),__CLOCK_IDLE_EXIT(%r2)
1196	lg	%r9,__LC_SYSTEM_TIMER
1197	alg	%r9,__LC_LAST_UPDATE_TIMER
1198	slg	%r9,__TIMER_IDLE_ENTER(%r2)
1199	stg	%r9,__LC_SYSTEM_TIMER
1200	mvc	__LC_LAST_UPDATE_TIMER(8),__TIMER_IDLE_EXIT(%r2)
1201	# prepare return psw
1202	nihh	%r8,0xfcfd		# clear irq & wait state bits
1203	lg	%r9,48(%r11)		# return from psw_idle
1204	br	%r14
1205.Lcleanup_idle_insn:
1206	.quad	.Lpsw_idle_lpsw
1207
1208.Lcleanup_save_fpu_regs:
1209	tm	__LC_CPU_FLAGS+7,_CIF_FPU
1210	bor	%r14
1211	clg	%r9,BASED(.Lcleanup_save_fpu_regs_done)
1212	jhe	5f
1213	clg	%r9,BASED(.Lcleanup_save_fpu_regs_fp)
1214	jhe	4f
1215	clg	%r9,BASED(.Lcleanup_save_fpu_regs_vx_high)
1216	jhe	3f
1217	clg	%r9,BASED(.Lcleanup_save_fpu_regs_vx_low)
1218	jhe	2f
1219	clg	%r9,BASED(.Lcleanup_save_fpu_fpc_end)
1220	jhe	1f
1221	lg	%r2,__LC_CURRENT
1222	aghi	%r2,__TASK_thread
12230:	# Store floating-point controls
1224	stfpc	__THREAD_FPU_fpc(%r2)
12251:	# Load register save area and check if VX is active
1226	lg	%r3,__THREAD_FPU_regs(%r2)
1227	ltgr	%r3,%r3
1228	jz	5f			  # no save area -> set CIF_FPU
1229	tm	__THREAD_FPU_flags+3(%r2),FPU_USE_VX
1230	jz	4f			  # no VX -> store FP regs
12312:	# Store vector registers (V0-V15)
1232	VSTM	%v0,%v15,0,%r3		  # vstm 0,15,0(3)
12333:	# Store vector registers (V16-V31)
1234	VSTM	%v16,%v31,256,%r3	  # vstm 16,31,256(3)
1235	j	5f			  # -> done, set CIF_FPU flag
12364:	# Store floating-point registers
1237	std	0,0(%r3)
1238	std	1,8(%r3)
1239	std	2,16(%r3)
1240	std	3,24(%r3)
1241	std	4,32(%r3)
1242	std	5,40(%r3)
1243	std	6,48(%r3)
1244	std	7,56(%r3)
1245	std	8,64(%r3)
1246	std	9,72(%r3)
1247	std	10,80(%r3)
1248	std	11,88(%r3)
1249	std	12,96(%r3)
1250	std	13,104(%r3)
1251	std	14,112(%r3)
1252	std	15,120(%r3)
12535:	# Set CIF_FPU flag
1254	oi	__LC_CPU_FLAGS+7,_CIF_FPU
1255	lg	%r9,48(%r11)		# return from save_fpu_regs
1256	br	%r14
1257.Lcleanup_save_fpu_fpc_end:
1258	.quad	.Lsave_fpu_regs_fpc_end
1259.Lcleanup_save_fpu_regs_vx_low:
1260	.quad	.Lsave_fpu_regs_vx_low
1261.Lcleanup_save_fpu_regs_vx_high:
1262	.quad	.Lsave_fpu_regs_vx_high
1263.Lcleanup_save_fpu_regs_fp:
1264	.quad	.Lsave_fpu_regs_fp
1265.Lcleanup_save_fpu_regs_done:
1266	.quad	.Lsave_fpu_regs_done
1267
1268.Lcleanup_load_fpu_regs:
1269	tm	__LC_CPU_FLAGS+7,_CIF_FPU
1270	bnor	%r14
1271	clg	%r9,BASED(.Lcleanup_load_fpu_regs_done)
1272	jhe	1f
1273	clg	%r9,BASED(.Lcleanup_load_fpu_regs_fp)
1274	jhe	2f
1275	clg	%r9,BASED(.Lcleanup_load_fpu_regs_fp_ctl)
1276	jhe	3f
1277	clg	%r9,BASED(.Lcleanup_load_fpu_regs_vx_high)
1278	jhe	4f
1279	clg	%r9,BASED(.Lcleanup_load_fpu_regs_vx)
1280	jhe	5f
1281	clg	%r9,BASED(.Lcleanup_load_fpu_regs_vx_ctl)
1282	jhe	6f
1283	lg	%r4,__LC_CURRENT
1284	aghi	%r4,__TASK_thread
1285	lfpc	__THREAD_FPU_fpc(%r4)
1286	tm	__THREAD_FPU_flags+3(%r4),FPU_USE_VX	# VX-enabled task ?
1287	lg	%r4,__THREAD_FPU_regs(%r4)	# %r4 <- reg save area
1288	jz	3f				# -> no VX, load FP regs
12896:	# Set VX-enablement control
1290	stctg	%c0,%c0,__SF_EMPTY+32(%r15)	# store CR0
1291	tm	__SF_EMPTY+32+5(%r15),2		# test VX control
1292	jo	5f
1293	oi	__SF_EMPTY+32+5(%r15),2		# set VX control
1294	lctlg	%c0,%c0,__SF_EMPTY+32(%r15)
12955:	# Load V0 ..V15 registers
1296	VLM	%v0,%v15,0,%r4
12974:	# Load V16..V31 registers
1298	VLM	%v16,%v31,256,%r4
1299	j	1f
13003:	# Clear VX-enablement control for FP
1301	stctg	%c0,%c0,__SF_EMPTY+32(%r15)	# store CR0
1302	tm	__SF_EMPTY+32+5(%r15),2		# test VX control
1303	jz	2f
1304	ni	__SF_EMPTY+32+5(%r15),253	# clear VX control
1305	lctlg	%c0,%c0,__SF_EMPTY+32(%r15)
13062:	# Load floating-point registers
1307	ld	0,0(%r4)
1308	ld	1,8(%r4)
1309	ld	2,16(%r4)
1310	ld	3,24(%r4)
1311	ld	4,32(%r4)
1312	ld	5,40(%r4)
1313	ld	6,48(%r4)
1314	ld	7,56(%r4)
1315	ld	8,64(%r4)
1316	ld	9,72(%r4)
1317	ld	10,80(%r4)
1318	ld	11,88(%r4)
1319	ld	12,96(%r4)
1320	ld	13,104(%r4)
1321	ld	14,112(%r4)
1322	ld	15,120(%r4)
13231:	# Clear CIF_FPU bit
1324	ni	__LC_CPU_FLAGS+7,255-_CIF_FPU
1325	lg	%r9,48(%r11)		# return from load_fpu_regs
1326	br	%r14
1327.Lcleanup_load_fpu_regs_vx_ctl:
1328	.quad	.Lload_fpu_regs_vx_ctl
1329.Lcleanup_load_fpu_regs_vx:
1330	.quad	.Lload_fpu_regs_vx
1331.Lcleanup_load_fpu_regs_vx_high:
1332	.quad	.Lload_fpu_regs_vx_high
1333.Lcleanup_load_fpu_regs_fp_ctl:
1334	.quad	.Lload_fpu_regs_fp_ctl
1335.Lcleanup_load_fpu_regs_fp:
1336	.quad	.Lload_fpu_regs_fp
1337.Lcleanup_load_fpu_regs_done:
1338	.quad	.Lload_fpu_regs_done
1339
1340.Lcleanup___ctl_set_vx:
1341	stctg	%c0,%c0,__SF_EMPTY(%r15)
1342	tm	__SF_EMPTY+5(%r15),2
1343	bor	%r14
1344	oi	__SF_EMPTY+5(%r15),2
1345	lctlg	%c0,%c0,__SF_EMPTY(%r15)
1346	lg	%r9,48(%r11)		# return from __ctl_set_vx
1347	br	%r14
1348
1349/*
1350 * Integer constants
1351 */
1352	.align	8
1353.Lcritical_start:
1354	.quad	.L__critical_start
1355.Lcritical_length:
1356	.quad	.L__critical_end - .L__critical_start
1357#if IS_ENABLED(CONFIG_KVM)
1358.Lsie_critical_start:
1359	.quad	.Lsie_gmap
1360.Lsie_critical_length:
1361	.quad	.Lsie_done - .Lsie_gmap
1362#endif
1363
1364	.section .rodata, "a"
1365#define SYSCALL(esame,emu)	.long esame
1366	.globl	sys_call_table
1367sys_call_table:
1368#include "syscalls.S"
1369#undef SYSCALL
1370
1371#ifdef CONFIG_COMPAT
1372
1373#define SYSCALL(esame,emu)	.long emu
1374	.globl	sys_call_table_emu
1375sys_call_table_emu:
1376#include "syscalls.S"
1377#undef SYSCALL
1378#endif
1379