xref: /linux/arch/s390/kernel/entry.S (revision 93d546399c2b7d66a54d5fbd5eee17de19246bf6)
1/*
2 *  arch/s390/kernel/entry.S
3 *    S390 low-level entry points.
4 *
5 *    Copyright (C) IBM Corp. 1999,2006
6 *    Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
7 *		 Hartmut Penner (hp@de.ibm.com),
8 *		 Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
9 *		 Heiko Carstens <heiko.carstens@de.ibm.com>
10 */
11
12#include <linux/sys.h>
13#include <linux/linkage.h>
14#include <linux/init.h>
15#include <asm/cache.h>
16#include <asm/lowcore.h>
17#include <asm/errno.h>
18#include <asm/ptrace.h>
19#include <asm/thread_info.h>
20#include <asm/asm-offsets.h>
21#include <asm/unistd.h>
22#include <asm/page.h>
23
24/*
25 * Stack layout for the system_call stack entry.
26 * The first few entries are identical to the user_regs_struct.
27 */
28SP_PTREGS    =	STACK_FRAME_OVERHEAD
29SP_ARGS      =	STACK_FRAME_OVERHEAD + __PT_ARGS
30SP_PSW	     =	STACK_FRAME_OVERHEAD + __PT_PSW
31SP_R0	     =	STACK_FRAME_OVERHEAD + __PT_GPRS
32SP_R1	     =	STACK_FRAME_OVERHEAD + __PT_GPRS + 4
33SP_R2	     =	STACK_FRAME_OVERHEAD + __PT_GPRS + 8
34SP_R3	     =	STACK_FRAME_OVERHEAD + __PT_GPRS + 12
35SP_R4	     =	STACK_FRAME_OVERHEAD + __PT_GPRS + 16
36SP_R5	     =	STACK_FRAME_OVERHEAD + __PT_GPRS + 20
37SP_R6	     =	STACK_FRAME_OVERHEAD + __PT_GPRS + 24
38SP_R7	     =	STACK_FRAME_OVERHEAD + __PT_GPRS + 28
39SP_R8	     =	STACK_FRAME_OVERHEAD + __PT_GPRS + 32
40SP_R9	     =	STACK_FRAME_OVERHEAD + __PT_GPRS + 36
41SP_R10	     =	STACK_FRAME_OVERHEAD + __PT_GPRS + 40
42SP_R11	     =	STACK_FRAME_OVERHEAD + __PT_GPRS + 44
43SP_R12	     =	STACK_FRAME_OVERHEAD + __PT_GPRS + 48
44SP_R13	     =	STACK_FRAME_OVERHEAD + __PT_GPRS + 52
45SP_R14	     =	STACK_FRAME_OVERHEAD + __PT_GPRS + 56
46SP_R15	     =	STACK_FRAME_OVERHEAD + __PT_GPRS + 60
47SP_ORIG_R2   =	STACK_FRAME_OVERHEAD + __PT_ORIG_GPR2
48SP_ILC	     =	STACK_FRAME_OVERHEAD + __PT_ILC
49SP_SVCNR     =	STACK_FRAME_OVERHEAD + __PT_SVCNR
50SP_SIZE      =	STACK_FRAME_OVERHEAD + __PT_SIZE
51
52_TIF_WORK_SVC = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \
53		 _TIF_MCCK_PENDING | _TIF_RESTART_SVC | _TIF_SINGLE_STEP )
54_TIF_WORK_INT = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \
55		 _TIF_MCCK_PENDING)
56
57STACK_SHIFT = PAGE_SHIFT + THREAD_ORDER
58STACK_SIZE  = 1 << STACK_SHIFT
59
60#define BASED(name) name-system_call(%r13)
61
62#ifdef CONFIG_TRACE_IRQFLAGS
63	.macro	TRACE_IRQS_ON
64	basr	%r2,%r0
65	l	%r1,BASED(.Ltrace_irq_on_caller)
66	basr	%r14,%r1
67	.endm
68
69	.macro	TRACE_IRQS_OFF
70	basr	%r2,%r0
71	l	%r1,BASED(.Ltrace_irq_off_caller)
72	basr	%r14,%r1
73	.endm
74
75	.macro	TRACE_IRQS_CHECK
76	basr	%r2,%r0
77	tm	SP_PSW(%r15),0x03	# irqs enabled?
78	jz	0f
79	l	%r1,BASED(.Ltrace_irq_on_caller)
80	basr	%r14,%r1
81	j	1f
820:	l	%r1,BASED(.Ltrace_irq_off_caller)
83	basr	%r14,%r1
841:
85	.endm
86#else
87#define TRACE_IRQS_ON
88#define TRACE_IRQS_OFF
89#define TRACE_IRQS_CHECK
90#endif
91
92#ifdef CONFIG_LOCKDEP
93	.macro	LOCKDEP_SYS_EXIT
94	tm	SP_PSW+1(%r15),0x01	# returning to user ?
95	jz	0f
96	l	%r1,BASED(.Llockdep_sys_exit)
97	basr	%r14,%r1
980:
99	.endm
100#else
101#define LOCKDEP_SYS_EXIT
102#endif
103
104/*
105 * Register usage in interrupt handlers:
106 *    R9  - pointer to current task structure
107 *    R13 - pointer to literal pool
108 *    R14 - return register for function calls
109 *    R15 - kernel stack pointer
110 */
111
112	.macro	STORE_TIMER lc_offset
113#ifdef CONFIG_VIRT_CPU_ACCOUNTING
114	stpt	\lc_offset
115#endif
116	.endm
117
118#ifdef CONFIG_VIRT_CPU_ACCOUNTING
119	.macro	UPDATE_VTIME lc_from,lc_to,lc_sum
120	lm	%r10,%r11,\lc_from
121	sl	%r10,\lc_to
122	sl	%r11,\lc_to+4
123	bc	3,BASED(0f)
124	sl	%r10,BASED(.Lc_1)
1250:	al	%r10,\lc_sum
126	al	%r11,\lc_sum+4
127	bc	12,BASED(1f)
128	al	%r10,BASED(.Lc_1)
1291:	stm	%r10,%r11,\lc_sum
130	.endm
131#endif
132
133	.macro	SAVE_ALL_BASE savearea
134	stm	%r12,%r15,\savearea
135	l	%r13,__LC_SVC_NEW_PSW+4	# load &system_call to %r13
136	.endm
137
138	.macro	SAVE_ALL_SVC psworg,savearea
139	la	%r12,\psworg
140	l	%r15,__LC_KERNEL_STACK	# problem state -> load ksp
141	.endm
142
143	.macro	SAVE_ALL_SYNC psworg,savearea
144	la	%r12,\psworg
145	tm	\psworg+1,0x01		# test problem state bit
146	bz	BASED(2f)		# skip stack setup save
147	l	%r15,__LC_KERNEL_STACK	# problem state -> load ksp
148#ifdef CONFIG_CHECK_STACK
149	b	BASED(3f)
1502:	tml	%r15,STACK_SIZE - CONFIG_STACK_GUARD
151	bz	BASED(stack_overflow)
1523:
153#endif
1542:
155	.endm
156
157	.macro	SAVE_ALL_ASYNC psworg,savearea
158	la	%r12,\psworg
159	tm	\psworg+1,0x01		# test problem state bit
160	bnz	BASED(1f)		# from user -> load async stack
161	clc	\psworg+4(4),BASED(.Lcritical_end)
162	bhe	BASED(0f)
163	clc	\psworg+4(4),BASED(.Lcritical_start)
164	bl	BASED(0f)
165	l	%r14,BASED(.Lcleanup_critical)
166	basr	%r14,%r14
167	tm	1(%r12),0x01		# retest problem state after cleanup
168	bnz	BASED(1f)
1690:	l	%r14,__LC_ASYNC_STACK	# are we already on the async stack ?
170	slr	%r14,%r15
171	sra	%r14,STACK_SHIFT
172	be	BASED(2f)
1731:	l	%r15,__LC_ASYNC_STACK
174#ifdef CONFIG_CHECK_STACK
175	b	BASED(3f)
1762:	tml	%r15,STACK_SIZE - CONFIG_STACK_GUARD
177	bz	BASED(stack_overflow)
1783:
179#endif
1802:
181	.endm
182
183	.macro	CREATE_STACK_FRAME psworg,savearea
184	s	%r15,BASED(.Lc_spsize)	# make room for registers & psw
185	mvc	SP_PSW(8,%r15),0(%r12)	# move user PSW to stack
186	st	%r2,SP_ORIG_R2(%r15)	# store original content of gpr 2
187	icm	%r12,3,__LC_SVC_ILC
188	stm	%r0,%r11,SP_R0(%r15)	# store gprs %r0-%r11 to kernel stack
189	st	%r12,SP_SVCNR(%r15)
190	mvc	SP_R12(16,%r15),\savearea # move %r12-%r15 to stack
191	la	%r12,0
192	st	%r12,__SF_BACKCHAIN(%r15)	# clear back chain
193	.endm
194
195	.macro	RESTORE_ALL psworg,sync
196	mvc	\psworg(8),SP_PSW(%r15) # move user PSW to lowcore
197	.if !\sync
198	ni	\psworg+1,0xfd		# clear wait state bit
199	.endif
200	lm	%r0,%r15,SP_R0(%r15)	# load gprs 0-15 of user
201	STORE_TIMER __LC_EXIT_TIMER
202	lpsw	\psworg			# back to caller
203	.endm
204
205/*
206 * Scheduler resume function, called by switch_to
207 *  gpr2 = (task_struct *) prev
208 *  gpr3 = (task_struct *) next
209 * Returns:
210 *  gpr2 = prev
211 */
212	.globl	__switch_to
213__switch_to:
214	basr	%r1,0
215__switch_to_base:
216	tm	__THREAD_per(%r3),0xe8		# new process is using per ?
217	bz	__switch_to_noper-__switch_to_base(%r1)	# if not we're fine
218	stctl	%c9,%c11,__SF_EMPTY(%r15)	# We are using per stuff
219	clc	__THREAD_per(12,%r3),__SF_EMPTY(%r15)
220	be	__switch_to_noper-__switch_to_base(%r1)	# we got away w/o bashing TLB's
221	lctl	%c9,%c11,__THREAD_per(%r3)	# Nope we didn't
222__switch_to_noper:
223	l	%r4,__THREAD_info(%r2)		# get thread_info of prev
224	tm	__TI_flags+3(%r4),_TIF_MCCK_PENDING # machine check pending?
225	bz	__switch_to_no_mcck-__switch_to_base(%r1)
226	ni	__TI_flags+3(%r4),255-_TIF_MCCK_PENDING # clear flag in prev
227	l	%r4,__THREAD_info(%r3)		# get thread_info of next
228	oi	__TI_flags+3(%r4),_TIF_MCCK_PENDING # set it in next
229__switch_to_no_mcck:
230	stm	%r6,%r15,__SF_GPRS(%r15)# store __switch_to registers of prev task
231	st	%r15,__THREAD_ksp(%r2)	# store kernel stack to prev->tss.ksp
232	l	%r15,__THREAD_ksp(%r3)	# load kernel stack from next->tss.ksp
233	lm	%r6,%r15,__SF_GPRS(%r15)# load __switch_to registers of next task
234	st	%r3,__LC_CURRENT	# __LC_CURRENT = current task struct
235	lctl	%c4,%c4,__TASK_pid(%r3) # load pid to control reg. 4
236	l	%r3,__THREAD_info(%r3)	# load thread_info from task struct
237	st	%r3,__LC_THREAD_INFO
238	ahi	%r3,STACK_SIZE
239	st	%r3,__LC_KERNEL_STACK	# __LC_KERNEL_STACK = new kernel stack
240	br	%r14
241
242__critical_start:
243/*
244 * SVC interrupt handler routine. System calls are synchronous events and
245 * are executed with interrupts enabled.
246 */
247
248	.globl	system_call
249system_call:
250	STORE_TIMER __LC_SYNC_ENTER_TIMER
251sysc_saveall:
252	SAVE_ALL_BASE __LC_SAVE_AREA
253	SAVE_ALL_SVC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
254	CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
255	lh	%r7,0x8a	  # get svc number from lowcore
256#ifdef CONFIG_VIRT_CPU_ACCOUNTING
257sysc_vtime:
258	UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
259sysc_stime:
260	UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
261sysc_update:
262	mvc	__LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
263#endif
264sysc_do_svc:
265	l	%r9,__LC_THREAD_INFO	# load pointer to thread_info struct
266	ltr	%r7,%r7			# test for svc 0
267	bnz	BASED(sysc_nr_ok)	# svc number > 0
268	# svc 0: system call number in %r1
269	cl	%r1,BASED(.Lnr_syscalls)
270	bnl	BASED(sysc_nr_ok)
271	lr	%r7,%r1 	  # copy svc number to %r7
272sysc_nr_ok:
273	mvc	SP_ARGS(4,%r15),SP_R7(%r15)
274sysc_do_restart:
275	sth	%r7,SP_SVCNR(%r15)
276	sll	%r7,2		  # svc number *4
277	l	%r8,BASED(.Lsysc_table)
278	tm	__TI_flags+3(%r9),(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT)
279	l	%r8,0(%r7,%r8)	  # get system call addr.
280	bnz	BASED(sysc_tracesys)
281	basr	%r14,%r8	  # call sys_xxxx
282	st	%r2,SP_R2(%r15)   # store return value (change R2 on stack)
283
284sysc_return:
285	tm	__TI_flags+3(%r9),_TIF_WORK_SVC
286	bnz	BASED(sysc_work)  # there is work to do (signals etc.)
287sysc_restore:
288#ifdef CONFIG_TRACE_IRQFLAGS
289	la	%r1,BASED(sysc_restore_trace_psw)
290	lpsw	0(%r1)
291sysc_restore_trace:
292	TRACE_IRQS_CHECK
293	LOCKDEP_SYS_EXIT
294#endif
295sysc_leave:
296	RESTORE_ALL __LC_RETURN_PSW,1
297sysc_done:
298
299#ifdef CONFIG_TRACE_IRQFLAGS
300	.align	8
301	.globl	sysc_restore_trace_psw
302sysc_restore_trace_psw:
303	.long	0, sysc_restore_trace + 0x80000000
304#endif
305
306#
307# recheck if there is more work to do
308#
309sysc_work_loop:
310	tm	__TI_flags+3(%r9),_TIF_WORK_SVC
311	bz	BASED(sysc_restore)	# there is no work to do
312#
313# One of the work bits is on. Find out which one.
314#
315sysc_work:
316	tm	SP_PSW+1(%r15),0x01	# returning to user ?
317	bno	BASED(sysc_restore)
318	tm	__TI_flags+3(%r9),_TIF_MCCK_PENDING
319	bo	BASED(sysc_mcck_pending)
320	tm	__TI_flags+3(%r9),_TIF_NEED_RESCHED
321	bo	BASED(sysc_reschedule)
322	tm	__TI_flags+3(%r9),_TIF_SIGPENDING
323	bnz	BASED(sysc_sigpending)
324	tm	__TI_flags+3(%r9),_TIF_NOTIFY_RESUME
325	bnz	BASED(sysc_notify_resume)
326	tm	__TI_flags+3(%r9),_TIF_RESTART_SVC
327	bo	BASED(sysc_restart)
328	tm	__TI_flags+3(%r9),_TIF_SINGLE_STEP
329	bo	BASED(sysc_singlestep)
330	b	BASED(sysc_restore)
331sysc_work_done:
332
333#
334# _TIF_NEED_RESCHED is set, call schedule
335#
336sysc_reschedule:
337	l	%r1,BASED(.Lschedule)
338	la	%r14,BASED(sysc_work_loop)
339	br	%r1			# call scheduler
340
341#
342# _TIF_MCCK_PENDING is set, call handler
343#
344sysc_mcck_pending:
345	l	%r1,BASED(.Ls390_handle_mcck)
346	la	%r14,BASED(sysc_work_loop)
347	br	%r1			# TIF bit will be cleared by handler
348
349#
350# _TIF_SIGPENDING is set, call do_signal
351#
352sysc_sigpending:
353	ni	__TI_flags+3(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP
354	la	%r2,SP_PTREGS(%r15)	# load pt_regs
355	l	%r1,BASED(.Ldo_signal)
356	basr	%r14,%r1		# call do_signal
357	tm	__TI_flags+3(%r9),_TIF_RESTART_SVC
358	bo	BASED(sysc_restart)
359	tm	__TI_flags+3(%r9),_TIF_SINGLE_STEP
360	bo	BASED(sysc_singlestep)
361	b	BASED(sysc_work_loop)
362
363#
364# _TIF_NOTIFY_RESUME is set, call do_notify_resume
365#
366sysc_notify_resume:
367	la	%r2,SP_PTREGS(%r15)	# load pt_regs
368	l	%r1,BASED(.Ldo_notify_resume)
369	la	%r14,BASED(sysc_work_loop)
370	br	%r1			# call do_notify_resume
371
372
373#
374# _TIF_RESTART_SVC is set, set up registers and restart svc
375#
376sysc_restart:
377	ni	__TI_flags+3(%r9),255-_TIF_RESTART_SVC # clear TIF_RESTART_SVC
378	l	%r7,SP_R2(%r15) 	# load new svc number
379	mvc	SP_R2(4,%r15),SP_ORIG_R2(%r15) # restore first argument
380	lm	%r2,%r6,SP_R2(%r15)	# load svc arguments
381	b	BASED(sysc_do_restart)	# restart svc
382
383#
384# _TIF_SINGLE_STEP is set, call do_single_step
385#
386sysc_singlestep:
387	ni	__TI_flags+3(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP
388	mvi	SP_SVCNR(%r15),0xff	# set trap indication to pgm check
389	mvi	SP_SVCNR+1(%r15),0xff
390	la	%r2,SP_PTREGS(%r15)	# address of register-save area
391	l	%r1,BASED(.Lhandle_per)	# load adr. of per handler
392	la	%r14,BASED(sysc_return)	# load adr. of system return
393	br	%r1			# branch to do_single_step
394
395#
396# call tracehook_report_syscall_entry/tracehook_report_syscall_exit before
397# and after the system call
398#
399sysc_tracesys:
400	l	%r1,BASED(.Ltrace_entry)
401	la	%r2,SP_PTREGS(%r15)	# load pt_regs
402	la	%r3,0
403	srl	%r7,2
404	st	%r7,SP_R2(%r15)
405	basr	%r14,%r1
406	cl	%r2,BASED(.Lnr_syscalls)
407	bnl	BASED(sysc_tracenogo)
408	l	%r8,BASED(.Lsysc_table)
409	lr	%r7,%r2
410	sll	%r7,2			# svc number *4
411	l	%r8,0(%r7,%r8)
412sysc_tracego:
413	lm	%r3,%r6,SP_R3(%r15)
414	l	%r2,SP_ORIG_R2(%r15)
415	basr	%r14,%r8		# call sys_xxx
416	st	%r2,SP_R2(%r15)		# store return value
417sysc_tracenogo:
418	tm	__TI_flags+3(%r9),(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT)
419	bz	BASED(sysc_return)
420	l	%r1,BASED(.Ltrace_exit)
421	la	%r2,SP_PTREGS(%r15)	# load pt_regs
422	la	%r14,BASED(sysc_return)
423	br	%r1
424
425#
426# a new process exits the kernel with ret_from_fork
427#
428	.globl	ret_from_fork
429ret_from_fork:
430	l	%r13,__LC_SVC_NEW_PSW+4
431	l	%r9,__LC_THREAD_INFO	# load pointer to thread_info struct
432	tm	SP_PSW+1(%r15),0x01	# forking a kernel thread ?
433	bo	BASED(0f)
434	st	%r15,SP_R15(%r15)	# store stack pointer for new kthread
4350:	l	%r1,BASED(.Lschedtail)
436	basr	%r14,%r1
437	TRACE_IRQS_ON
438	stosm	__SF_EMPTY(%r15),0x03	# reenable interrupts
439	b	BASED(sysc_return)
440
441#
442# kernel_execve function needs to deal with pt_regs that is not
443# at the usual place
444#
445	.globl	kernel_execve
446kernel_execve:
447	stm	%r12,%r15,48(%r15)
448	lr	%r14,%r15
449	l	%r13,__LC_SVC_NEW_PSW+4
450	s	%r15,BASED(.Lc_spsize)
451	st	%r14,__SF_BACKCHAIN(%r15)
452	la	%r12,SP_PTREGS(%r15)
453	xc	0(__PT_SIZE,%r12),0(%r12)
454	l	%r1,BASED(.Ldo_execve)
455	lr	%r5,%r12
456	basr	%r14,%r1
457	ltr	%r2,%r2
458	be	BASED(0f)
459	a	%r15,BASED(.Lc_spsize)
460	lm	%r12,%r15,48(%r15)
461	br	%r14
462	# execve succeeded.
4630:	stnsm	__SF_EMPTY(%r15),0xfc	# disable interrupts
464	l	%r15,__LC_KERNEL_STACK	# load ksp
465	s	%r15,BASED(.Lc_spsize)	# make room for registers & psw
466	l	%r9,__LC_THREAD_INFO
467	mvc	SP_PTREGS(__PT_SIZE,%r15),0(%r12)	# copy pt_regs
468	xc	__SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15)
469	stosm	__SF_EMPTY(%r15),0x03	# reenable interrupts
470	l	%r1,BASED(.Lexecve_tail)
471	basr	%r14,%r1
472	b	BASED(sysc_return)
473
474/*
475 * Program check handler routine
476 */
477
478	.globl	pgm_check_handler
479pgm_check_handler:
480/*
481 * First we need to check for a special case:
482 * Single stepping an instruction that disables the PER event mask will
483 * cause a PER event AFTER the mask has been set. Example: SVC or LPSW.
484 * For a single stepped SVC the program check handler gets control after
485 * the SVC new PSW has been loaded. But we want to execute the SVC first and
486 * then handle the PER event. Therefore we update the SVC old PSW to point
487 * to the pgm_check_handler and branch to the SVC handler after we checked
488 * if we have to load the kernel stack register.
489 * For every other possible cause for PER event without the PER mask set
490 * we just ignore the PER event (FIXME: is there anything we have to do
491 * for LPSW?).
492 */
493	STORE_TIMER __LC_SYNC_ENTER_TIMER
494	SAVE_ALL_BASE __LC_SAVE_AREA
495	tm	__LC_PGM_INT_CODE+1,0x80 # check whether we got a per exception
496	bnz	BASED(pgm_per)		# got per exception -> special case
497	SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA
498	CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA
499#ifdef CONFIG_VIRT_CPU_ACCOUNTING
500	tm	SP_PSW+1(%r15),0x01	# interrupting from user ?
501	bz	BASED(pgm_no_vtime)
502	UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
503	UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
504	mvc	__LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
505pgm_no_vtime:
506#endif
507	l	%r9,__LC_THREAD_INFO	# load pointer to thread_info struct
508	TRACE_IRQS_OFF
509	l	%r3,__LC_PGM_ILC	# load program interruption code
510	la	%r8,0x7f
511	nr	%r8,%r3
512pgm_do_call:
513	l	%r7,BASED(.Ljump_table)
514	sll	%r8,2
515	l	%r7,0(%r8,%r7)		# load address of handler routine
516	la	%r2,SP_PTREGS(%r15)	# address of register-save area
517	la	%r14,BASED(sysc_return)
518	br	%r7			# branch to interrupt-handler
519
520#
521# handle per exception
522#
523pgm_per:
524	tm	__LC_PGM_OLD_PSW,0x40	# test if per event recording is on
525	bnz	BASED(pgm_per_std)	# ok, normal per event from user space
526# ok its one of the special cases, now we need to find out which one
527	clc	__LC_PGM_OLD_PSW(8),__LC_SVC_NEW_PSW
528	be	BASED(pgm_svcper)
529# no interesting special case, ignore PER event
530	lm	%r12,%r15,__LC_SAVE_AREA
531	lpsw	0x28
532
533#
534# Normal per exception
535#
536pgm_per_std:
537	SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA
538	CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA
539#ifdef CONFIG_VIRT_CPU_ACCOUNTING
540	tm	SP_PSW+1(%r15),0x01	# interrupting from user ?
541	bz	BASED(pgm_no_vtime2)
542	UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
543	UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
544	mvc	__LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
545pgm_no_vtime2:
546#endif
547	l	%r9,__LC_THREAD_INFO	# load pointer to thread_info struct
548	TRACE_IRQS_OFF
549	l	%r1,__TI_task(%r9)
550	mvc	__THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID
551	mvc	__THREAD_per+__PER_address(4,%r1),__LC_PER_ADDRESS
552	mvc	__THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID
553	oi	__TI_flags+3(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
554	tm	SP_PSW+1(%r15),0x01	# kernel per event ?
555	bz	BASED(kernel_per)
556	l	%r3,__LC_PGM_ILC	# load program interruption code
557	la	%r8,0x7f
558	nr	%r8,%r3 		# clear per-event-bit and ilc
559	be	BASED(sysc_return)	# only per or per+check ?
560	b	BASED(pgm_do_call)
561
562#
563# it was a single stepped SVC that is causing all the trouble
564#
565pgm_svcper:
566	SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
567	CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
568#ifdef CONFIG_VIRT_CPU_ACCOUNTING
569	UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
570	UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
571	mvc	__LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
572#endif
573	lh	%r7,0x8a		# get svc number from lowcore
574	l	%r9,__LC_THREAD_INFO	# load pointer to thread_info struct
575	TRACE_IRQS_OFF
576	l	%r1,__TI_task(%r9)
577	mvc	__THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID
578	mvc	__THREAD_per+__PER_address(4,%r1),__LC_PER_ADDRESS
579	mvc	__THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID
580	oi	__TI_flags+3(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
581	TRACE_IRQS_ON
582	stosm	__SF_EMPTY(%r15),0x03	# reenable interrupts
583	b	BASED(sysc_do_svc)
584
585#
586# per was called from kernel, must be kprobes
587#
588kernel_per:
589	mvi	SP_SVCNR(%r15),0xff	# set trap indication to pgm check
590	mvi	SP_SVCNR+1(%r15),0xff
591	la	%r2,SP_PTREGS(%r15)	# address of register-save area
592	l	%r1,BASED(.Lhandle_per)	# load adr. of per handler
593	la	%r14,BASED(sysc_restore)# load adr. of system return
594	br	%r1			# branch to do_single_step
595
596/*
597 * IO interrupt handler routine
598 */
599
600	.globl io_int_handler
601io_int_handler:
602	STORE_TIMER __LC_ASYNC_ENTER_TIMER
603	stck	__LC_INT_CLOCK
604	SAVE_ALL_BASE __LC_SAVE_AREA+16
605	SAVE_ALL_ASYNC __LC_IO_OLD_PSW,__LC_SAVE_AREA+16
606	CREATE_STACK_FRAME __LC_IO_OLD_PSW,__LC_SAVE_AREA+16
607#ifdef CONFIG_VIRT_CPU_ACCOUNTING
608	tm	SP_PSW+1(%r15),0x01	# interrupting from user ?
609	bz	BASED(io_no_vtime)
610	UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
611	UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
612	mvc	__LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
613io_no_vtime:
614#endif
615	l	%r9,__LC_THREAD_INFO	# load pointer to thread_info struct
616	TRACE_IRQS_OFF
617	l	%r1,BASED(.Ldo_IRQ)	# load address of do_IRQ
618	la	%r2,SP_PTREGS(%r15)	# address of register-save area
619	basr	%r14,%r1		# branch to standard irq handler
620io_return:
621	tm	__TI_flags+3(%r9),_TIF_WORK_INT
622	bnz	BASED(io_work)		# there is work to do (signals etc.)
623io_restore:
624#ifdef CONFIG_TRACE_IRQFLAGS
625	la	%r1,BASED(io_restore_trace_psw)
626	lpsw	0(%r1)
627io_restore_trace:
628	TRACE_IRQS_CHECK
629	LOCKDEP_SYS_EXIT
630#endif
631io_leave:
632	RESTORE_ALL __LC_RETURN_PSW,0
633io_done:
634
635#ifdef CONFIG_TRACE_IRQFLAGS
636	.align	8
637	.globl	io_restore_trace_psw
638io_restore_trace_psw:
639	.long	0, io_restore_trace + 0x80000000
640#endif
641
642#
643# switch to kernel stack, then check the TIF bits
644#
645io_work:
646	tm	SP_PSW+1(%r15),0x01	# returning to user ?
647#ifndef CONFIG_PREEMPT
648	bno	BASED(io_restore)	# no-> skip resched & signal
649#else
650	bnz	BASED(io_work_user)	# no -> check for preemptive scheduling
651	# check for preemptive scheduling
652	icm	%r0,15,__TI_precount(%r9)
653	bnz	BASED(io_restore)	# preemption disabled
654	l	%r1,SP_R15(%r15)
655	s	%r1,BASED(.Lc_spsize)
656	mvc	SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
657	xc	__SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1) # clear back chain
658	lr	%r15,%r1
659io_resume_loop:
660	tm	__TI_flags+3(%r9),_TIF_NEED_RESCHED
661	bno	BASED(io_restore)
662	l	%r1,BASED(.Lpreempt_schedule_irq)
663	la	%r14,BASED(io_resume_loop)
664	br	%r1			# call schedule
665#endif
666
667io_work_user:
668	l	%r1,__LC_KERNEL_STACK
669	s	%r1,BASED(.Lc_spsize)
670	mvc	SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
671	xc	__SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1) # clear back chain
672	lr	%r15,%r1
673#
674# One of the work bits is on. Find out which one.
675# Checked are: _TIF_SIGPENDING, _TIF_NEED_RESCHED
676#		and _TIF_MCCK_PENDING
677#
678io_work_loop:
679	tm	__TI_flags+3(%r9),_TIF_MCCK_PENDING
680	bo	BASED(io_mcck_pending)
681	tm	__TI_flags+3(%r9),_TIF_NEED_RESCHED
682	bo	BASED(io_reschedule)
683	tm	__TI_flags+3(%r9),_TIF_SIGPENDING
684	bnz	BASED(io_sigpending)
685	tm	__TI_flags+3(%r9),_TIF_NOTIFY_RESUME
686	bnz	BASED(io_notify_resume)
687	b	BASED(io_restore)
688io_work_done:
689
690#
691# _TIF_MCCK_PENDING is set, call handler
692#
693io_mcck_pending:
694	l	%r1,BASED(.Ls390_handle_mcck)
695	basr	%r14,%r1		# TIF bit will be cleared by handler
696	b	BASED(io_work_loop)
697
698#
699# _TIF_NEED_RESCHED is set, call schedule
700#
701io_reschedule:
702	TRACE_IRQS_ON
703	l	%r1,BASED(.Lschedule)
704	stosm	__SF_EMPTY(%r15),0x03	# reenable interrupts
705	basr	%r14,%r1		# call scheduler
706	stnsm	__SF_EMPTY(%r15),0xfc	# disable I/O and ext. interrupts
707	TRACE_IRQS_OFF
708	tm	__TI_flags+3(%r9),_TIF_WORK_INT
709	bz	BASED(io_restore)	# there is no work to do
710	b	BASED(io_work_loop)
711
712#
713# _TIF_SIGPENDING is set, call do_signal
714#
715io_sigpending:
716	TRACE_IRQS_ON
717	stosm	__SF_EMPTY(%r15),0x03	# reenable interrupts
718	la	%r2,SP_PTREGS(%r15)	# load pt_regs
719	l	%r1,BASED(.Ldo_signal)
720	basr	%r14,%r1		# call do_signal
721	stnsm	__SF_EMPTY(%r15),0xfc	# disable I/O and ext. interrupts
722	TRACE_IRQS_OFF
723	b	BASED(io_work_loop)
724
725#
726# _TIF_SIGPENDING is set, call do_signal
727#
728io_notify_resume:
729	TRACE_IRQS_ON
730	stosm	__SF_EMPTY(%r15),0x03	# reenable interrupts
731	la	%r2,SP_PTREGS(%r15)	# load pt_regs
732	l	%r1,BASED(.Ldo_notify_resume)
733	basr	%r14,%r1		# call do_signal
734	stnsm	__SF_EMPTY(%r15),0xfc	# disable I/O and ext. interrupts
735	TRACE_IRQS_OFF
736	b	BASED(io_work_loop)
737
738/*
739 * External interrupt handler routine
740 */
741
742	.globl	ext_int_handler
743ext_int_handler:
744	STORE_TIMER __LC_ASYNC_ENTER_TIMER
745	stck	__LC_INT_CLOCK
746	SAVE_ALL_BASE __LC_SAVE_AREA+16
747	SAVE_ALL_ASYNC __LC_EXT_OLD_PSW,__LC_SAVE_AREA+16
748	CREATE_STACK_FRAME __LC_EXT_OLD_PSW,__LC_SAVE_AREA+16
749#ifdef CONFIG_VIRT_CPU_ACCOUNTING
750	tm	SP_PSW+1(%r15),0x01	# interrupting from user ?
751	bz	BASED(ext_no_vtime)
752	UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
753	UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
754	mvc	__LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
755ext_no_vtime:
756#endif
757	l	%r9,__LC_THREAD_INFO	# load pointer to thread_info struct
758	TRACE_IRQS_OFF
759	la	%r2,SP_PTREGS(%r15)	# address of register-save area
760	lh	%r3,__LC_EXT_INT_CODE	# get interruption code
761	l	%r1,BASED(.Ldo_extint)
762	basr	%r14,%r1
763	b	BASED(io_return)
764
765__critical_end:
766
767/*
768 * Machine check handler routines
769 */
770
771	.globl mcck_int_handler
772mcck_int_handler:
773	spt	__LC_CPU_TIMER_SAVE_AREA	# revalidate cpu timer
774	lm	%r0,%r15,__LC_GPREGS_SAVE_AREA	# revalidate gprs
775	SAVE_ALL_BASE __LC_SAVE_AREA+32
776	la	%r12,__LC_MCK_OLD_PSW
777	tm	__LC_MCCK_CODE,0x80	# system damage?
778	bo	BASED(mcck_int_main)	# yes -> rest of mcck code invalid
779#ifdef CONFIG_VIRT_CPU_ACCOUNTING
780	mvc	__LC_SAVE_AREA+52(8),__LC_ASYNC_ENTER_TIMER
781	mvc	__LC_ASYNC_ENTER_TIMER(8),__LC_CPU_TIMER_SAVE_AREA
782	tm	__LC_MCCK_CODE+5,0x02	# stored cpu timer value valid?
783	bo	BASED(1f)
784	la	%r14,__LC_SYNC_ENTER_TIMER
785	clc	0(8,%r14),__LC_ASYNC_ENTER_TIMER
786	bl	BASED(0f)
787	la	%r14,__LC_ASYNC_ENTER_TIMER
7880:	clc	0(8,%r14),__LC_EXIT_TIMER
789	bl	BASED(0f)
790	la	%r14,__LC_EXIT_TIMER
7910:	clc	0(8,%r14),__LC_LAST_UPDATE_TIMER
792	bl	BASED(0f)
793	la	%r14,__LC_LAST_UPDATE_TIMER
7940:	spt	0(%r14)
795	mvc	__LC_ASYNC_ENTER_TIMER(8),0(%r14)
7961:
797#endif
798	tm	__LC_MCCK_CODE+2,0x09	# mwp + ia of old psw valid?
799	bno	BASED(mcck_int_main)	# no -> skip cleanup critical
800	tm	__LC_MCK_OLD_PSW+1,0x01	# test problem state bit
801	bnz	BASED(mcck_int_main)	# from user -> load async stack
802	clc	__LC_MCK_OLD_PSW+4(4),BASED(.Lcritical_end)
803	bhe	BASED(mcck_int_main)
804	clc	__LC_MCK_OLD_PSW+4(4),BASED(.Lcritical_start)
805	bl	BASED(mcck_int_main)
806	l	%r14,BASED(.Lcleanup_critical)
807	basr	%r14,%r14
808mcck_int_main:
809	l	%r14,__LC_PANIC_STACK	# are we already on the panic stack?
810	slr	%r14,%r15
811	sra	%r14,PAGE_SHIFT
812	be	BASED(0f)
813	l	%r15,__LC_PANIC_STACK	# load panic stack
8140:	CREATE_STACK_FRAME __LC_MCK_OLD_PSW,__LC_SAVE_AREA+32
815#ifdef CONFIG_VIRT_CPU_ACCOUNTING
816	tm	__LC_MCCK_CODE+2,0x08	# mwp of old psw valid?
817	bno	BASED(mcck_no_vtime)	# no -> skip cleanup critical
818	tm	SP_PSW+1(%r15),0x01	# interrupting from user ?
819	bz	BASED(mcck_no_vtime)
820	UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
821	UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
822	mvc	__LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
823mcck_no_vtime:
824#endif
825	l	%r9,__LC_THREAD_INFO	# load pointer to thread_info struct
826	la	%r2,SP_PTREGS(%r15)	# load pt_regs
827	l	%r1,BASED(.Ls390_mcck)
828	basr	%r14,%r1		# call machine check handler
829	tm	SP_PSW+1(%r15),0x01	# returning to user ?
830	bno	BASED(mcck_return)
831	l	%r1,__LC_KERNEL_STACK	# switch to kernel stack
832	s	%r1,BASED(.Lc_spsize)
833	mvc	SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
834	xc	__SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1) # clear back chain
835	lr	%r15,%r1
836	stosm	__SF_EMPTY(%r15),0x04	# turn dat on
837	tm	__TI_flags+3(%r9),_TIF_MCCK_PENDING
838	bno	BASED(mcck_return)
839	TRACE_IRQS_OFF
840	l	%r1,BASED(.Ls390_handle_mcck)
841	basr	%r14,%r1		# call machine check handler
842	TRACE_IRQS_ON
843mcck_return:
844	mvc	__LC_RETURN_MCCK_PSW(8),SP_PSW(%r15) # move return PSW
845	ni	__LC_RETURN_MCCK_PSW+1,0xfd # clear wait state bit
846#ifdef CONFIG_VIRT_CPU_ACCOUNTING
847	mvc	__LC_ASYNC_ENTER_TIMER(8),__LC_SAVE_AREA+52
848	tm	__LC_RETURN_MCCK_PSW+1,0x01 # returning to user ?
849	bno	BASED(0f)
850	lm	%r0,%r15,SP_R0(%r15)	# load gprs 0-15
851	stpt	__LC_EXIT_TIMER
852	lpsw	__LC_RETURN_MCCK_PSW	# back to caller
8530:
854#endif
855	lm	%r0,%r15,SP_R0(%r15)	# load gprs 0-15
856	lpsw	__LC_RETURN_MCCK_PSW	# back to caller
857
858	RESTORE_ALL __LC_RETURN_MCCK_PSW,0
859
860/*
861 * Restart interruption handler, kick starter for additional CPUs
862 */
863#ifdef CONFIG_SMP
864	__CPUINIT
865	.globl restart_int_handler
866restart_int_handler:
867	l	%r15,__LC_SAVE_AREA+60	# load ksp
868	lctl	%c0,%c15,__LC_CREGS_SAVE_AREA # get new ctl regs
869	lam	%a0,%a15,__LC_AREGS_SAVE_AREA
870	lm	%r6,%r15,__SF_GPRS(%r15) # load registers from clone
871	stosm	__SF_EMPTY(%r15),0x04	# now we can turn dat on
872	basr	%r14,0
873	l	%r14,restart_addr-.(%r14)
874	br	%r14			# branch to start_secondary
875restart_addr:
876	.long	start_secondary
877	.previous
878#else
879/*
880 * If we do not run with SMP enabled, let the new CPU crash ...
881 */
882	.globl restart_int_handler
883restart_int_handler:
884	basr	%r1,0
885restart_base:
886	lpsw	restart_crash-restart_base(%r1)
887	.align	8
888restart_crash:
889	.long	0x000a0000,0x00000000
890restart_go:
891#endif
892
893#ifdef CONFIG_CHECK_STACK
894/*
895 * The synchronous or the asynchronous stack overflowed. We are dead.
896 * No need to properly save the registers, we are going to panic anyway.
897 * Setup a pt_regs so that show_trace can provide a good call trace.
898 */
899stack_overflow:
900	l	%r15,__LC_PANIC_STACK	# change to panic stack
901	sl	%r15,BASED(.Lc_spsize)
902	mvc	SP_PSW(8,%r15),0(%r12)	# move user PSW to stack
903	stm	%r0,%r11,SP_R0(%r15)	# store gprs %r0-%r11 to kernel stack
904	la	%r1,__LC_SAVE_AREA
905	ch	%r12,BASED(.L0x020)	# old psw addr == __LC_SVC_OLD_PSW ?
906	be	BASED(0f)
907	ch	%r12,BASED(.L0x028)	# old psw addr == __LC_PGM_OLD_PSW ?
908	be	BASED(0f)
909	la	%r1,__LC_SAVE_AREA+16
9100:	mvc	SP_R12(16,%r15),0(%r1)	# move %r12-%r15 to stack
911	xc	__SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15) # clear back chain
912	l	%r1,BASED(1f)		# branch to kernel_stack_overflow
913	la	%r2,SP_PTREGS(%r15)	# load pt_regs
914	br	%r1
9151:	.long	kernel_stack_overflow
916#endif
917
918cleanup_table_system_call:
919	.long	system_call + 0x80000000, sysc_do_svc + 0x80000000
920cleanup_table_sysc_return:
921	.long	sysc_return + 0x80000000, sysc_leave + 0x80000000
922cleanup_table_sysc_leave:
923	.long	sysc_leave + 0x80000000, sysc_done + 0x80000000
924cleanup_table_sysc_work_loop:
925	.long	sysc_work_loop + 0x80000000, sysc_work_done + 0x80000000
926cleanup_table_io_return:
927	.long	io_return + 0x80000000, io_leave + 0x80000000
928cleanup_table_io_leave:
929	.long	io_leave + 0x80000000, io_done + 0x80000000
930cleanup_table_io_work_loop:
931	.long	io_work_loop + 0x80000000, io_work_done + 0x80000000
932
933cleanup_critical:
934	clc	4(4,%r12),BASED(cleanup_table_system_call)
935	bl	BASED(0f)
936	clc	4(4,%r12),BASED(cleanup_table_system_call+4)
937	bl	BASED(cleanup_system_call)
9380:
939	clc	4(4,%r12),BASED(cleanup_table_sysc_return)
940	bl	BASED(0f)
941	clc	4(4,%r12),BASED(cleanup_table_sysc_return+4)
942	bl	BASED(cleanup_sysc_return)
9430:
944	clc	4(4,%r12),BASED(cleanup_table_sysc_leave)
945	bl	BASED(0f)
946	clc	4(4,%r12),BASED(cleanup_table_sysc_leave+4)
947	bl	BASED(cleanup_sysc_leave)
9480:
949	clc	4(4,%r12),BASED(cleanup_table_sysc_work_loop)
950	bl	BASED(0f)
951	clc	4(4,%r12),BASED(cleanup_table_sysc_work_loop+4)
952	bl	BASED(cleanup_sysc_return)
9530:
954	clc	4(4,%r12),BASED(cleanup_table_io_return)
955	bl	BASED(0f)
956	clc	4(4,%r12),BASED(cleanup_table_io_return+4)
957	bl	BASED(cleanup_io_return)
9580:
959	clc	4(4,%r12),BASED(cleanup_table_io_leave)
960	bl	BASED(0f)
961	clc	4(4,%r12),BASED(cleanup_table_io_leave+4)
962	bl	BASED(cleanup_io_leave)
9630:
964	clc	4(4,%r12),BASED(cleanup_table_io_work_loop)
965	bl	BASED(0f)
966	clc	4(4,%r12),BASED(cleanup_table_io_work_loop+4)
967	bl	BASED(cleanup_io_return)
9680:
969	br	%r14
970
971cleanup_system_call:
972	mvc	__LC_RETURN_PSW(8),0(%r12)
973	c	%r12,BASED(.Lmck_old_psw)
974	be	BASED(0f)
975	la	%r12,__LC_SAVE_AREA+16
976	b	BASED(1f)
9770:	la	%r12,__LC_SAVE_AREA+32
9781:
979#ifdef CONFIG_VIRT_CPU_ACCOUNTING
980	clc	__LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+4)
981	bh	BASED(0f)
982	mvc	__LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER
9830:	clc	__LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+8)
984	bhe	BASED(cleanup_vtime)
985#endif
986	clc	__LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn)
987	bh	BASED(0f)
988	mvc	__LC_SAVE_AREA(16),0(%r12)
9890:	st	%r13,4(%r12)
990	st	%r12,__LC_SAVE_AREA+48	# argh
991	SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
992	CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
993	l	%r12,__LC_SAVE_AREA+48	# argh
994	st	%r15,12(%r12)
995	lh	%r7,0x8a
996#ifdef CONFIG_VIRT_CPU_ACCOUNTING
997cleanup_vtime:
998	clc	__LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+12)
999	bhe	BASED(cleanup_stime)
1000	UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
1001cleanup_stime:
1002	clc	__LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+16)
1003	bh	BASED(cleanup_update)
1004	UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
1005cleanup_update:
1006	mvc	__LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
1007#endif
1008	mvc	__LC_RETURN_PSW+4(4),BASED(cleanup_table_system_call+4)
1009	la	%r12,__LC_RETURN_PSW
1010	br	%r14
1011cleanup_system_call_insn:
1012	.long	sysc_saveall + 0x80000000
1013#ifdef CONFIG_VIRT_CPU_ACCOUNTING
1014	.long	system_call + 0x80000000
1015	.long	sysc_vtime + 0x80000000
1016	.long	sysc_stime + 0x80000000
1017	.long	sysc_update + 0x80000000
1018#endif
1019
1020cleanup_sysc_return:
1021	mvc	__LC_RETURN_PSW(4),0(%r12)
1022	mvc	__LC_RETURN_PSW+4(4),BASED(cleanup_table_sysc_return)
1023	la	%r12,__LC_RETURN_PSW
1024	br	%r14
1025
1026cleanup_sysc_leave:
1027	clc	4(4,%r12),BASED(cleanup_sysc_leave_insn)
1028	be	BASED(2f)
1029#ifdef CONFIG_VIRT_CPU_ACCOUNTING
1030	mvc	__LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
1031	clc	4(4,%r12),BASED(cleanup_sysc_leave_insn+4)
1032	be	BASED(2f)
1033#endif
1034	mvc	__LC_RETURN_PSW(8),SP_PSW(%r15)
1035	c	%r12,BASED(.Lmck_old_psw)
1036	bne	BASED(0f)
1037	mvc	__LC_SAVE_AREA+32(16),SP_R12(%r15)
1038	b	BASED(1f)
10390:	mvc	__LC_SAVE_AREA+16(16),SP_R12(%r15)
10401:	lm	%r0,%r11,SP_R0(%r15)
1041	l	%r15,SP_R15(%r15)
10422:	la	%r12,__LC_RETURN_PSW
1043	br	%r14
1044cleanup_sysc_leave_insn:
1045	.long	sysc_done - 4 + 0x80000000
1046#ifdef CONFIG_VIRT_CPU_ACCOUNTING
1047	.long	sysc_done - 8 + 0x80000000
1048#endif
1049
1050cleanup_io_return:
1051	mvc	__LC_RETURN_PSW(4),0(%r12)
1052	mvc	__LC_RETURN_PSW+4(4),BASED(cleanup_table_io_work_loop)
1053	la	%r12,__LC_RETURN_PSW
1054	br	%r14
1055
1056cleanup_io_leave:
1057	clc	4(4,%r12),BASED(cleanup_io_leave_insn)
1058	be	BASED(2f)
1059#ifdef CONFIG_VIRT_CPU_ACCOUNTING
1060	mvc	__LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
1061	clc	4(4,%r12),BASED(cleanup_io_leave_insn+4)
1062	be	BASED(2f)
1063#endif
1064	mvc	__LC_RETURN_PSW(8),SP_PSW(%r15)
1065	c	%r12,BASED(.Lmck_old_psw)
1066	bne	BASED(0f)
1067	mvc	__LC_SAVE_AREA+32(16),SP_R12(%r15)
1068	b	BASED(1f)
10690:	mvc	__LC_SAVE_AREA+16(16),SP_R12(%r15)
10701:	lm	%r0,%r11,SP_R0(%r15)
1071	l	%r15,SP_R15(%r15)
10722:	la	%r12,__LC_RETURN_PSW
1073	br	%r14
1074cleanup_io_leave_insn:
1075	.long	io_done - 4 + 0x80000000
1076#ifdef CONFIG_VIRT_CPU_ACCOUNTING
1077	.long	io_done - 8 + 0x80000000
1078#endif
1079
1080/*
1081 * Integer constants
1082 */
1083		.align	4
1084.Lc_spsize:	.long	SP_SIZE
1085.Lc_overhead:	.long	STACK_FRAME_OVERHEAD
1086.Lnr_syscalls:	.long	NR_syscalls
1087.L0x018:	.short	0x018
1088.L0x020:	.short	0x020
1089.L0x028:	.short	0x028
1090.L0x030:	.short	0x030
1091.L0x038:	.short	0x038
1092.Lc_1:		.long	1
1093
1094/*
1095 * Symbol constants
1096 */
1097.Ls390_mcck:	.long	s390_do_machine_check
1098.Ls390_handle_mcck:
1099		.long	s390_handle_mcck
1100.Lmck_old_psw:	.long	__LC_MCK_OLD_PSW
1101.Ldo_IRQ:	.long	do_IRQ
1102.Ldo_extint:	.long	do_extint
1103.Ldo_signal:	.long	do_signal
1104.Ldo_notify_resume:
1105		.long	do_notify_resume
1106.Lhandle_per:	.long	do_single_step
1107.Ldo_execve:	.long	do_execve
1108.Lexecve_tail:	.long	execve_tail
1109.Ljump_table:	.long	pgm_check_table
1110.Lschedule:	.long	schedule
1111#ifdef CONFIG_PREEMPT
1112.Lpreempt_schedule_irq:
1113		.long	preempt_schedule_irq
1114#endif
1115.Ltrace_entry:	.long	do_syscall_trace_enter
1116.Ltrace_exit:	.long	do_syscall_trace_exit
1117.Lschedtail:	.long	schedule_tail
1118.Lsysc_table:	.long	sys_call_table
1119#ifdef CONFIG_TRACE_IRQFLAGS
1120.Ltrace_irq_on_caller:
1121		.long	trace_hardirqs_on_caller
1122.Ltrace_irq_off_caller:
1123		.long	trace_hardirqs_off_caller
1124#endif
1125#ifdef CONFIG_LOCKDEP
1126.Llockdep_sys_exit:
1127		.long	lockdep_sys_exit
1128#endif
1129.Lcritical_start:
1130		.long	__critical_start + 0x80000000
1131.Lcritical_end:
1132		.long	__critical_end + 0x80000000
1133.Lcleanup_critical:
1134		.long	cleanup_critical
1135
1136		.section .rodata, "a"
1137#define SYSCALL(esa,esame,emu)	.long esa
1138sys_call_table:
1139#include "syscalls.S"
1140#undef SYSCALL
1141